TEA2019 STMICROELECTRONICS | Alldatasheet

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POWER SUPPLY CONTROL CIRCUIT August 1992 .DIRECT DRIVE OF THE EXTERNAL SWITCHING TRANSISTOR .POSITIVE AND NEGATIVE OUTPUT CUR- RENTS UP TO 0.5A .CURRENT LIMITATION .TRANSFORMER DEMAGNETIZATION AND POWER TRANSISTOR SATURATION SENS- ING .FULL OVERLOAD AND SHORT-CIRCUIT PROTECTION .PROPORTIONAL BASE CURRENT DRIVING .LOW STANDBY CURRENT BEFORE START- ING (1.6mA) .SYNCHRONIZATION CAPABILITY WITH IN- TERNAL PLL .THERMAL PROTECTION DIP 14 (Plastic package) ORDER CODE : TEA2019

DESCRIPTION

The TEA2019 is an 14-pin DIP low cost integrated circuit designed for the control of switch mode power supplies. It has the same basic functions as the TEA2018Abut with synchronization capability by internal PLL. It is particularly suitable for appli- cations where oscillator synchronization is re- quired. OUTPUT AUXILIARY OUTPUT SUPPLY POSITIVE SUPPLY VOLTAGE SATURATION SENSING DEMAGNETIZATION SENSING ERROR AMPLIFIER NON-INVERTING INPUT SYNCHRONIZATION INPUT NEGATIVE SUPPLY (OUTPUT STAGE) SUBSTRATE I SAMPLE (NEGATIVE) GROUND OSCILLATOR CAPACITOR OSCILLATOR REFERENCE CURRENT C PLL OUTPUT 2019-01.EPS PIN CONNECTIONS Due to its current mode regulation, the TEA2019 facilitates design of power supplies with following features : .High stability regulation loop. .Automatic input voltage feed-forward in dis- continuous mode fly-back. .Automatic pulse-by-pulse current limitation. Typical applications : Video Display Units, TV sets, typewriters, micro-computers and industrial appli- cations. For more details, see application note AN406/0591.

Symbol Parameter Value Unit CC Positive Supply Voltage 15 V V(aux) Auxiliary Output Supply Voltage 15 V CC Negative Supply Voltage – 5 V IO (peak) Peak Output Current (duty cycle < 5%) ± 1A II Input Current Pins 4-5 ± 5m A Tj Junction Temperature 150 °C Toper Operating Ambient Temperature Range – 20, + 70 °C Tstg Storage Temperature Range – 40, + 150 °C 2019-01.TBL DELAY 200ms THERMAL SHUT-DOWN 80% DUTY CYCLE LIMITATION -1V VOLTAGE LIMITATION OSCILLATOR V REF = 2.4VPHASE LOCKED LOOP 11 13 V CC SWITCH Undervoltage S R Q Q FLIP FLOP I RECOPY C 3.2V 01.V V CC Demagnetization Sensing Sampling Pulse Comparator V REF V CC Bias ”good” x5 0 Output PLL Out Sync. Rt Ct Feed-back Ground Monitoring V CE Substrate VISENSE IS V CC V AUX TEA2019 2019-02.EPS BLOCK DIAGRAM TEA2019

ELECTRICAL OPERATING CHARACTERISTICS Tamb =+2 5oC, potentials referenced to ground (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit CC Positive Supply Voltage 6.6 8 15 V VCC Negative Supply Voltage –1 –3 –5 V VCC(start) Minimum positive supply voltage required for starting (V+ CC rising) 6 6.6 V VCC(stop) Minimum positive voltage below which device stops operating (V+ CC falling) 4.2 4.9 5.6 V Δ V+ CC Hysteresis on V+ CC Threshold 0.7 1.1 1.6 V ICC(sb) Standby Supply Current Before Starting [V+ CC <V CC(start)] 1 1.6 mA Vth (Ic) Current Limitation Threshold Voltage (pin 12) –1100 –1000 –880 mV R (Ic) Collector Current Sensing Input Resistance 1000 Ω IS Demagnetization Sensing Threshold 75 100 125 mV Demagnetization Sensing Input Current (pin 5 grounded) 1 µA τ max Maximum Duty Cycle 70 80 % AV Error Amplifier Gain 50 I Error Amplifier Input Current (non-inverting input) (pin 6) 2 µA V(REF) Internal Reference Voltage 2.3 2.4 2.5 V Δ V(REF ) ΔT Reference Voltage Temperature Drift 10 –4 V/°C TOSC Oscillator Free-running Period ( R = 59kΩ , C = 1.5nF) 60 65 70 µs ΔfOSC Δ T Oscillator Frequency Drift with Temperature (V+ ΔfOSC Δ VCC Oscillator Frequency Drift with V+ CC (+ 8V < V+ ton(min) Minimum Conducting Time (Ct = 1nF) 2 µs 2019-03.TBL SYNCHRONIZATION INPUT (pin 7) Symbol Parameter Min. Typ. Max. Unit V7pp Peak to Peak Sawtooth Voltage 0.5 2.5 V R (7) Input Impedance 20 k Ω 2019-04.TBL PLL CHARACTERISTICS (see Test Circuit) Symbol Parameter Min. Typ. Max. Unit Frequency Sensitivity 100 Hz/ µA Δ T Capture Range (T OSC =6 4µs Typ.) T OSC -T SYN min TSYN max -TOSC 5.5 4.5 µs µs 2019-05.TBL SATURATION SENSING (pin 4) Symbol Parameter Min. Typ. Max. Unit V(4) Input Threshold 3.2 V I(4) Input Current (V4 > 3.2V) 50 µA Input Internal Resistance 1 k Ω 2019-06.TBL RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min. Typ. Max. Unit CC Positive Supply Voltage 8 V VCC Negative Supply Voltage 3 V IO Output Current 0.5 A Foper Operating Frequency 30 kHz 2019-07.TBL THERMAL DATA Symbol Parameter Value Unit R th (j-a) Junction-ambient Thermal Resistance 80 °C/W 2019-02.TBL TEA2019

10Ω470Ω 31427 8 9 10 11 12 13 14 TEA2019 -1V AS1 10nF 10nF 10kΩ 8.2kΩ 4.7µF 4.7µF V12 V14 47nF 1.5nF 3.3nF 22nF 3.9kΩ 56kΩ 1% 59kΩ V10 100Ω 2019-03.EPS TYPICAL CIRCUIT GENERAL DESCRIPTION (see application note AN406/0591) Operating Principles(Figure 1) On every period, the beginning of the conduction time of the transistor is triggered by the fall of the oscillator saw-tooth which acts as clock signal. The period T osc is given by : Tosc ≈ 0.69 Ct(Rt+ 2000) (Tosc in seconds, Ctin Farad, RtinΩ ) The end of the conduction time is determinedby a signal issued from comparing the following signals. a) the sawtooth waveform representing the collector current of the switching transistor, sampled across the emitter shunt resistor. b) the output of the error amplifier. Base Drive

  • Fast turn-on On each period, a current pulse ensures fast transistor switch-on. This pulse performs also the t on(min)function at the beginningof the conduction.
  • Proportional base drive In order to save power, the positive base current after the starting pulse becomes an image of the collector current. The ratioI C IB is programmed as follows (Figure 2). IC IB = R B R E 2019-05.EPS / 2019-04.EPS Figure 1 : Current Mode Control CI SENSE OSCILLATOR ERROR SIGNAL ERROR AMPLIFIER COMPARATOR S R Q FLIP-FLOP V REF IC V i OUTPUT FILTER LOAD Re t t t Error Signal OSCILLATOR SAWTOOTH I (sample) FLIP-FLOP OUTPUT C TEA2019

The TEA2019 has some additional capabilities compared to the TEA2018A :

  • The oscillator charge current its supplied through an internalcurrent generator,programmedexter- nally - instead of using an external charging resistor. The sawtooth so obtained is linear.
  • The oscillator can be synchronized through an internal PLL circuit. This feature provides syn- chronization between the external sync pulse and the end of the switching transistor current. The sync pulse can be for example the fly-back pulse of a TV horizontal sweep circuit. As indi- cated in the application diagram, this pulse is applied first to a R.C. network to obtain a low voltage sawtooth and then to pin 7 of the circuit. The PLL output (pin 8) supplies a correction current to pin 9 through an external resistor, so as to maintain the oscillator at the correct fre- quency (refer to application note AN406/0591 for detailed information).
  • In the TEA2019, the power supply of the positive output stage is separated from the main power supply, so that it can be supplied from a lower voltage in order to reduce the I.C. power dissipa- tion. For low power applications, the circuit can be normally supplied by connecting pins 2 and 3 together.
  • In order to protect the substrate (pin 13) from the parasitic voltage peaks produced by negative output current peaks at pin 14, the substrate (pin 13) is internally separated from the negative supply (pin 14). They must be externally con- nected together.
  • The switching transistor saturation voltage can be monitored at pin 4. To achieve this, a high voltage diode must be connected between the collector of the switching transistor and pin 4. Also a resistor must be connected from pin 4 to V +CC (see application diagram). This arrange- ment is useful when the chosen value of base current is very low and as a consequence the saturationvoltage will be high. In thisevent, when V CE(sat)increases above 2.5V, the base current is interruptedbefore the normal endof the period. Remark : the TEA2019 can also operate without this protection. 47µF 385V 0.1µF 0.1µF 4 x 1N4007 RF Filter 2 x 12mH 0.5A 1N4148 Primary Ground Secondary Ground TEA2019 Mains Input 91 0 13 14 1.5nF 22nF3.3nF 56kΩ56kΩ 3.9kΩ 82kΩ 10kΩ 10kΩ 1.8kΩ 47nF 33nF 10µF 18 Ω 10Ω10kΩ 470µF 1N41483.9Ω 120kΩ 3.3Ω BUV 46A BYT 11-100 BYT11-100 BYT11-1000 0.47Ω 4.7Ω 10µF BYT11-800 BYT11-800 100µF 160V 470µF 40V 120V 0.4A 24V 0.5A 1kΩ 680Ω 2.2nF 100Ω 3 x 1N4001 Sync. Pulse 2019-08.EPS TYPICAL APPLICATION .PMAX = 60W .Free-running Frequency : 15kHz .155VRMS ≤ VAC ≤ 250VRMS .Outputs: 120V ± 3%, 0.4A 24V ±3%, 0.5A .VCE Monitoring TEA2019

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics.  1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I 2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 14 8 I L Be D Z b Z F E PM-DIP14.EPS PACKAGE MECHANICAL DATA

14 PINS - PLASTIC DIP

Dimensions Millimeters Inches a1 0.51 0.020 B 1.39 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 0.280 i 5.1 0.201 L 3.3 0.130 Z 1.27 2.54 0.050 0.100 DIP14.TBL TEA2019