TEA1114A

TEA1114A PHILIPS | Alldatasheet

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Technical content

Product specification Supersedes data of 1999 Sep 14 File under Integrated Circuits, IC03

2000 Mar 21

transmission circuit with dialler interface and regulated strong supply

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A

FEATURES

• Low DC line voltage; operates down to 1.45 V (excluding voltage drop over external polarity guard)
• Line voltage regulator with adjustable DC voltage
• 3.3 V regulated strong supply point for peripheral circuits compatible with: – Speech mode – Ringer mode – Trickle mode.
• Transmit stage with: – Microphone amplifier with symmetrical high impedance inputs – DTMF amplifier with confidence tone on receive output.
• Receive stage with: – Receive amplifier with asymmetrical output – Earpiece amplifier with adjustable gain (and gain boost facility) for all types of earpieces. MUTE input for pulse or DTMF dialling
• AGC line loss compensation for microphone and receive amplifiers.

APPLICATIONS

• Line powered telephone sets with LCD module
• Cordless telephones
• Fax machines
• Answering machines. GENERAL DESCRIPTION The TEA1114A is a bipolar integrated circuit that performs all speech and line interface functions required in fully electronic telephone sets. It performs electronic switching between speech and dialling. The IC operates at a line voltage down to 1.45 V DC (with reduced performance) to facilitate the use of telephone sets connected in parallel. When the line current is high enough, a fixed amount of current is derived from the LN pin in order to create a strong supply point at pin V DD . The voltage at pin VDD is regulated to 3.3 V to supply peripherals such as dialler, LCD module and microcontroller.

ORDERING INFORMATION

TEA1114A DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 TEA1114AT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 TEA1114AUH − bare die; on foil −

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A QUICK REFERENCE DATA Iline= 15 mA; VEE =0V ;R SLPE =2 0Ω ; AGC pin connected to VEE ;Zline= 600Ω ; f = 1 kHz; measured according to test circuits given in Figs 15, 16 and 17; Tamb =2 5°C for TEA1114A(T); Tj=2 5°C for TEA1114AUH; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Iline line current operating range normal operation 11 − 140 mA with reduced performance 1 − 11 mA VLN DC line voltage 4.05 4.35 4.65 V ICC internal current consumption V CC = 3.6 V − 1.25 1.5 mA VCC supply voltage for internal circuitry (unregulated) IP =0m A − 3.6 − V VDD regulated supply voltage for peripherals speech mode I DD = −3 mA 3.0 3.3 3.6 V ringer mode I DD = 75 mA 3.0 3.3 3.6 V IDD available supply current for peripherals −−− 3m A G v(TX) typical voltage gain for microphone amplifier VMIC = 4 mV (RMS) 43.2 44.2 45.2 dB G v(RX) typical voltage gain for receiving amplifier VIR = 4 mV (RMS) 32.4 33.4 34.4 dB ΔG v(QR) gain setting range for earpiece amplifier RE1 = 100 kΩ− 14 − +12 dB ΔG v(trx) gain control range for microphone and receive amplifiers with respect to I line=1 5m A Iline=8 5m A − 6.0 − dB ΔG v(trx)(m) gain reduction for microphone and receive amplifiers MUTE = LOW − 80 − dB

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A BLOCK DIAGRAM handbook, full pagewidth MGK804 VI VI VI VI CURRENT AND VOLTAGE REFERENCE LOW VOLTAGE CIRCUIT AGC CIRCUIT VDD REGULATOR ATTENUATOR 0.5VCC TEA1114A IR MUTE MIC + 6DTMF MIC − VEE AGC RX GAR 9Q R

3 REG

7 VDD

16 VCC

Fig.1 Block diagram.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A PINNING SYMBOL PIN PAD

DESCRIPTION

TEA1114A(T) TEA1114AUH LN 1 1, 19 positive line terminal SLPE 2 2 slope (DC resistance) adjustment REG 3 3 line voltage regulator decoupling IR 4 4 receiving amplifier input AGC 5 5 automatic gain control/ line loss compensation DTMF 6 6 dual-tone multi-frequency input V DD 7 7 regulated supply for peripherals MUTE 8 8 mute input to select speech or dialling mode (active LOW) QR 9 9 earpiece amplifier output n.c. − 10 not connected V EE 10 11 negative line terminal n.c. − 12 not connected GAR 11 13 earpiece amplifier gain adjustment RX 12 14 receive amplifier output MIC+ 13 15 non-inverting microphone amplifier input MIC − 14 16 inverting microphone amplifier input n.c. 15 − not connected V CC 16 17 supply voltage for internal circuit n.c. − 18 not connected handbook, halfpage TEA1114A MGK803 LN SLPE REG IR AGC DTMF VDD MUTE QR VEE GAR RX MIC + MIC − VCC n.c. Fig.2 Pin configuration.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A FUNCTIONAL DESCRIPTION All data given in this chapter are typical values, except when otherwise specified. Supply (pins LN, SLPE, REG, VCC and VDD ) The supply for the TEA1114A and its peripherals is obtained from the telephone line (see Fig.3). THE LINE INTERFACE (PINS LN, SLPE AND REG) The IC generates a stabilized reference voltage (Vref) between pins LN and SLPE. Vref is temperature compensated and can be adjusted by means of an external resistor (R VA ). Vref equals 4.15 V and can be increased by connecting RVA between pins REG and SLPE or decreased by connecting RVA between pins REG and LN. The voltage at pin REG is used by the internal regulator to generate V ref and is decoupled by C REG , which is connected to VEE . This capacitor, converted into an equivalent inductance (see Section “Set impedance”) realizes the set impedance conversion from its DC value (R SLPE ) to its AC value (RCC in the audio-frequency range). The voltage at pin SLPE is proportional to the line current. The voltage at pin LN is: where: Iline= line current ICC = current consumption of the IC IP = supply current for external circuits ISUP = current consumed between LN and VEE by the VDD regulator. The preferred value for RSLPE is 20Ω . Changing RSLPE will affect more than the DC characteristics; it also influences the microphone and DTMF gains, the gain control characteristics, the sidetone level and the maximum output swing on the line. The DC line current flowing into the set is determined by the exchange supply voltage (V EXCH ), the feeding bridge resistance (REXCH ), the DC resistance of the telephone line (Rline) and the reference voltage (Vref). With line currents below 9 mA, the internal reference voltage (generating V ref) is automatically adjusted to a lower value. This means that more sets can operate in parallel with DC line voltages (excluding the polarity guard) down to an absolute minimum voltage of 1.45 V. At currents below 9 mA, the circuit has limited sending and receiving levels. This is called the low voltage area. V LN V ref R SLPE I×+ SLPE= ISLPE I= line ICC– IP– ISUP– handbook, full pagewidth C REG 4.7 µF R SLPE 20 Ω ISLPE MGK805 IlineR line VCC VEEREG SLPE LN VDD C VCC 100 µF C VDD 220 µF TEA1114A R CC ICCILN IP IDD ISUP R EXCH VEXCH peripherals external circuits from preamplifier VDD REGULATOR internal circuitry Fig.3 Supply configuration.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A THE INTERNAL SUPPL Y POINT (PIN VCC ) The internal circuitry of the TEA1114A is supplied from pin VCC . This voltage supply is derived from the line voltage by means of a resistor (RCC ) and must be decoupled by a capacitor CVCC . It may also be used to supply some external circuits. The VCC voltage depends on the current consumed by the IC and the peripheral circuits as: (see also Figs 4 and 5). Irecis the current consumed by the output stage of the earpiece amplifier. V CC0 V LN R CC ICC×–= V CC V CC0 R CC IP Irec+()×–= handbook, halfpage MGK806 Irec EXTERNAL CIRCUITS IP VEE VCC VCC0 R CC Fig.4 V CC used as supply voltage for external circuits. handbook, halfpage 12 4 3 MGL827 IP (mA) VCC (V) (2) (1) 1.9 mA 1.6 mA Fig.5 Typical current IP available from VCC for peripheral circuitry. VCC ≥ 2.5 V; VLN = 4.35 V at Iline= 15 mA; RCC = 619Ω ; R SLPE =2 0Ω . Curve (1) is valid when the receiving amplifier is driven: VQR(rms) = 150 mV; RL1 = 150Ω . Curve (2) is valid when the receiving amplifier is not driven. THE REGULATED SUPPL Y POINT (PIN VDD ) The VDD regulator delivers a stabilized voltage for the peripherals in transmission mode (nominal VLN ) as well as in ringer mode (VLN = 0 V). The regulator (see Fig.6) consists of a sense input circuit, a current switch and a VDD output stabilizer. The regulator operates as a current source at the LN input in transmission mode; it takes a constant current of 4.3 mA (at nominal conditions) from pin LN. The current switch reduces the distortion on the line at large signal swings. Output V DD follows the DC voltage at pin LN (with typically 0.35 V difference) up to V DD = 3.3 V. The input current of the regulator is constant while the output (source) current is determined by the consumption of the peripherals. The difference between input and output current is shunted by the internal V DD stabilizer. In ringer mode, the stabilizer operates as a shunt stabilizer to keep VDD at 3.3 V. In this mode, the input voltage VLN = 0 V while the input current into pin VDD is delivered by the ringing signal. VDD has to be decoupled by a capacitor CVDD .

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A handbook, full pagewidth MGK807 IlineR line VCC VEE LN VDD C VCC 100 µF C VDD 220 µF TEA1114A R CC ICC IDD ILN R EXCH VEXCH peripherals SENSE SWITCH VDD regulator ISUP Fig.6 VDD regulator configuration. Set impedance In the audio frequency range, the dynamic impedance is mainly determined by the RCC resistor. The equivalent impedance of the circuit is illustrated in Fig.7. Transmit stage (pins MIC+, MIC− and DTMF) M ICROPHONE AMPLIFIER (PINS MIC+ AND MIC −) The TEA1114A has symmetrical microphone inputs. The input impedance between pins MIC+ and MIC− is 64 kΩ (2× 32 kΩ ). The voltage gain from pins MIC+/MIC− to pin LN is set at 44.2 dB (typically). Automatic gain control is provided on this amplifier for line loss compensation. DTMF AMPLIFIER (PIN DTMF) When the DTMF amplifier is enabled, dialling tones may be sent on line. These tones are also sent to the receive output RX at a low level (confidence tone). The TEA1114A has an asymmetrical DTMF input. The input impedance between DTMF and V EE is 20 kΩ . The voltage gain from pin DTMF to pin LN is set at 26 dB. Automatic gain control has no effect on the DTMF amplifier. handbook, halfpage LN VEE SLPE R SLPE C REG REG V CC R CC 4.7 µF 100 µF C VCC 619 Ω 20 Ω R P Vref LEQ MBE788 Fig.7 Equivalent impedance between LN and VEE . LEQ =C REG × R SLPE × R P. R P = internal resistance. R P = 17.5 kΩ .

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A Receiving stage (pins IR, RX, GAR and QR) The receive part consists of a receive amplifier and an earpiece amplifier. THE RECEIVE AMPLIFIER (PINS IR AND RX) The receive amplifier transfers the receive signal from input IR to output RX. The input impedance of the receive amplifier, between pins IR and V EE ,i s2 0kΩ . The voltage gain from pin IR to RX is set at 33.4 dB. RX output is intended to drive high ohmic (real) loads. Automatic gain control is provided on the receive amplifier. T HE EARPIECE AMPLIFIER (PINS GAR AND QR) The earpiece amplifier is an operational amplifier having its output (QR) and inverting input (GAR) available. It can be used in conjunction with two resistors to get some extra gain or attenuation. In an usual configuration (see Fig.8), output RX drives the earpiece amplifier by means of R E1 connected between RX and GAR. Feedback resistor RE2 of the earpiece amplifier is connected between QR and GAR. Output QR drives the earpiece. The gain of the earpiece amplifier (from RX to QR) can be set between +12 and−14 dB by means of resistor R E2. The preferred value of RE1 is 100 kΩ . The earpiece amplifier offers a gain boost facility relative to the initial gain. Resistor RE2 has to be replaced by the network of RE21, RE22 and RE23 as shown in Fig.8. The initial gain is defined by: which corresponds to RE23 = ∞ . The gain boost is realized by a defined value of RE23 and is: Two external capacitors CGAR (connected between GAR and QR) and CGARS (connected between GAR and VEE ) ensure stability. The CGAR capacitor provides a first-order low-pass filter. The cut-off frequency corresponds to the time constant CGAR × R E2. The relationship C GARS =1 0× C GAR must be fulfilled to ensure stability. The output voltages of both amplifiers are specified for continuous wave drive. The maximum output swing depends on the DC line voltage VLN , the RCC resistor, the ICC current consumption of the circuit, the IP current consumption of the peripheral circuits and the load impedance. R E21 R E22+ R E1 R E21 R E22+ R E1 R E23 ×– handbook, full pagewidth MGK808 Iline R line VCC VEE VEE 0.5VCC QRLN GAR C GAR C GAR C GARS RX C VCC 100 µF 10 µF EARPIECE AMPLIFIER TEA1114A R CC R E2 R E1ICC R EXCH VEXCH R E23 R E21 R E1 100 kΩ R E22 RX GAR QR Addition for gain boost of earpiece amplifier C GARS Fig.8 Earpiece amplifier configuration.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A Automatic gain control (pin AGC) The TEA1114A performs automatic line loss compensation. The automatic gain control varies the gain of the microphone amplifier and the gain of the receive amplifier in accordance with the DC line current. The control range is 6.0 dB (which corresponds approximately to a line length of 5 km for a 0.5 mm diameter twisted-pair copper cable with a DC resistance of 176 Ω /km and an average attenuation of 1.2 dB/km). The IC can be used with different configurations of feeding bridge (supply voltage and bridge resistance) by connecting an external resistor R AGC between pins AGC and VEE . This resistor enables the Istartand Istopline currents to be increased (the ratio between Istartand Istopis not affected by the resistor). The AGC function is disabled when pin AGC is left open-circuit. Mute function (pin MUTE) The mute function performs the switching between the speech mode and the dialling mode. When MUTE is LOW, the DTMF input is enabled and the microphone and receive amplifier inputs are disabled. In this mode, the DTMF tones are sent to the receive output at a low level (confidence tone). When MUTE is HIGH, the microphone and receiving amplifiers inputs are enabled while the DTMF input is disabled. The MUTE input is provided with an internal pull-up current source to VCC . Sidetone suppression The TEA1114A anti-sidetone network comprising R CC // Zline, Rast1, Rast2, Rast3, RSLPE and Zbal (see Fig.9) suppresses the transmitted signal in the earpiece. Maximum compensation is obtained when the following conditions are fulfilled: The scale factor k is chosen to meet the compatibility with a standard capacitor from the E6 or E12 range for Z bal. In practice, Zlinevaries considerably with the line type and the line length. Therefore, the value of Zbalshould be for an average line length which gives satisfactory sidetone suppression with short and long lines. The suppression also depends on the accuracy of the match between Z bal and the impedance of the average line. The anti-sidetone network for the TEA1114A attenuates the receiving signal from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio frequency range. A Wheatstone bridge configuration (see Fig.10) may also be used. More information on the balancing of an anti-sidetone bridge can be obtained in our publication “Semiconductors for Wired Telecom Systems; Application Handbook, IC03b”. For ordering information please contact the Philips Semiconductors sales office. R SLPE R ast1× R CC R ast2( R ast3)+×= k R ast2 R ast3 R SLPE+()× Zbal kZ line×=

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A handbook, full pagewidth MBE787 Im Zir IR R ast1 R ast3 R ast2 SLPE R SLPE VEE Zline R CC LN Zbal Fig.9 Equivalent circuit of TEA1114A anti-sidetone bridge. handbook, full pagewidth MBE786 Im Zir IR Zbal R ast1 SLPE R SLPE VEE Zline R CC LN R A Fig.10 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). Note 1. Mostly dependent on the maximum required ambient temperature, on the voltage between LN and SLPE and on the thermal resistance between die ambient temperature. This thermal resistance depends on the application board layout and on the materials used. Figure 13 shows the safe operating area versus this thermal resistance for ambient temperature T amb =7 5°C. THERMAL CHARACTERISTICS Note SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VLN positive continuous line voltage V EE − 0.4 12 V repetitive line voltage during switch-on or line interruption VEE − 0.4 13.2 V IDD maximum input current at pin VDD − 75 mA Vn(max) maximum voltage on all pins except pin VDD VEE − 0.4 V CC + 0.4 V Iline line current R SLPE =2 0Ω ; see Figs 11 and 12 − 140 mA Ptot total power dissipation T amb =7 5°C; see Figs 11 and 12TEA1114A − 625 mW TEA1114AT − 416 mW TEA1114AUH; note 1 −− Tstg storage temperature −40 +125 °C Tamb ambient temperature −25 +75 °C Tj junction temperature − 125 °C SYMBOL PARAMETER CONDITIONS VALUE UNIT R th(j-a) thermal resistance from junction to ambient in free air; note 1 TEA1114A 70 K/W TEA1114AT 115 K/W TEA1114AUH tbf by customer application K/W

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A handbook, halfpage 21 2 150 110 468 ILN (mA) VLN - VSLPE (V) MGL212 (1) (2) (3) (4) Fig.11 DIP16 safe operating area (TEA1114A). (1) Tamb =4 5°C; Ptot= 1.000 W. (2) Tamb =5 5°C; Ptot= 0.875 W. (3) Tamb =6 5°C; Ptot= 0.750 W. (4) Tamb =7 5°C; Ptot= 0.625 W. handbook, halfpage 21 2 150 110 468 ILN (mA) VLN - VSLPE (V) MGL213 (1) (2) (3) (4) Fig.12 SO16 safe operating area (TEA1114AT). (1) Tamb =4 5°C; Ptot= 0.666 W. (2) Tamb =5 5°C; Ptot= 0.583 W. (3) Tamb =6 5°C; Ptot= 0.500 W. (4) Tamb =7 5°C; Ptot= 0.416 W.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A handbook, full pagewidth 160 120 2468 1 0 FCA161 Iline (mA) (2) (3) (1) (4) (5) (6) (7) VSLPE (V) LINE R th(j-a)(K/W) (1) 40 (2) 50 (3) 60 (4) 75 (5) 90 (6) 105 (7) 130 Fig.13 Safe operating area at Tamb =7 5°C (TEA1114AUH).

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A CHARACTERISTICS Iline= 15 mA; VEE =0V ;R SLPE =2 0Ω ; pin AGC connected to VEE ;Zline= 600Ω ; f = 1 kHz; measured according to test circuits given in Figs 15, 16 and 17; Tamb =2 5°C for TEA1114A(T); Tj=2 5°C for TEA1114AUHT; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply (pins LN, VCC , SLPE, REG and VDD ) THE LINE INTERFACE (PINS LN, SLPE AND REG) Vref stabilized reference voltage between pins LN and SLPE 3.9 4.15 4.4 V VLN DC line voltage I line=1m A − 1.45 − V Iline=4m A − 2 − V Iline= 15 mA 4.05 4.35 4.65 V Iline= 140 mA − 7.1 7.55 V VLN(Rext) DC line voltage with an external resistor RVA R VA = 44.2 kΩ (between pins LN and REG) − 3.6 − V ΔVLN(T) DC line voltage variation with temperature referred to 25°C Tamb = −25 to +75°C −± 40 − mV THE INTERNAL SUPPL Y POINT (PIN VCC ) ICC internal current consumption VCC = 3.6 V − 1.25 1.5 mA VCC supply voltage for internal circuitry IP =0m A − 3.6 − V THE REGULATED SUPPL Y POINT (PIN VDD ) ISUP input current of the VDD regulator (current from pin LN not flowing through pin SLPE) Iline=1m A − 0 − mA Iline=4m A − 2.15 − mA Iline≥ 11 mA − 4.3 − mA VDD regulated supply voltage in: speech mode I DD = −3 mA; VLN > 3.6 + 0.25 V (typ.); Iline≥ 11 mA 3.0 3.3 3.6 V speech mode at reduced performance Iline=4m A − VLN − 0.35 − V ringer mode I line= 0 mA; IDD = 75 mA 3.0 3.3 3.6 V IDD regulated supply current available in: speech mode I line≥ 11 mA −− − 3m A speech mode at reduced performance Iline=4m A −− 0.5 − mA trickle mode I line= 0 mA; VCC discharging; VDD = 1.2 V −− 100 nA

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A Transmit stage (pins MIC+, MIC− and DTMF) M ICROPHONE AMPLIFIER (PINS MIC+ AND MIC −) Zi input impedance differential between pins MIC+ and MIC− − 68 − kΩ single-ended between pins MIC+/MIC− and VEE − 34 − kΩ G v(TX) voltage gain from pins MIC+/MIC− to pin LN VMIC = 4 mV (RMS) 43.2 44.2 45.2 dB ΔG v(TX)(f) voltage gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz −± 0.2 − dB ΔG v(TX)(T) voltage gain variation with temperature referred to 25°C Tamb = −25 to +75°C −± 0.3 − dB CMRR common mode rejection ratio − 80 − dB VLN(max)(rms) maximum sending signal (RMS value) Iline= 15 mA; THD = 2% 1.8 2.15 − V Iline= 4 mA; THD = 10% − 0.35 − V Vno(LN) noise output voltage at pin LN psophometrically weighted (P53 curve); pins MIC+/ MIC− shorted through 200Ω −− 78 − dBmp DTMF AMPLIFIER (PIN DTMF) Zi input impedance − 21 − kΩ G v(DTMF) voltage gain from pin DTMF to pin LN VDTMF = 20 mV (RMS); MUTE = LOW 25 26 27 dB ΔG v(DTMF)(f) voltage gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz −± 0.2 − dB ΔG v(DTMF)(T) voltage gain variation with temperature referred to 25°C Tamb = −25 to +75°C −± 0.4 − dB G v(ct) voltage gain from pin DTMF to pin RX (confidence tone) VDTMF = 20 mV (RMS); R L2 =1 0kΩ ; MUTE = LOW −− 9.2 − dB Receiving stage (pins IR, RX, GAR and QR) THE RECEIVE AMPLIFIER (PINS IR AND RX) Zi input impedance − 21.5 − kΩ G v(RX) voltage gain from pin IR to pin RX VIR = 4 mV (RMS) 32.4 33.4 34.4 dB ΔG v(RX)(f) voltage gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz −± 0.2 − dB ΔG v(RX)(T) voltage gain variation with temperature referred to 25°C Tamb = −25 to +75°C −± 0.3 − dB VRX(max)(rms) maximum receiving signal on pin RX (RMS value) IP = 0 mA; sine wave drive; RL2 =1 0kΩ ; T H D=2 % 0.4 −− V SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A IRX(max) maximum source and sink current on pin RX (peak value) I P = 0 mA; sine wave drive 50 −− µ A Vno(RX)(rms) noise output voltage at pin RX (RMS value) pin IR open-circuit; R L2 =1 0kΩ ; psophometrically weighted (P53 curve) −− 86 − dBVp T HE EARPIECE AMPLIFIER (PINS GAR AND QR) G v(QR) voltage gain from pin RX to pin QR VIR = 4 mV (RMS); R E1 =R E2 = 100 kΩ − 0 − dB ΔG v(QR) voltage gain setting R E1 = 100 kΩ− 14 − +12 dB VQR(max)(rms) maximum receiving signal on pin QR (RMS value) IP = 0 mA; sine wave drive; RL1 = 150Ω ; T H D=2 % 0.3 0.38 − V IP = 0 mA; sine wave drive; RL1 = 450Ω ; T H D=2 % 0.46 0.56 − V Vno(QR)(rms) noise output voltage at pin QR (RMS value) IR open-circuit; R L1 = 150Ω ; R E1 =R E2 = 100 kΩ psophometrically weighted (P53 curve) −− 86 − dBVp R E1 = 100 kΩ ; R E2 =2 5kΩ −− 98 − dBVp Automatic gain control (pin AGC) ΔG v(trx) voltage gain control range for microphone and receive amplifiers with respect to I line=1 5m A Iline=8 5m A − 6.0 − dB Istart highest line current for maximum gain − 23 − mA Istop lowest line current for minimum gain − 59 − mA Mute function (pinMUTE) VIL LOW-level input voltage V EE − 0.4 − VEE + 0.3 V VIH HIGH-level input voltage V EE + 1.5 − VCC + 0.4 V IMUTE input current − 21 0 µA ΔG v(trx)(m) voltage gain reduction for: microphone amplifier MUTE = LOW − 80 − dB receive amplifier MUTE = LOW − 80 − dB earpiece amplifier MUTE = LOW − 80 − dB DTMF amplifier MUTE = HIGH − 80 − dB SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A TEST AND APPLICATION INFORMATION handbook, full pagewidth FCA002 R bal1 130 Ω R bal2 820 Ω R SLPE 20 Ω R ast2 3.92 kΩ R ast3 R prot 1N4004 392 Ω R CC 619 Ω R ast1 130 kΩ 4.7 µF C REG C MIC − R AGC Rz R E1 100 kΩ R TX1 R TX2 C DTMF C VDD 220 µF C GAR 100 pF C bal 220 nF 220 nF TEA1114A LN BA AB SLPE 100 µF C VCC Cz C IR 100 nF C MIC + REG IR AGC DTMFDTMF peripheral supply VDDVDD VEE MUTE MUTE VCC n.c. MIC − MIC − MIC + MIC + RX GAR VEE QR REC 1 nF C GARS 10 µF C EAR R E2 100 kΩ R TX3 D1 D2 Dz Vd 10 V C emc 10 nF D3 D4 Fig.14 Basic application of the TEA1114A IC.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A handbook, full pagewidth MGK809 VCC VDDLN VLN IR 100 nF TEA1114A R CC 619 Ω IDD mA ICC Iline Iline Zline MIC − MIC + DTMF QR GAR RX C REG 4.7 µF R SLPE 20 Ω R L2 10 kΩ 100 µF 220 nF600 Ω REG AGC SLPE VEE MUTE 10 µF C VDD 220 µF C VCC 100 µF C GARS C GAR R L1 R E1 100 kΩ R E2 VO VMIC VDTMF Fig.15 Test figure for defining transmit gains. Voltage gain defined as Gv = 20 log ; V I=V MIC or VDTMF . Microphone gain: S1 = open. DTMF gain and confidence tone: S1 = closed. Inputs not being tested should be open-circuit. V O V I

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A handbook, full pagewidth MGK810 VCC VDDLN VLN IR 100 nF TEA1114A R CC 619 Ω IDD 3 mA ICC Iline Iline Zline MIC − MIC + DTMF QR GAR RX C REG 4.7 µF R SLPE 20 Ω R L2 10 kΩ 100 µF 220 nF 600 Ω REG AGC SLPE VEE MUTE 10 µF C VDD 220 µF C VCC 100 µF C GARS C GAR R L1 R E1 100 kΩ R E2 VI VRX VQR Fig.16 Test figure for defining receive gains. Voltage gain defined as Gv = 20 log ; V O =V QR or VRX .V O V I Inputs not being tested should be open-circuit. handbook, full pagewidth MGK811 VCC VDDLN IR 10 µF TEA1114A R CC 619 Ω IDDVCC VDD MIC − MIC + DTMF QR GAR RX C REG 4.7 µF R SLPE 20 Ω REG AGC SLPE VEE MUTE Fig.17 Test figure for defining regulated supply (VDD ) performance in ringer and trickle mode. Inputs not being tested should be open-circuit.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A BONDING PAD LOCATIONS FOR TEA1114AUH All x/y coordinates represent the position of the centre of the pad (inµm) with respect to the origin (x/y = 0/0) of the die (see Fig.18). The size of all pads is 80µm × 80 µm. SYMBOL PAD COORDINATES xy LN 1 99 365.7 SLPE 2 126 99 REG 3 377 99 IR 4 639 99 AGC 5 869 99 DTMF 6 1162 99 V DD 7 1343 104 MUTE 8 1366 333 QR 9 1366 531 n.c. 10 1366 1010 V EE 11 1370 1160 n.c. 12 1219.5 1160 GAR 13 1045 1160 RX 14 782.5 1160 MIC+ 15 357.5 1160 MIC − 16 141.5 1160 V CC 17 99 963.5 n.c. 18 99 764 LN 19 99 570 handbook, full pagewidth DTMF MUTE IR AGC MICM MICP VEERX QR GAR VCC VDD LN LN SLPE n.c. REG n.c. n.c. 4 5 6 14 1213 2 7 FCA158 x y 0,0 Fig.18 TEA1114AUH bonding pad locations.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A PACKAGE OUTLINES REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ SOT38-4 92-11-17 95-01-14 M H c (e )1 M E A L seating plane w M e D A 2 Z E pin 1 index b 0 5 10 mm scale Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. UNIT A max. 12 b1 (1) (1) (1) b2 cD E e M ZHL mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) A min. A max. b max.wM Ee1 1.73 1.30 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 7.80 10.0 inches 0.068 0.051 0.021 0.015 0.014 0.009 1.25 0.85 0.049 0.033 0.77 0.73 0.26 0.24 0.14 0.31 0.39 DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A X w M θ AA 1 A 2 bp D H E Lp Q detail X E Z e c L v M A (A )3 A y pin 1 index UNIT A max. A 1 A 2 A 3 bp cD (1) E (1) (1)eH E LL p QZ ywv θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.0 0.4 SOT109-1 97-05-22 99-12-27 076E07 MS-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.050 1.05 0.0410.244 0.228 0.028 0.020 0.028 0.0120.01 0.25 0.01 0.0040.039 0.016 0 2.5 5 mm scale SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A SOLDERING Introduction This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Through-hole mount packages S OLDERING BY DIPPING OR BY SOLDER WAVE The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T stg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. M ANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300°C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400°C, contact may be up to 5 seconds. Surface mount packages R EFLOW SOLDERING Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250°C. The top-surface temperature of the packages should preferable be kept below 230°C. W AVE SOLDERING Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:

• Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave.
• For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis ispreferred to be parallel to the transport direction of the printed-circuit board; – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
• For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250°C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. M ANUAL SOLDERING Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320°C.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A Suitability of IC packages for wave, reflow and dipping soldering methods Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. MOUNTING PACKAGE SOLDERING METHOD WAVE REFLOW (1) DIPPING Through-hole mount DBS, DIP , HDIP , SDIP , SIL suitable (2) − suitable Surface mount BGA, SQFP not suitable suitable − HLQFP , HSQFP , HSOP , HTQFP , HTSSOP , SMS not suitable(3) suitable − PLCC (4), SO, SOJ suitable suitable − LQFP , QFP , TQFP not recommended (4)(5) suitable − SSOP , TSSOP , VSO not recommended (6) suitable −

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A DEFINITIONS LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. BARE DIE DISCLAIMER All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There is no post waffle pack testing performed on individual die. Although the most modern processes are utilized for wafer sawing and die pick and place into waffle pack carriers, Philips Semiconductors has no control of third party procedures in the handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used. Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

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Philips Semiconductors Product specification Low voltage telephone transmission circuit with dialler interface and regulated strong supply TEA1114A NOTES

© Philips Electronics N.V. SCA All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Internet: http://www.semiconductors.philips.com 2000 69 Philips Semiconductors – a worldwide company For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria:Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil:see South America Bulgaria:Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre,

72 Tat Chee Avenue, Kowloon Tong, HONG KONG,

Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstraße 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia:PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy:PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SÃO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 3341 299, Fax.+381 11 3342 553 Printed in The Netherlands 403502/04/pp28 Date of release:2000 Mar 21 Document order number: 9397 750 06729