TCM8230MD TOSHIBA | Alldatasheet
Document overview
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Technical content
Features
- General
- Module size : 6(W) x 6(D) x 4.5(H) mm
- I 2C BUS I/F
- Sleep mode operation (It c an be controlled by the I2C Bus command) 2. Sensor
- Optical size : 1/6 inch optical format
- Total pixel numbers : 698(H)x502(V)
- Signal pixel numbers : 660(H)x492(V)
- Pixel pitch : 3.75um(H)x3.75um(V) (square pixel)
- Color filter : RGB color filter, Ba yer arrangement (GR line and GB line are arranged alternately.)
- F r a m e r a t e : M a x 3 0 f p s
- Raw data bit precision : 10bit
- Feed back clamp 3. Camera signal processing
- Maximum exposure time can be adjust from 1V to 15V
- Digital outputs YUV=4:2:2 or RGB=5:6:5 ( 8bit parallel output )
- Picture size VGA, QVGA, QQVGA, CIF, QCIF, subQCIF ( Sub-sampling , Windowing )
- Readout internal parameters Sensor gain setting, Electrical shutter exposure period, ALC and AWB reference value
- Auto electrical shutter control (AES), auto gai n control (AGC) and auto white balance (AWB) circuit
- Flickerless auto luminance control (ALC =AES+AGC) and auto flicker detection circuit for AC 50Hz / 60Hz fluorescent light
- Automatically blemish correction
- Vertical and Horizontal flip mode TOSHIBA is continual ly working to improve the quali ty and the reli abili ty of its products. Neverthel ess, semiconductor devi ces in general can malfunction or jail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utili zing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within speci fied operating range as set forth in the most recent products speci f ications. Also, please keep in mind the precautions and conditions set f orth in the TOSHIBA Semiconductor Reliabilit y Handbook. The products described in this document are subject to f oreign exchange and f oreign trade control laws. The information contained herein is presented only as a guide for the applications of our products. No responsi bili ty is assum ed by TOSHIBA CORPORATION for any infri ngements of intell ectual pr operty or other rights of the third parti es which may r esult from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. The inf ormation contained herein is subject to change without notice.
TCM8230MD (A) Ver. 1.20 04/01/05 2/27 UPDATE INFORMATION Ver. 1.20 Jan-05, 2004 Ver. 1.10 Dec-23, 2003 Ver. 1.09 Dec-16, 2003 Ver. 1.08 Oct-29, 2003 Ver. 1.07 Oct-07, 2003 Ver. 1.06 Sep-19, 2003 Ver. 1.05 Sep-08, 2003 Ver. 1.04 Aug-11, 2003 Ver. 1.03 Jul-31, 2003 Ver. 1.02 Jul-16, 2003 Ver. 1.01 Jul-03, 2003 Ver. 1.00 Jun-25, 2003
TCM8230MD (A) Ver. 1.20 04/01/05 3/27 BLOCK DIAGRAM TCM8230MD Double Lens VGA CMOS Sensor Image Area CDS / AGC ADC TG / SG Signal Processing I2C bus I/F Connecting terminals Host system SDA SCL EXTCLK DOUT0 to DOUT7 DCLK IOVSS AWB ALC HD VD RESETPVDD IOVDD (2.8V) DVSS AVSSDVDD (1.5V) CDS : Correlated Double Sampling AGC : Automatic Gain Control ADC : Analog to Degital Converter TG : Timing pulse Generator SG : Sync pulse Generator AWB : Auto White Balance ALC : Auto Luminance Control
TCM8230MD (A) Ver. 1.20 04/01/05 4/27 PIN LAYOUT 12345 DVSS TOP (Lens side) view TCM8230MD PVDD EXTCLK RESET SCL SDA DVDD VD HD DCLK DOUT7 IOVSS DOUT0 DOUT1 DOUT2 DOUT3 DOUT6 DOUT5 DOUT4 IOVDD Orientation 1514131211
TCM8230MD (A) Ver. 1.20 04/01/05 5/27 PIN FUNCTIONS No. NAME I/O FUNCTION 1 PVDD - VDD for sensor (photo diode) ( 2.8V )
2 EXTCLK I Clock for external input
3 RESET I RESET terminal ("L" active)
4S C L I Clock for I2C-bus command 5S D A I / O Data for I2C-bus command VDD for digital circuits, (1.5V ) VDD for sensor (A/D converter) (1.5V ) GND for digital circuits GND for sensor (A/D converter) GND for sensor (photo diode)
8 VD O Vertical syncronization pulse output
9 HD O Holizontal syncronization pulse output
10 DCLK O Clock for output data
11 DOUT0 O Data output (LSB)
12 DOUT1 O Data output
13 DOUT2 O Data output
14 DOUT3 O Data output
15 IOVSS - GND for I/O
16 IOVDD - VDD for I/O ( 2.8V )
17 DOUT4 O Data output
18 DOUT5 O Data output
19 DOUT6 O Data output
20 DOUT7 O Data output (MSB)
-DVSS7
TCM8230MD (A) Ver. 1.20 04/01/05 6/27 INTERFACE CIRCUITS NAME I/O INTERFACE CIRCUIT EXTCLK I RESET ("L" active) I SCL I SDA I/O DOUT0 to DOUT7, HD, VD, DCLK O PIN No. 8-14, 17-20 IOVDD GND GND IOVDD IOVDD IOVDD GND GND GND GND IOVDD IOVDD IOVDD IOVDD GND GND GND IOVDD IOVDD GND GND IOVDD GND GND GND
TCM8230MD (A) Ver. 1.20 04/01/05 7/27 PIXEL ARRANGEMENT 1. V_INV=0 B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr1 487 488 489 490 491 492 Dummy pixels OB 44pixels Signal pixels@660pixels Light shielded pixels 2pixels 655 656 657 658 659 660 Signal pixels@494pixels Vertical HorizontalStart pixel OB: Optical Black R: Red pixels Gr,Gb: Green pixels B: Blue pixels 2. V_INV =1 (Vertical flip mode) B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr B Gb RGr 487 488 489 490 491 492 Dummy pixels OB 44pixels Signal pixels@660pixels Light shielded pixels 2pixels 655 656 657 658 659 660 Signal pixels@494pixels Vertical Horizontal Start pixel OB: Optical Black R: Red pixels Gr,Gb: Green pixels B: Blue pixels
TCM8230MD (A) Ver. 1.20 04/01/05 8/27 CONTROL I/F TCM8230MD(A) control interface configuration is based on fast mode I2C bus. Register setting can be changed via I 2C bus. All register settings are able to read via I2C bus. Slave AddressS 0 A Sub Address A Data 1 Data n A P MSB 7bit 8bit 8bit 8bit Write mode Slave AddressS 0 A Sub Address A Data 1 Data n A P MSB 7bit 8bit 8bit 8bit Read mode Slave AddressS 1 A A MSB 7bit : Host Command : TCM8230MD(A) S P A : Start condition : End condition : Acknowledge Start condition, End condition Bit Transfer Acknowledge Slave address * TCM8230MD(A) use 7bit Slave address Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. SPSCL SDA Start condition End conditon S SCL from master SDA from reciver HiZ SDA from trancemitter 18 9 HiZ SCL SDA data line stable ; data valid change of data allowed A6 A5 A4 A3 A2 A1 A0 R/W
TCM8230MD (A) Ver. 1.20 04/01/05 9/27 INTERNAL REGISTER ADDRESS fast last DEC BIN HEX BIT7(MSB) BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0(LSB) B7B6B5B4 B3B2B1B0 HEX 0 0000000 0 00 0111 0000 70 1 0000000 1 01 0001 0000 10 2 0000001 0 02 FPS 0:30fps 1:15fps ACF 0:50Hz 1:60Hz DCLKP 0 : normal 1: reverse ACFDET 0 : AUTO 1: MANUAL 1100 0 000 40 3 0000001 1 03 DOUTSW 0:ON 1:0FF DATAHZ 0:OUT 1:Hi-Z PICFMT 0:YUV422 1:RGB565 CM 0:COLOR 1:B/W 0 00 0 0 0 80 4 0000010 0 04 V_INV 0:normal 1:invert H_INV 0:normal 1:invert 0000 1111 5 0000010 1 05 ALCSW 0:AUTO 1:MANUAL 0000 0010 02 6 0000011 0 06 0000 1101 0D 7 0000011 1 07 11 00 0000 C0 8 0000100 0 08 0011 1000 38 9 0000100 1 09 0 100 0000 40 10 0000101 0 0A AWBSW 0:AUTO 1:MANUAL 0 000 0000 00 11 0000101 1 0B 0100 0000 40 12 0000110 0 0C 0 100 0000 40 13 0000110 1 0D GAMSW 0:ON 1:OFF 000 0 0000 00 14 0000111 0 0E 0010 1111 2F 15 0000111 1 0F 0000 0100 04 16 0001000 0 10 0010 0010 22 17 0001000 1 11 1001 1010 9A 18 0001001 0 12 0 000 1100 0C 19 0001001 1 13 0 000 1010 0A 20 0001010 0 14 00 00 1000 08 21 0001010 1 15 0011 1000 38 22 0001011 0 16 0011 1000 38 23 0001011 1 17 0000 0001 01 24 0001100 0 18 0010 0111 27 25 0001100 1 19 MHMODE MHLPFSE L 0: 0000 0100 04 26 0001101 0 1A 0010 0000 20 27 0001101 1 1B LENSRPO L 0:Gain up 1:Gain down 0100 0110 46 28 0001110 0 1C 1001 1110 9E 29 0001110 1 1D 1000 0011 83 30 0001111 0 1E CODESW 0:OFF 1:OUT CODESEL 0 : original 1 : ITU656 HSYNCSEL 0 : normal 1 : TESPIC 0:Not out 1:Out 0110 1000 68 31 0001111 1 1F SLEEPSW 0:ACTIVE 1:SLEEP SRST 0:OFF 1:reset 0000 0000 00 default(ROM data) V_LENGTH[3:0] ESRLSW[1:0] 0h : Short 1h : Long 2h & 3h : PICSIZ[3:0] 0h:VGA 1h:QVGA(f) 2h:QVGA(z) 3h:QQVGA(f) 4h:QQVGA(z) 5h:CIF(f) 6h:QCIF(f) 7h:QCIF(z) 8h:subQCIF(f) 9h:subQCIF(z) Test Mode ESRSPD[12:8] MBG[7:0] ALCL[7:0] ALCMODE[1:0] 0h:Centaer Weight 1h:Average 2h:Center only 3h:Backlight ESRLIM[1:0] ALCH[3:0] AG[7:0] ESRSPD[7:0] HDTG[7:0] MRG[7:0] CONT[7:0] VDTG[7:0] VDTCORE[3:0] SATU[6:0] PICSEL[1:0] 0h:Colorbar@1h:Ramp1 2h :Ramp2 ES100S[7:0] VGAIN[5:0] UGAIN[5:0] UVCORE[3:0] MIXHG[2:0] ES120S[7:0] D_MASK[1:0] YMODE[1:0] LENS[5:0] LENSRGAIN[3:0] BRIGHT[7:0] UHUE[6:0] AGLIM[2:0] VHUE[6:0] HDTCORE[3:0] The registers of gray mesh (unassigned registers) are not defined. Input data of the registers of gray mesh must input “0”. The registers of testmode must input default data.
TCM8230MD (A) Ver. 1.20 04/01/05 10/27 ADDRESS fast last DEC BIN HEX B I T 7 ( M S B ) B I T 6B I T 5B I T 4B I T 3B I T 2B I T 1 B I T 0 ( L S B ) B7B6B5B4 B3B2B1B0 HEX 32 0010000 0 20 00000000 00 33 0010000 1 21 00000001 01 34 0010001 0 22 HPPH[8] 00100110 26 35 0010001 1 23 01000000 40 36 0010010 0 24 HDSPPH[8] 00100111 27 37 0010010 1 25 01011111 5F 38 0010011 0 26 HAPRPH[8] 00000000 00 39 0010011 1 27 00010110 16 40 0010100 0 28 HOUTPH[8] 00100011 23 41 0010100 1 29 FSSTBSW 0 : NOT OUT 1:O U T FSSTBPOL 0 : normal 1 : invert 00001000 08 42 0010101 0 2A 00001000 08 43 0010101 1 2B 00000100 04 44 0010110 0 2C 00000000 00 45 0010110 1 2D 00000000 00 46 0010111 0 2E TCSB1L TCSBIN TCRAM 00000000 00 47 0010111 1 2F TCRAMS TSPCHK TCPERAGC TALCRST TWBS TWBG 00000000 00 48 0011000 0 30 TGAMROM 00000000 00 49 0011000 1 31 TALCDISP 00000000 00 50 0011001 0 32 00000000 00 51 0011001 1 33 00000000 00 52 0011010 0 34 00000000 00 53 0011010 1 35 00000000 00 54 0011011 0 36 00000000 00 55 0011011 1 37 00000000 00 56 0011100 0 38 00000000 00 57 0011100 1 39 10001100 8C 58 0011101 0 3A 11001111 CF 59 0011101 1 3B 10000000 80 60 0011110 0 3C 00000000 00 61 0011110 1 3D ALCLOCK FPSLNKS W 00010111 17 62 0011111 0 3E SHESRSW 0:Disable 1:Enable ESLIMSEL SHESRSPD[1:0] 1 0 0 0 0 1 0 1 85 63 0011111 1 3F 11000000 C0 AGSLOW1[1:0] AGSLOW2[1:0] SCMD[7:0] SCMD[15:8] SCMD[19:16] default HDSPPH[7:0] VDSPPH[6:0] REJHLEV[7:0] DG[5:0] ACDETNC[3:0] AGMIN[7:0] ALCSPD[1:0] ELSTART[1:0]ELSTEP[1:0] REJH[1:0] HNUM[7:0] HPPH[7:0] VRRPH[6:0] FSSTBPH[3:0] FSSTBW[3:0] HAPRPH[7:0] HOUTPH[7:0] VOUTPH[6:0] ALCSTEP[1:0] TCPEROSW [2:0] TROM[1:0] DETSEL[3:0] FLLSMODE[1:0] FLLSLIM[3:0] ALCDATA[7:0] AWBRYDA[7:0] TCSB[3:0] TACDET[1:0] DGOUT[5:0] AGOUT[7:0] ESROUT[7:0] ESROUT[14:8] AWBBYDA[7:0] TALCOSW[2:0] PBDISP[1:0] TDISP[1:0] The registers of gray mesh (unassigned registers) are not defined. Input data of the registers of gray mesh must input “0”. The registers of testmode must input default data.
TCM8230MD (A) Ver. 1.20 04/01/05 11/27 ADDRESS fast last DEC BIN HEX B I T 7 ( M S B ) B I T 6B I T 5B I T 4B I T 3B I T 2B I T 1 B I T 0 ( L S B ) B7B6B5B4 B3B2B1B0 HEX 64 0100000 0 40 LI1POL CS1POL LI3POL CS3POL DINCKSW 0000 00 00 00 65 0100000 1 41 JAMP 0000 0000 00 66 0100001 0 42 0 000 0000 00 67 0100001 1 43 0 000 0000 00 68 0100010 0 44 0 001 0101 15 69 0100010 1 45 0 001 1111 1F 70 0100011 0 46 0000 0000 00 71 0100011 1 47 0100 0100 44 72 0100100 0 48 0100 0100 44 73 0100100 1 49 0 01 00 0 0 0 20 74 0100101 0 4A 0100 0101 45 75 0100101 1 4B 0110 0110 66 76 0100110 0 4C 0011 0000 30 77 0100110 1 4D HDTCSW VDTCSW 1 110 0000 E0 78 0100111 0 4E HDTPSW VDTPSW 0 010 0000 20 79 0100111 1 4F LI12POL CS12POL DTLLIMSW 0 000 1001 09 80 0101000 0 50 YLCUTLMS K 0: 0 000 0111 07 81 0101000 1 51 YLCUTHM SK 0: 0 010 1111 2F 82 0101001 0 52 0 000 0010 02 83 0101001 1 53 0 000 0000 00 84 0101010 0 54 001 01 0 1 1 2B 85 0101010 1 55 01 10 0000 60 86 0101011 0 56 AWBCSPO LE WBDIVCLP WBNOLJS C 0: WB2IM1 01 00 0000 40 87 0101011 1 57 0000 0110 06 88 0101100 0 58 ALLAREA WBLOCK 0 0 10 0 0 10 22 89 0101100 1 59 KIZUSW 0:OFF 1:ON PBRDSW 0010 0 0 11 23 90 0101101 0 5A 0000 1000 08 91 0101101 1 5B 0000 0100 04 92 0101110 0 5C 0 0001 000 08 93 0101110 1 5D 00 00 1000 08 94 0101111 0 5E 000010 00 08 default PRERG[5:0] MSKGB[6:0] MSKRB[6:0] MSKBR[6:0] MSKGR[6:0] WBDIVSC[2:0] MSKBG[6:0] DTCYLV[5:0] DTCGAIN[5:0] MSKRG[6:0] WB2SP [3:0] YLCUTL[5:0] YLCUTH[5:0] JAMG[6:0] PREBG[5:0] PREGRG[5:0] PREGBG[5:0] PBC2LV[7:0] PBC3LV[7:0] PBC4LV[7:0] PBC1LV[7:0] PBDLV[7:0] ABCSW[1:0] WBGMIN[7:0] WBGMAX[7:0] WBNOLJ[1:0] DTLYLIM [3:0] WBSPDUP[1:0] UVLJ[6:0] UVSKNC[6:0] The registers of gray mesh (unassigned registers) are not defined. Input data of the registers of gray mesh must input “0”. The registers of testmode must input default data.
TCM8230MD (A) Ver. 1.20 04/01/05 12/27 OUTLINE OF INTERNAL REGISTER * Frame rate setting (30fps, 15fps ) * Picture size setting of digital output ( VGA, QVGA, QQVGA, CIF, QCIF, subQCIF ) * Selection of digital data output format (8bit YUV422, RGB565) * Sync. code setting ( ON/OFF, 2 mode ) * Color signal adjustment ( Masking, color axis correction, saturation, etc. ) * Luminance signal adjustment ( Contrast, Brightness, Gamma, H,V edge enhancement ) * ALC ON/OFF * ALC mode setting ( area selection, speed selection, flicker reduction mode setting ) * AWB ON/OFF * Vertical and Horizontal flip * Sleep mode setting * Some kinds of correction setting ( Lens shading correction etc. ) 8bit parallel image data 1st 2nd 3rd 4th 1st 2nd DOUT0 U0(n) Y0(n) V0(n) Y0(n+1) B0 G3 DOUT1 U1(n) Y1(n) V1(n) Y1(n+1) B1 G4 DOUT2 U2(n) Y2(n) V2(n) Y2(n+1) B2 G5 DOUT3 U3(n) Y3(n) V3(n) Y3(n+1) B3 R0 DOUT4 U4(n) Y4(n) V4(n) Y4(n+1) B4 R1 DOUT5 U5(n) Y5(n) V5(n) Y5(n+1) G0 R2 DOUT6 U6(n) Y6(n) V6(n) Y6(n+1) G1 R3 DOUT7 U7(n) Y7(n) V7(n) Y7(n+1) G2 R4 YUV mode RGB mode Image size format Image size Display modePixels per H Effective H lines Start point (H, V) End point (H, V) DCLK mode Operation mode Resizing method VGA Full 640 480 (1, 1) (640 ,480) 1 Normal - Full (1, 1) (639, 479) 1/2 Low power Sub-sampling from VGA Zoom x 2 (161, 121) (480 ,360) 1 Normal Windowing from VGA Full (1, 1) (637, 477) Sub-sampling from QVGA(f) Zoom x 2 (161, 121) (479, 359) Sub-sampling from VGA CIF Full 352 288 (21, 1) (608, 478) 1 Normal 3/5 filtering from VGA Full (21, 1) (608, 478) 1/2 Low power 3/5 filtering from QVGA(f) Zoom x 2 (173, 121) (466, 360) 1 Normal Windowing from CIF Full (1, 1) (636, 476) 4/5 filtering from QQVGA(f) Zoom x 2 (161, 121) (479, 359) 1st: 3/5 filtering from QVGA(f) 2nd: Sub-sampling from "1st" QVGA(f) means QVGA full. QQVGA(f) means QVGA full. VGA Video Graphics Array QVGA Quarter VGA QQVGA Quarter QVGA CIF Common Intermediate Format QCIF Quarter CIF 240 120 subQCIF 160 1/2 Low power Low Power 176 96128 1/2 144 320QVGA QQVGA QCIF
TCM8230MD (A) Ver. 1.20 04/01/05 13/27 SYNCHRONIZATION CODE Synchronization code output format CODESW=1 CODESW(Address=1Eh, Bit5) is able to add sync hronization codes. “Code“ part is changed Mode1 or Mode2 by CODESEL(Address=1Eh, Bit4). Mode1 iOriginal format, CODESEL=0j These codes only exists in active lines Frame Start Active Line 1 Line End Line Start Active Line 480 (VGA) Frame End Code Code Code Code Code Code Active Line 2 Line End Line Start Code Picture Code Line start code : FFh 00h 00h 00h Line end code : FFh 00h 00h 01h Frame start code : FFh 00h 00h 02h Frame end code : FFh 00h 00h 03h Line 1 Line 2 Line 3 Line 4 Line 480 (VGA) Line 240 (QVGA) Line 120 (QQVGA) Line 288 (CIF) Line 144 (QCIF) Line 96 (subQCIF) 02 01 Blanking Blanking Blanking Blanking 640 pixels (VGA) 320 pixels (QVGA) 160 pixels (QQVGA) 352 pixels (CIF) 176 pixels (QCIF) 128 pixels (subQCIF) FFh DCLK DOUT7\`0 00h 00h Code
TCM8230MD (A) Ver. 1.20 04/01/05 14/27 Mode2 (ITU656 format, CODESEL=1) These codes exists in every lines 1 0 V H 0 0 00Code V : 1:Blanking 0:Active Line H : 1:End of Active Pixel 0:Start of Active Pixel Code Picture Code Blanking and start active pixel code : FFh 00h 00h A0h Blanking and endactive pixel code : FFh 00h 00h B0h Active line and start active pixel code : FFh 00h 00h 80h Active line and end active pixel code : FFh 00h 00h 90h Line 1 Line 2 Line 3 Line 4 80 90 Blanking Blanking Blanking BlankingA0 Line 480 (VGA) Line 240 (QVGA) Line 120 (QQVGA) Line 288 (CIF) Line 144 (QCIF) Line 96 (subQCIF) 640 pixels (VGA) 320 pixels (QVGA) 160 pixels (QQVGA) 352 pixels (CIF) 176 pixels (QCIF) 128 pixels (subQCIF)
TCM8230MD (A) Ver. 1.20 04/01/05 15/27 DATA OUTPUT TIMING CHART TCM8230MD supports 2 HD pulses, one is “Blank ing pulse”, and another one is “Normal pulse”. You can choose HD pulse by HSYNCSEL (Address=1Eh Bit3). Pixel Size mode (HD=Blanking pulse) 1. Vertical timing (HSYNCSEL=1) Normal operation mode (VGA, CIF(full), QVGA(zoom), QCIF(zoom)) 478123HD VD 479 480 12 23812 3 239 240 12 12 3 12 12 3 287 288 12 VGA full QVGA zoom QCIF zoom CIF full 286 143 144 507 lines 18 lines 143 45 6 1 frame Low power operation mode (QVGA(full), QQVGA(full), QQVGA(zoom), QCIF(full), subQCIF(full), subQCIF(zoom)) 1 23HD VD 9 lines 12 4 1 3 96 412 3 5 QVGA full QQVGA full subQCIF full QCIF full 12QQVGA zoom 12subQCIF zoom 142 143 144 119 120 120119 238 239 240 34 56 4 56 7 1 frame 254 lines
TCM8230MD (A) Ver. 1.20 04/01/05 16/27 2. Horizontal timing (HSYNCSEL=1) Normal operation mode (VGA, CIF (full), QVGA (zoom), QCIF (zoom)) 352 cycles of DCLK (176 PIXEL) 640 cycles of DCLK (320 PIXEL) 704 cycles of DCLK (352 PIXEL) QVGA zoom QCIF zoom CIF full 350 HD 351 352Data 318 HD 319 320Data 174 HD 175 176Data 920 cycles of DCLK Blanking Y=0x00, UV=0x80 HNUM=0 856 cycles of DCLK 638 HD VD 1280 cycles of DCLK (640 PIXEL) 639 640 VGA full Data 156.5 cycles of DCLK 280 cycles of DCLK DCLK (DCLKP=0) blanking blanking blanking blanking blanking blanking blanking blanking 1208 cycles of DCLK 2 31 2 31 2 31 2 31 2 31 2 31 2 31 2 31 1 line Low power operation mode (QVGA(full), QQVGA(full), QQVGA(zoom), QCIF(full), subQCIF(full), subQCIF(zoom)) 1208 cycles of DCLK QVGA full QQVGA full/zoom subQCIF full/zoom QCIF full HD 640 cycles of DCLK (320 PIXEL) Data HD 352 cycles of DCLK (176 PIXEL) Data HD Data 320 cycles of DCLK (160 PIXEL) HD Data VD 920 cycles of DCLK 1240 cycles of DCLK 1304 cycles of DCLK 156.5 cycles of DCLK DCLK (DCLKP=0) 1blanking 2 3 1 2 3blanking blanking 1 2 3 blanking 1 2 3 blanking blanking blanking blanking 3 4 318 319 320 175 176 160 128 159 Blanking Y=0x00, UV=0x80 256 cycles of DCLK (128 PIXEL) 1 line
TCM8230MD (A) Ver. 1.20 04/01/05 17/27 Pixel Size mode (HD=Normal pulse) 1. Vertical timing (HSYNCSEL=0) Normal operation mode (VGA, CIF(full), QVGA(zoom), QCIF(zoom)) 47812 3HD VD 479 480 1 2 23812 3 239 240 12 1 2 3 287 288 12 VGA full QVGA zoom QCIF zoom CIF full 286 143 144 507 lines 18 lines 143 456 1 frame 1 2 3 45 6 7 Low power operation mode (QVGA(full), QQVGA(full), QQVGA(zoom), QCIF(full), subQCIF(full), subQCIF(zoom)) 123HD VD 9 lines 12 4 412 3 5 QVGA full QQVGA full subQCIF full QCIF full 12QQVGA zoom 12subQCIF zoom 142 143 144 119 120 120119 238 239 240 34 56 4567 1 frame 254 lines 12 43
TCM8230MD (A) Ver. 1.20 04/01/05 18/27 2. Horizontal timing (HSYNCSEL=0) Normal operation mode (VGA, CIF (full), QVGA (zoom), QCIF (zoom)) QVGA zoom QCIF zoom CIF full 350 HD 351 352DOUT 318 HD 319 320DOUT 174 HD 175 176DOUT Blanking Y=0x00, UV=0x80 HNUM=0 638 HD VD 1404 cycles of DCLK 639 640 VGA full DOUT 156 cycles of DCLK DCLK (DCLKP=0) blanking blanking blanking blanking blanking blanking blanking blanking 2 31 2 31 2 31 2 31 2 31 2 31 2 31 2 31 1 line 156.5 cycles of DCLK 156 cycles of DCLK 1404 cycles of DCLK 156 cycles of DCLK 156 cycles of DCLK 1404 cycles of DCLK 156 cycles of DCLK 156 cycles of DCLK 1404 cycles of DCLK 156 cycles of DCLK 156 cycles of DCLK Low power operation mode (QVGA(full), QQVGA(full), QQVGA(zoom), QCIF(full), subQCIF(full), subQCIF(zoom)) QVGA full QQVGA full/zoom subQCIF full/zoom QCIF full HD 1404 cycles of DCLK DOUT HD DOUT HD DOUT HD DOUT VD 156.5 cycles of DCLK DCLK (DCLKP=0) 1blanking 2 3 1 2 3blanking blanking 1 2 3 blanking 1 2 3 blanking blanking blanking blanking 3 4 318 319 320 175 176 160 128 159 Blanking Y=0x00, UV=0x80 HNUM=0 1 line 156 cycles of DCLK 156 cycles of DCLK 1404 cycles of DCLK 156 cycles of DCLK 156 cycles of DCLK 1404 cycles of DCLK 156 cycles of DCLK 156 cycles of DCLK 1404 cycles of DCLK 156 cycles of DCLK 156 cycles of DCLK
TCM8230MD (A) Ver. 1.20 04/01/05 19/27 Exposure mode TCM8230MD supports long exposure time mode (ESRLS W (Address=04h, Bit5,4)= 1) and extra-long exposure time mode (ESRLSW (Address=04h Bit5,4)= 2, 3). Vertical timing Normal mode Long exp. mode Extra-long exp. mode 1st frame 2nd frame 3rd frameData VD 2nd frame1st frameData VD 1st frame 2nd frame 3rd frameData VD blanking blanking blanking blanking blanking blanking blanking ESRLSW=0 ESRLSW=1 ESRLSW=2,3 V_LENGTH=3 When use these modes, you should be sent below I 2C commands before entry these modes. ESRLSW (Address=04h Bit5,4)= 1, 2 or 3 Address=22h, Data=10h (Default Data=26h) Address=24h, Data=0Fh (Default Data=27h) Address=28h, Data=06h (Default Data=23h)
TCM8230MD (A) Ver. 1.20 04/01/05 20/27 POWER ON SEQUENCE DVDD (1.5V) IOVDD (2.8V) RESET (from Outside) SCL/SDA VD DOUT 100ms>x>=0ns >0ns > 1V EXTCLK (Vp-p = 2.8V) 1st picture 2nd picture Commands are available >=100 cycles of EXTCLK >=2000 cycles of EXTCLK x D_MASK=1 ((VOUTPH + 3) - VRRPH) + 4 In default case: VOUTPH=35dec, VRRPH=38dec, ((35 + 3) - 38) + 4 = 4H* PVDD (2.8V) 100ms>x>=0ns TCM8230MD cannot output pictures after power on immediately. You should be sent some I2C commands after power on as below. Address=03h, Data=00h (Default Data=80h) POWER OFF SEQUENCE PVDD (2.8V) IOVDD (2.8V) EXTCLK (Vp-p = 2.8V) 100ms>x>=0ns 100ms>x>0ns 100ms>x>=0ns DVDD (1.5V)
TCM8230MD (A) Ver. 1.20 04/01/05 21/27 SLEEP MODE SEQUENCE 1. From normal operation to sleep mode Sleep mode VD DOUT SCL/SDA Operation Mode Picture Normal operation Sleep Command ((VOUTPH + 3) - VRRPH) + 4 In default case: VOUTPH=35dec, VRRPH=38dec, ((35 + 3) - 38) + 4 = 4H EXTCLK 2 frames 2. From sleep mode to normal operation 1 frame Sleep mode VD DOUT SCL/SDA Operation Mode Wake up Command x Normal operation > 1 frame Picture D_MASK=1 EXTCLK Some registers data, AWB calculated data and ALC calculated data are kept the last values during sleep mode.
TCM8230MD (A) Ver. 1.20 04/01/05 22/27 MAXIMUM RATING RATING 1.5V 2.8V UNITS Power supply voltage -0.3 to 3.0 -0.3 to 3.6 V Storage tempature -30 to 85 Degree C RECOMMENDED OPERATING CONDITION MIN TYP MAX UNITS 2.6 2.8 3.0 2.3 2.5 2.7 DVDD 1.4 1.5 1.6 -20 - 60 Degree C VIOVDD, PVDD* Operational tempature Power supply voltage *If using 2.5V, must input setting command. (Default setting is 2.8V.)
TCM8230MD (A) Ver. 1.20 04/01/05 23/27
ELECTRICAL CHARACTERISTICS
DC Characteristic ( Ta=25 degree C, DVDD(=AVDD) =1.5V, PVDD= IOVDD =2.8V ) 1. POWER ITEM CONDITION MIN TYP MAX UNITS VGA(15fps) (Normal operation mode) - 40 TBD mA POWER Sleep mode - - TBD uA * Measurement condition : Machbeth chart (full) *Peak current = 180mA 2. EXTCLK SYMBOL CONDITION MIN TYP MAX UNITS NOTES LOW level input voltage VIL;EXTCLK - -0.3 - IOVDD*0.2 V HIGH level input voltage VIH;EXTCLK - IOVDD*0.8 IOVDD 3.0 V LOW level input current IIL;EXTCLK VIN=GND -10 - 10 uA HIGH level input current IIH;EXTCLK VIN=IOVDD -10 - 10 uA DUTY - - 45/55 50/50 55/45 % *1 1) Duty referred to 50% level of input EXTCLK Rectangular shape ITEM 3. SCL and SDA SYMBOL MIN TYP MAX UNIT NOTES LOW level input voltage VIL;SCL 0.0 - 0.4 V HIGH level input voltage VIH;SCL IOVDD*0.7 IOVDD 3.0 V LOW level input voltage VIL;SDA 0.0 - 0.4 V HIGH level input voltage VIH;SDA IOVDD*0.7 IOVDD 3.0 V LOW level output voltage (IOL=4mA) VOL;SDA 0.0 - 0.4 V SCL SDA ITEM 4. DOUT0 to DOUT7, DCLK, HD and VD SYMBOL MIN TYP MAX UNIT NOTES LOW level output voltage (IOL=2mA) VOL;DATA 0.0 - 0.4 V HIGH level output voltage (IOH=-2mA) VOH;DATA 2.4 IOVDD - V ITEM DOUT0 to DOUT7, DCLK, HD and VD 5. RESET ITEM SYMBOL CONDITION MIN TYP MAX UNIT NOTES LOW level input voltage VIL;RESET - -0.3 - IOVDD*0.2 V HIGH level input voltage VIH;RESET -I O V D D * 0 . 8 I O V D D 3 . 0 V LOW level input current IIL;RESET VIN=GND -10 - 10 uA HIGH level input current IIH;RESET VIN=IOVDD -10 - 10 uA
TCM8230MD (A) Ver. 1.20 04/01/05 24/27 AC Characteristic ( Ta=25 degree C, DVDD(=AVDD) =1.5V, PVDD= IOVDD =2.8V ) 1. EXTCLK ITEM SYMBOL FPS MIN TYP MAX UNITS NOTES 0 25.00 1 27.00 Rise time tr;EXTCLK ---5 n s Fall time tf;EXTCLK ---5 n s 1) FPS : Address=02h, Bit7 2) All values referred to VIHmin and VILmax levels Clock frequency fEXTCLK *111.90 24.54 MHz Tr;EXTCLK Tf;EXTCLK VIH VIL fEXTCLK 2. EXTCLK input circuit 2.8V Duty 50:50 TCM8230MDEXTCLK
TCM8230MD (A) Ver. 1.20 04/01/05 25/27 3. SCL and SDA SYMBOL MIN MAX UNITS NOTES Clock frequency fSCL - 400 KHz Low period tLOW;SCL 1.3 - us High period tHIGH;SCL 0.6 - us Rise time tr;SCL - 300 ns Fall time tf;SCL - 300 ns Rise time tr;SDA - 300 ns Fall time tf;SDA - 300 ns tHD;STA 0.6 - us tSU;STA 0.6 - us tHD;DAT 0- n s tSU;DAT 100 - ns tSU;STO 0.6 - us Normal tSP1 05 0 n s Wake-up from sleep mode tSP2 02 0 n s 1) All values referred to VIHmin and VILmax levels Width of spike pulse Setup time for a repeated START condition Data hold time Data setup time Setup time for STOP condition ITEM Hold time(repeated) START condition After this period, the first clock pulse is SDA SCL SCL tf SDA tLOW tHD;DATtHD;STA tHIGH tSU;STA tSU;STO tr tSU;DAT tf tHD;STA tSP tr tBUF STOP STARTRE-STARTSTART
TCM8230MD (A) Ver. 1.20 04/01/05 26/27 VALUE UNITS 1/6 inch Holizontal 57.4 degree Vertical 44.5 degree Diagonal 69.1 degree F2.8 - -0.4 % TBD mm TBD cm Not avairable - Double lens - ITEM Optical format Field of view F number Structure TV distotion Focal length Focusing area Manual focusing 4. DOUT0 to DOUT7, DCLK, HD and VD SYMBOL MIN MAX UNITS NOTES Rise time tr;DCLK -6 n s Fall time tf;DCLK -6 n s Rise time tr;DATA -6 n s Fall time tf;DATA -6 n s tpd;SU 10 - ns tpd;HD 10 - ns 1) All values referred to VOHmin and VOLmax levels Setup time of data Hold time of data ITEM DCLK DOUT0 to DOUT7, HD, and VD tpd;SU tpd;HD tr;DATA, tf;DATA tf;DCLK tr;DCLK VOH;DCLK VOL;DCLK VOH;DATA VOL;DATA DCLK Data Out DCLKP=0 CHARACTERISTICS OF LENS
TCM8230MD (A) Ver. 1.20 04/01/05 27/27 Appendix 1: Module Drawing