TCA9517A Level-Shifting I2 C Bus Repeater datasheet (Rev. E)
Document overview
- Manufacturer or author: Texas Instruments, Incorporated [SCPS245,E]
- PDF pages: 31
Technical content
TCA9517A Level-Shifting I2C Bus Repeater
1 Features
- Two-channel bidirectional buffer
- I2C Bus and SMBus compatible
- Operating supply voltage range of 0.9V to 5.5V on A-side
- Operating supply voltage range of 2.7V to 5.5V on B-side
- Voltage-level translation from 0.9V - 5.5V to 2.7V - 5.5V
- Footprint and functional replacement for PCA9515B
- Active-high repeater-enable input
- Open-drain I2C I/O
- 5.5V Tolerant I2C and enable input support mixed- mode signal operation
- Accommodates standard mode and fast mode I2C devices and multiple controllers
- High-impedance I2C pins when powered-off
- Latch-up performance exceeds 100mA Per JESD 78, class II
- ESD Protection exceeds JESD 22 – 5500V Human-body model (A114-A) – 200V Machine model (A115-A) – 1000V Charged-device model (C101)
2 Applications
- Servers
- Routers (telecom switching equipment)
- Industrial equipment
- Products with many I2C targets and/or long PCB traces
3 Description
The TCA9517A is a bidirectional buffer with level shifting capabilities for I 2C and SMBus systems. It provides bidirectional voltage-level translation (up- translation/down-translation) between low voltages (down to 0.9V) and higher voltages (2.7V to 5.5V) in mixed-mode applications. This device enables I2C and SMBus systems to be extended without degradation of performance, even during level shifting. The TCA9517A buffers both the serial data (SDA) and the serial clock (SCL) signals on the I 2C bus, thus allowing two buses of up to 400pF bus capacitance to be connected in an I2C application. The TCA9517A has two types of drivers: A-side drivers and B-side drivers. All inputs and I/Os are over-voltage tolerant to 5.5V, even when the device is unpowered (VCCB and/or VCCA = 0V). The TCA9517A offers a higher contention level threshold, V ILC, than the TCA9517, which allows connections to targets which have weaker pulldown ability. The type of buffer design on the B-side prevents it from being used in series with devices which use static voltage offset. This is because these devices do not recognize buffered low signals as a valid low and do not propagate it as a buffered low again. The B-side drivers operate from 2.7V to 5.5V. The output low level for this internal buffer is approximately 0.5V, but the input voltage must be 70mV or more below the output low level when the output internally is driven low. The higher-voltage low signal is called a buffered low. When the B-side I/O is driven low internally, the low is not recognized as a low by the input. This feature prevents a lockup condition from occurring when the input low condition is released. TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
The A-side drivers operate from 0.9V to 5.5V and drive more current. They do not require the buffered low feature (or the static offset voltage). This means that a low signal on the B-side translates to a nearly 0V low on the A-side, which accommodates smaller voltage swings of lower-voltage logic. The output pulldown on the A-side drives a hard low, and the input level is set at 0.3 × V CCA to accommodate the need for a lower low level in systems where the low-voltage-side supply voltage is as low as 0.9V. The A-side of two or more TCA9517As can be connected together, allowing many topographies (See Figure 8-2 and Figure 8-3 ), with the A-side as the common bus. Also, the A-side can be connected directly to any other buffer with static- or dynamic-offset voltage. Multiple TCA9517As can be connected in series, A-side to B-side, with no buildup in offset voltage and with only time-of-flight delays to consider. The TCA9517A cannot be connected B-side to B-side, because of the buffered low voltage from the B-side. The B-side cannot be connected to a device with rise time accelerators. VCCA is only used to provide the 0.3 × V CCA reference to the A-side input comparators and for the power-good- detect circuit. The TCA9517A logic and all I/Os are powered by the VCCB pin. As with the standard I 2C system, pullup resistors are required to provide the logic-high levels on the buffered bus. The TCA9517A has standard open-drain configuration of the I 2C bus. The size of these pullup resistors depends on the system, but each side of the repeater must have a pullup resistor. The device is designed to work with Standard mode and Fast mode I 2C devices in addition to SMBus devices. Standard mode I 2C devices only specify 3mA in a generic I 2C system, where Standard mode devices and multiple controllers are possible. Under certain conditions, higher termination currents can be used.
Package Information
PART NUMBER PACKAGE (1) PACKAGE SIZE(2) TCA9517A VSSOP (8) 3mm × 3mm (1) For more information, see Section 13. (2) The package size (length × width) is a nominal value and includes pins, where applicable. TCA9517AGND4 1VCCA3SDAA2SCLA7SCLB6SDABI2C or SMBus Controller (e.g. Processor) 5EN 8VCCBI2C Target Devices Simplified Schematic TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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11.1 Receiving Notification of Documentation Updates.. 18
13 Mechanical, Packaging, and Orderable
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4 Pin Configuration and Functions
Figure 4-1. DGK Package, 8-Pin VSSOP (Top View) Table 4-1. Pin Functions PIN TYPE DESCRIPTION NO. NAME 1 VCCA Supply A-side supply voltage (0.9V to 5.5V) 2 SCLA Input/Output Serial clock bus, A-side. Connect to VCCA through a pull-up resistor. If unused, connect directly to ground. 3 SDAA Input/Output Serial data bus, A-side. Connect to VCCA through a pull-up resistor. If unused, connect directly to ground.
4 GND Ground Ground
5 EN Input Active-high repeater enable input
6 SDAB Input/Output Serial data bus, B-side. Connect to VCCB through a pull-up resistor. If unused, connect directly to ground. 7 SCLB Input/Output Serial clock bus, B-side. Connect to VCCB through a pull-up resistor. If unused, connect directly to ground. 8 VCCB Supply B-side and device supply voltage (2.7V to 5.5V) TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VCCB Supply voltage range –0.5 7 V VCCA Supply voltage range –0.5 7 V VI Enable input voltage range(2) –0.5 7 V VI/O I2C bus voltage range(2) –0.5 7 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 IO Continuous output current ±50 mA Continuous current through VCC or GND ±100 mA Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
5.2 ESD Ratings
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±5500 VCharged-device model (CDM), per JEDEC specification JESD22- C101(2) ±1000 Machine model (A115-A) ±200 (1) JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.
5.3 Recommended Operating Conditions
VCCA Supply voltage, A-side bus 0.9(2) 5.5 V VCCB Supply voltage, B-side bus 2.7 5.5 V VIH High-level input voltage SDAA, SCLA 0.7 × VCCA 5.5 VSDAB, SCLB 0.7 × VCCB 5.5 EN 0.7 × VCCB 5.5 VIL Low-level input voltage SDAA, SCLA 0.3 × VCCA VSDAB, SCLB(1) 0.3 × VCCB EN 0.3 × VCCB IOL Low-level output current 6 mA TA Operating free-air temperature –40 85 °C (1) VIL specification is for the first low level seen by the SDAB and SCLB lines. VILc is for the second and subsequent low levels seen by the SDAB and SCLB lines. See Section 8.2.2.2 for VILC application information (2) Low-level supply voltage www.ti.com TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TCA9517A
5.4 Thermal Information
THERMAL METRIC(1) TCA9517A UNITDGK (VSSOP)
8 PINS
RθJA Junction-to-ambient thermal resistance 187.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 59.3 °C/W RθJB Junction-to-board thermal resistance 108.6 °C/W ψJT Junction-to-top characterization parameter 3.4 °C/W ψJB Junction-to-board characterization parameter 106.9 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note. TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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5.5 Electrical Characteristics
VCCB = 2.7V to 5.5V, GND = 0V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS VCCB MIN TYP MAX UNIT VIK Input clamp voltage II = –18mA 2.7V to 5.5V –1.2 V VOL Low-level output voltage SDAB, SCLB IOL = 100μA or 6mA, VILA = VILB = 0V 2.7V to 5.5V 0.45 0.52 0.6 V SDAA, SCLA IOL = 6mA 0.1 0.2 VOL – VILc Low-level input voltage below low-level output voltage SDAB, SCLB ensured by design 2.7V to 5.5V 70 mV VILC SDA and SCL low-level input voltage contention SDAB, SCLB 2.7V to 5.5V 0.45 V ICC Quiescent supply current for VCCA Both channels low, SDAA = SCLA = GND and SDAB = SCLB = open, or SDAA = SCLA = open and SDAB = SCLB = GND 1 mA ICC Quiescent supply current Both channels high, SDAA = SCLA = VCCA and SDAB = SCLB = VCCB and EN = VCCB 5.5V 1.5 5 mABoth channels low, SDAA = SCLA = GND and SDAB = SCLB = open 1.5 5 In contention, SDAA = SCLA = GND and SDAB = SCLB = GND 3 5 II Input leakage current SDAB, SCLB VI = VCCB 2.7V to 5.5V μA VI = 0.2V 10 SDAA, SCLA VI = VCCB ±1 VI = 0.2V 10 EN VI = VCCB ±1 VI = 0.2V –10 –30 IOH High-level output leakage current SDAB, SCLB VO = 3.6V 2.7V to 5.5V μA SDAA, SCLA 10 CI Input capacitance EN VI = 3V or 0V 3.3V 6 10 pF SCLA, SCLB VI = 3V or 0V 3.3V 8 13 0V 7 11 CIO Input/output capacitance SDAA, SDAB VI = 3V or 0V 3.3V 8 13 pF 0V 7 11
5.6 Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) MIN MAX UNIT tsu Setup time, EN high before Start condition(1) 100 ns th Hold time, EN high after Stop condition(1) 100 ns (1) EN should change state only when the global bus and the repeater port are in an idle state. www.ti.com TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TCA9517A
5.7 I2C Interface Switching Characteristics
VCCB = 2.7V to 5.5V, GND = 0V, TA = –40°C to 85°C (unless otherwise noted)(1) (4) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS MIN TYP(5) MAX UNIT tPLZ Propagation delay SDAB, SCLB(3) (see Figure 6-4) SDAA, SCLA(3) (see Figure 6-4) 80 141 350 ns SDAA, SCLA(2) (see Figure 6-3) SDAB, SCLB(2) (see Figure 6-3) 25 74 110 tPZL Propagation delay SDAB, SCLB SDAA, SCLA VCCA ≤ 2.7V (see Figure 6-2) 30 76(6) 110 nsVCCA ≥ 3V (see Figure 6-2) 10 86 230 SDAA, SCLA(2) (see Figure 6-3) SDAB, SCLB(2) (see Figure 6-3) 60 107 230 tTLH Transition time B-side to A side 80% 20% VCCA ≤ 2.7V (see Figure 6-3) 10 12 15 nsVCCA ≥ 3V (see Figure 6-3) 40 42 45 A side to B-side (see Figure 6-2) 110 125 140 tTHL Transition time B-side to A side 80% 20% VCCA ≤ 2.7V (see Figure 6-3) 1 52(6) 105 nsVCCA ≥ 3V (see Figure 6-3) 20 67 175 A side to B-side (see Figure 6-2) 30 48 90 (1) Times are specified with loads of 1.35kΩ pull-up resistance and 50pF load capacitance on the B-side and 167Ω pull-up and 57pF load capacitance on the A side. Different load resistance and capacitance alter the RC time constant, thereby changing the propagation delay and transition times. (2) The proportional delay data from A to B-side is measured at 0.3VCCA on the A side to 1.5V on the B-side. (3) The tPLH delay data from B to A side is measured at 0.4V on the B-side to 0.5VCCA on the A side when VCCA is less than 2 V, and 1.5 V on the A side if VCCA is greater than 2 V. (4) pull-up voltages are VCCA on the A side and VCCB on the B-side. (5) Typical values were measured with VCCA = VCCB = 3.3V at TA = 25°C, unless otherwise noted. (6) Typical value measured with VCCA = 2.7V at TA = 25°C TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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5.8 Typical Characteristics
VCCA = 0.9V, VCCB = 2.7V Port A IOL (mA) Port A VOL (V) 0 1 2 3 4 5 6 0.025 0.05 0.075 0.1 0.125 0.15 D001 -40C 25C 85C Figure 5-1. Port A VOL vs IOL Port B IOL (mA) Port B VOL (V) 0 1 2 3 4 5 6 0.49 0.5 0.51 0.52 0.53 0.54 D002 -40C 25C 85C Figure 5-2. Port B VOL vs IOL www.ti.com TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: TCA9517A
6 Parameter Measurement Information
CL = 57 pF (see Note C) GND PULSE GENERATOR DUT RT (see Note B) TEST CIRCUIT FOR OPEN-DRAIN OUTPUT R (see Note A) L VCC VCC VIN VOUT VCC Copyright © 2017, Texas Instruments Incorporated B. RT termination resistance should be equal to ZOUT of pulse generators. C. CL includes probe and jig capacitance. D. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns. E. The outputs are measured one at a time, with one transition per measurement. F. tPLH and tPHL are the same as tpd. G. tPLZ and tPHZ are the same as tdis. H. tPZL and tPZH are the same as ten. Figure 6-1. Test Circuit 3 V 0.1 V 1.5 V1.5 VINPUT OUTPUT 1.2 V VOL tPZL tPLZ 80% 20% 0.6 V 0.6 V 80% 20% tTHL tTLH Figure 6-2. Waveform 1 – Propagation Delay and Transition Times for B-side to A-side
0.3 VCCAINPUT
3 V80%
20% 1.5 V 1.5 V 80% 20%
0.3 VCCA
Figure 6-3. Waveform 2 – Propagation Delay and Transition Times for A-side to B-side tPLH INPUT SDAB, SCLB OUTPUT SCLA, SDAA 50% is V is less than 2 V
1.5 V if V is greater than 2 V
0.4 V Figure 6-4. Waveform 3 – Propagation Delay for B-side to A-side TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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7 Detailed Description
7.1 Overview
The TCA9517A is a bidirectional buffer with level shifting capabilities for I 2C and SMBus systems. It provides bidirectional voltage-level translation (up-translation/down-translation) between low voltages (down to 0.9V) and higher voltages (2.7V to 5.5V) in mixed-mode applications. This device enables I 2C and SMBus systems to be extended without degradation of performance, even during level shifting. The TCA9517A buffers both the serial data (SDA) and the serial clock (SCL) signals on the I 2C bus, thus allowing two buses of up to 400pF bus capacitance to be connected in an I2C application. The TCA9517A has two types of drivers: A-side drivers and B-side drivers. All inputs and I/Os are over-voltage tolerant to 5.5V, even when the device is unpowered (VCCB and/or VCCA = 0V). The TCA9517A offers a higher contention level threshold, V ILC, than the TCA9517, which allows connections to targets which have weaker pull-down ability.
7.2 Functional Block Diagram
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7.3 Feature Description
7.3.1 Two-Channel Bidirectional Buffer
The TCA9517A is a two-channel bidirectional buffer with level-shifting capabilities
7.3.2 Active-High Repeater-Enable Input
The TCA9517A has an active-high enable (EN) input with an internal pull-up to V CCB, which allows the user to select when the repeater is active. This can be used to isolate a badly behaved target on power-up reset. The EN input should change state only when the global bus and repeater port are in an idle state, to prevent system failures.
7.3.3 VOL B-Side Offset Voltage
The B-side drivers operate from 2.7V to 5.5V. The output low level for this internal buffer is approximately 0.5V, but the input voltage must be 70mV or more below the output low level when the output internally is driven low. The higher-voltage low signal is called a buffered low. When the B-side I/O is driven low internally, the low is not recognized as a low by the input. This feature prevents a lockup condition from occurring when the input low condition is released. This type of design prevents 2 B-side ports from being connected to each other.
7.3.4 Standard Mode and Fast Mode Support
The TCA9517A supports standard mode as well as fast mode I 2C. The maximum system operating frequency will depend on system design and the delays added by the repeater.
7.3.5 Clock Stretching Support
The TCA9517A can support clock stretching, but care needs to be taken to minimize the overshoot voltage presented during the hand-off between the target and controller. This is best done by increasing the pull-up resistor value.
7.4 Device Functional Modes
Table 7-1. Function Table INPUT EN FUNCTION L Outputs disabled H SDAA = SDAB SCLA = SCLB TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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8 Application and Implementation
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
8.1 Application Information
A typical application is shown in Figure 8-1. In this example, the system controller is running on a 3.3V I 2C bus, and the target is connected to a 1.2V I 2C bus. Both buses run at 400kHz. Controller devices can be placed on either bus. The TCA9517A is 5V tolerant, so it does not require any additional circuitry to translate between 0.9V to 5.5V bus voltages and 2.7V to 5.5V bus voltages. When the A side of the TCA9517A is pulled low by a driver on the I 2C bus, a comparator detects the falling edge when it goes below 0.3 × V CCA and causes the internal driver on the B-side to turn on, causing the B-side to pull down to about 0.5V. When the B-side of the TCA9517A falls, first a CMOS hysteresis-type input detects the falling edge and causes the internal driver on the A side to turn on and pull the A-side pin down to ground. In order to illustrate what would be seen in a typical application, refer to Figure 8-3 and Figure 8-4. If the bus controller in Figure 8-1 were to write to the target through the TCA9517A, waveforms shown in Figure 8-3 would be observed on the A bus. This looks like a normal I2C transmission, except that the high level may be as low as 0.9V, and the turn on and turn off of the acknowledge signals are slightly delayed. On the B-side bus of the TCA9517A, the clock and data lines would have a positive offset from ground equal to the VOL of the TCA9517A. After the eighth clock pulse, the data line is pulled to the V OL of the target device, which is very close to ground in this example. At the end of the acknowledge, the level rises only to the low level set by the driver in the TCA9517A for a short delay, while the A-bus side rises above 0.3 × V CCA and then continues high.
8.2 Typical Application
BUS BTCA9517ASDASDABSDASCLSCLBSCLENBUS A 3.3V SDAASCLAVCCAVCCB10kW 1.2V TARGET400kHzBUSCONTROLLER400kHz10kW10kW10kW Figure 8-1. Typical Application Schematic
8.2.1 Design Requirements
For the level translating application, the following should be true:
- VCCA = 0.9V to 5.5V
- VCCB = 2.7V to 5.5V
- B-side ports must not be connected together www.ti.com TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TCA9517A
8.2.2 Detailed Design Procedure
8.2.2.1 Clock Stretching Support
The TCA9517A can support clock stretching, but care needs to be taken to minimize the overshoot voltage presented during the hand-off between the target and controller. This is best done by increasing the pull-up resistor value.
8.2.2.2 VILC and Pullup Resistor Sizing
For the TCA9517A to function correctly, all devices on the B-side must be able to pull the B-side below the voltage input low contention level (V ILC). This means that the V OL of any device on the B-side must be below 0.45V. VOL of a device can be adjusted by changing the I OL through the device which is set by the pull-up resistance value. The pull-up resistance on the B-side must be carefully selected to ensure that logic levels will be transferred correctly to the A-side. TCA9517ASDA SDASCLSCLASCLEN VCCA VCCB SDABSCLB10kW10kW 10kW10kW TCA9517ASDAASDASCLASCLENSDABSCLB10kW10kW TCA9517ASDAASDASCLASCLENSDABSCLB10kW10kW BUSCONTROLLERTARGET400kHz TARGET400kHz TARGET400kHz SDAA Figure 8-2. Typical Star Application Multiple A sides of TCA9517As can be connected in a star configuration, allowing all nodes to communicate with each other. TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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8.2.3 Application Curve
Magnitude (V) 0.5 1.5 2.5 D003 Port A Port B Figure 8-6. Voltage Translation at 400kHz, VCCA = 0.9V, VCCB = 2.7V
9 Power Supply Recommendations
VCCB and V CCA can be applied in any sequence at power up. The TCA9517A includes a power-up circuit that keeps the output drivers turned off until VCCB is above 2.5V and the VCCA is above 0.8V. After power up and with the EN high, a low level on the A-side (below 0.3 × V CCA) turns the corresponding B-side driver (either SDA or SCL) on and drives the B-side down to approximately 0.5V. When the A-side rises above 0.3 × V CCA, the B-side pull-down driver is turned off and the external pull-up resistor pulls the pin high. When the B-side falls first and goes below 0.3 × V CCB, the A-side driver is turned on and the A-side pulls down to 0V. The B-side pull-down is not enabled unless the B-side voltage goes below 0.4V. If the B-side low voltage does not go below 0.5V, the A-side driver turns off when the B-side voltage is above 0.7 × V CCB. If the B-side low voltage goes below 0.4V, the B-side pull-down driver is enabled, and the B-side is able to rise to only 0.5V until the A-side rises above 0.3 × VCCA. TI recommends using a decoupling capacitor and placing it close to the VCCA and VCCB pins of a value of about 100nF.
10 Layout
10.1 Layout Guidelines
There are no special layout procedures required for the TCA9517A. It is recommended that the decoupling capacitors be placed as close to the VCC pins as possible.
10.2 Layout Example
Figure 10-1 shows an example layout of the DGK package. TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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0402 Cap
= Via to GND Plane Figure 10-1. TCA9517A Layout Example www.ti.com TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TCA9517A
11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.
11.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.
11.3 Trademarks
TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions. NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (September 2024) to Revision E (October 2025) Page Changes from Revision C (December 2018) to Revision D (September 2024) Page Changes from Revision B (June 2015) to Revision C (December 2018) Page Changes from Revision A (April 2013) to Revision B (June 2015) Page
- Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. www.ti.com TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: TCA9517A
13.1 Tape and Reel Information
Reel Width (W1) REEL DIMENSIONS W Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Dimension designed to accommodate the component width TAPE DIMENSIONS B0 W A0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket Quadrants Sprocket Holes Q1 Q1Q2 Q2 Q3 Q3Q4 Q4 Reel Diameter User Direction of Feed Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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TAPE AND REEL BOX DIMENSIONS Width (mm) W L H Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TCA9509MRVHR X2QFN RVH 8 5000 183.0 183.0 20.0 TCA9509RVHR X2QFN RVH 8 5000 202.0 201.0 28.0 TCA9509DGKR VSSOP DGK 8 2500 364.0 364.0 27.0 www.ti.com TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TCA9517A
13.2 Mechanical Data
www.ti.com PACKAGE OUTLINE C6X 0.652X1.958X 0.380.25
5.054.75 TYP SEATINGPLANE
0.150.05 0.25GAGE PLANE 0-8 1.1 MAX 0.230.13 B 3.12.9NOTE 4 A 3.12.9NOTE 3 0.70.4 VSSOP - 1.1 mm max heightDGK0008ASMALL OUTLINE PACKAGE 4214862/A 04/2023 4 5 0.13CAB PIN 1 INDEX AREA SEE DETAIL A 0.1C PowerPAD is a trademark of Texas Instruments.TYPICAL A 20 SCALE 4.000 DETAIL A TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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Product Folder Links: TCA9517A
www.ti.com EXAMPLE BOARD LAYOUT 0.05 MAXALL AROUND0.05 MINALL AROUND 8X (1.4)8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008ASMALL OUTLINE PACKAGE EXPOSED METAL SHOWN TM LAND PATTERN EXAMPLESCALE: 15X SYMM SYMM1 4 5 SEE DETAILS 15.000 METALSOLDER MASKOPENINGMETAL UNDERSOLDER MASKSOLDER MASKOPENINGEXPOSED METALEXPOSED METALNON-SOLDER MASKSOLDER MASK DETAILSDEFINED(PREFERRED)SOLDER MASKDEFINED www.ti.com TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: TCA9517A
www.ti.com EXAMPLE STENCIL DESIGN 8X (1.4)8X (0.45) 6X (0.65)(4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008ASMALL OUTLINE PACKAGE TM SOLDER PASTE EXAMPLE SCALE: 15X SYMM SYMM1 4 5 TCA9517A SCPS245E – DECEMBER 2012 – REVISED OCTOBER 2025 www.ti.com
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www.ti.com 15-Jul-2026 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TCA9517ADGKR Active Production VSSOP (DGK) | 8 2500 | LARGE T&R Yes NIPDAU | SN | NIPDAUAG Level-1-260C-UNLIM -40 to 85 BSK TCA9517ADGKR.B Active Production VSSOP (DGK) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 BSK (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 10-Jul-2026 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 10-Jul-2026 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TCA9517ADGKR VSSOP DGK 8 2500 353.0 353.0 32.0 Pack Materials-Page 2
www.ti.com PACKAGE OUTLINE C 6X 0.65 1.95 8X 0.38 0.25 5.05
4.75 TYP
0.15 0.05 0.25 GAGE PLANE 0 -8
1.1 MAX
0.23 0.13 B 3.1 2.9 NOTE 4 A 3.1 2.9 NOTE 3 0.7 0.4 VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023
0.13 C A B
0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. PowerPAD is a trademark of Texas Instruments. A 20 DETAIL A TYPICAL SCALE 4.000
www.ti.com EXAMPLE BOARD LAYOUT
0.05 MAX
0.05 MIN
8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. TM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SYMM SYMM SEE DETAILS 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED
www.ti.com EXAMPLE STENCIL DESIGN 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 12. Board assembly site may have different recommendations for stencil design. TM SOLDER PASTE EXAMPLE SCALE: 15X SYMM SYMM
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