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TCA9517

Texas Instruments

TCA9517 Level-Shifting I2C Bus Repeater REVISED JULY 2017

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TCA9517 Level-Shifting I2C Bus Repeater datasheet (Rev. D)

Document overview

Manufacturer or author: Texas Instruments, Incorporated [SCPS242,D]
PDF pages: 28

Technical content

3 SDAA

2 SCLA

(e.g. Processor) 5 EN VCCB I2C Slave Devices Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TCA9517 SCPS242D –DECEMBER 2012–REVISED JULY 2017 TCA9517Level-ShiftingI2CBusRepeater

1 Features

1• Two-Channel Bidirectional Buffer

I2C Bus and SMBus Compatible
Operating Supply Voltage Range of 0.9 V to 5.5 V on A-side
Operating Supply Voltage Range of 2.7 V to 5.5 V on B-side
Voltage-Level Translation From 0.9 V - 5.5 V to 2.7 V - 5.5 V
Footprint and Functional Replacement for PCA9515B
Active-High Repeater-Enable Input
Open-Drain I2C I/O
5.5-V Tolerant I2C and Enable Input Support Mixed-Mode Signal Operation
Accommodates Standard Mode and Fast Mode I2C Devices and Multiple Masters
High-Impedance I2C Pins When Powered-Off
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22 – 5500 V Human-Body Model (A114-A) – 200 V Machine Model (A115-A) – 1000 V Charged-Device Model (C101)

2 Applications

Servers
Routers (Telecom Switching Equipment)
Industrial Equipment
Products with Many I2C Slaves and/or Long PCB Traces

3 Description

The TCA9517 is a bidirectional buffer with level shifting capabilities for I2C and SMBus systems. It provides bidirectional voltage-level translation (up- translation/down-translation) between low voltages (down to 0.9 V) and higher voltages (2.7 V to 5.5 V) in mixed-mode applications. This device enables I2C and SMBus systems to be extended without degradation of performance, even during level shifting. The TCA9517 buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, thus allowing two buses of up to 400-pF bus capacitance to be connected in an I2C application. The TCA9517 has two types of drivers: A-side drivers and B-side drivers. All inputs and I/Os are over- voltage tolerant to 5.5 V, even when the device is unpowered (VCCB and/or VCCA = 0 V). Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TCA9517 VSSOP (8) 3.00 mm × 3.00 mm SOIC (8) 4.90 mm x 3.91 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Simplified Schematic

14 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (June 2015) to Revision D Page Changes from Revision B (May 2013) to Revision C Page

Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device Changes from Revision A (April 2013) to Revision B Page Changes from Original (December 2012) to Revision A Page

5 Description (continued)

The type of buffer design on the B-side prevents it from being used in series with devices which use static voltage offset. This is because these devices do not recognize buffered low signals as a valid low and do not propagate it as a buffered low again. The B-side drivers operate from 2.7 V to 5.5 V. The output low level for this internal buffer is approximately 0.5 V, but the input voltage must be 70 mV or more below the output low level when the output internally is driven low. The higher-voltage low signal is called a buffered low. When the B-side I/O is driven low internally, the low is not recognized as a low by the input. This feature prevents a lockup condition from occurring when the input low condition is released. The A-side drivers operate from 0.9 V to 5.5 V and drive more current. They do not require the buffered low feature (or the static offset voltage). This means that a low signal on the B-side translates to a nearly 0 V low on the A-side, which accommodates smaller voltage swings of lower-voltage logic. The output pulldown on the A- side drives a hard low, and the input level is set at 0.3 × VCCA to accommodate the need for a lower low level in systems where the low-voltage-side supply voltage is as low as 0.9 V. The A-side of two or more TCA9517 s can be connected together, allowing many topographies (See Figure 8 and Figure 9 ), with the A-side as the common bus. Also, the A-side can be connected directly to any other buffer with static- or dynamic-offset voltage. Multiple TCA9517 s can be connected in series, A-side to B-side, with no buildup in offset voltage and with only time-of-flight delays to consider. The TCA9517 cannot be connected B- side to B-side, because of the buffered low voltage from the B-side. The B-side cannot be connected to a device with rise time accelerators. VCCA is only used to provide the 0.3 × VCCA reference to the A-side input comparators and for the power-good- detect circuit. The TCA9517 logic and all I/Os are powered by the VCCB pin. As with the standard I2C system, pullup resistors are required to provide the logic-high levels on the buffered bus. The TCA9517 has standard open-drain configuration of the I2C bus. The size of these pullup resistors depends on the system, but each side of the repeater must have a pullup resistor. The device is designed to work with Standard mode and Fast mode I2C devices in addition to SMBus devices. Standard mode I2C devices only specify 3 mA in a generic I2C system, where Standard mode devices and multiple masters are possible. Under certain conditions, higher termination currents can be used.

6 Pin Configuration and Functions

NO. NAME 1 VCCA Supply A-side supply voltage (0.9 V to 5.5 V) 2 SCLA Input/Output Serial clock bus, A-side. Connect to VCCA through a pull-up resistor. If unused, connect directly to ground. 3 SDAA Input/Output Serial data bus, A-side. Connect to VCCA through a pull-up resistor. If unused, connect directly to ground.

4 GND Ground Ground

5 EN Input Active-high repeater enable input

6 SDAB Input/Output Serial data bus, B-side. Connect to VCCB through a pull-up resistor. If unused, connect directly to ground. 7 SCLB Input/Output Serial clock bus, B-side. Connect to VCCB through a pull-up resistor. If unused, connect directly to ground. 8 VCCB Supply B-side and device supply voltage (2.7 V to 5.5 V) (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VCCB Supply voltage range –0.5 7 V VCCA Supply voltage range –0.5 7 V VI Enable input voltage range(2) –0.5 7 V VI/O I2C bus voltage range(2) –0.5 7 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 IO Continuous output current ±50 mA Continuous current through VCC or GND ±100 mA Tstg Storage temperature range –65 150 °C

www.ti.com SCPS242D –DECEMBER 2012–REVISED JULY 2017 Product Folder Links: TCA9517 Submit Documentation FeedbackCopyright © 2012–2017, Texas Instruments Incorporated (1) JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±5500 VCharged-device model (CDM), per JEDEC specification JESD22- C101(2) ±1000 Machine model (A115-A) ±200 (1) Low-level supply voltage (2) VIL specification is for the first low level seen by the SDAB and SCLB lines. VILc is for the second and subsequent low levels seen by the SDAB and SCLB lines. See VILC and Pullup Resistor Sizing for VILC application information

7.3 Recommended Operating Conditions

VCCA Supply voltage, A-side bus 0.9(1) 5.5 V VCCB Supply voltage, B-side bus 2.7 5.5 V VIH High-level input voltage SDAA, SCLA 0.7 × VCCA 5.5 VSDAB, SCLB 0.7 × VCCB 5.5 EN 0.7 × VCCB 5.5 VIL Low-level input voltage SDAA, SCLA 0.3 × VCCA VSDAB, SCLB(2) 0.3 × VCCB EN 0.3 × VCCB IOL Low-level output current 6 mA TA Operating free-air temperature –40 85 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.4 Thermal Information

THERMAL METRIC(1) TCA9517 UNITDGK (VSSOP) D (SOIC)

8 PINS 8 PINS

RθJA Junction-to-ambient thermal resistance 187.6 133.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 59.3 87.6 °C/W RθJB Junction-to-board thermal resistance 108.6 74.2 °C/W ψJT Junction-to-top characterization parameter 3.4 36.9 °C/W ψJB Junction-to-board characterization parameter 106.9 73.7 °C/W

7.5 Electrical Characteristics

VCCB = 2.7 V to 5.5 V, GND = 0 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS VCCB MIN TYP MAX UNIT VIK Input clamp voltage II = –18 mA 2.7 V to 5.5 V –1.2 V VOL Low-level output voltage SDAB, SCLB IOL = 100 μA or 6 mA, VILA = VILB = 0 V 2.7 V to 5.5 V 0.45 0.52 0.6 V SDAA, SCLA IOL = 6 mA 0.1 0.2 VOL – VILc Low-level input voltage below low-level output voltage SDAB, SCLB ensured by design 2.7 V to 5.5 V 70 mV VILC SDA and SCL low-level input voltage contention SDAB, SCLB 2.7 V to 5.5 V 0.4 V ICC Quiescent supply current for VCCA Both channels low, SDAA = SCLA = GND and SDAB = SCLB = open, or SDAA = SCLA = open and SDAB = SCLB = GND 1 mA ICC Quiescent supply current Both channels high, SDAA = SCLA = VCCA and SDAB = SCLB = VCCB and EN = VCCB 5.5 V 1.5 5 mABoth channels low, SDAA = SCLA = GND and SDAB = SCLB = open 1.5 5 In contention, SDAA = SCLA = GND and SDAB = SCLB = GND 3 5 II Input leakage current SDAB, SCLB VI = VCCB 2.7 V to 5.5 V μA VI = 0.2 V 10 SDAA, SCLA VI = VCCB ±1 VI = 0.2 V 10 EN VI = VCCB ±1 VI = 0.2 V –10 –30 IOH High-level output leakage current SDAB, SCLB VO = 3.6 V 2.7 V to 5.5 V μA SDAA, SCLA 10 CI Input capacitance EN VI = 3 V or 0 V 3.3 V 6 10 pF SCLA, SCLB VI = 3 V or 0 V

3.3 V 8 13

0 V 7 11

capacitance SDAA, SDAB VI = 3 V or 0 V (1) EN should change state only when the global bus and the repeater port are in an idle state.

7.6 Timing Requirements

over recommended operating free-air temperature range (unless otherwise noted) MIN MAX UNIT tsu Setup time, EN high before Start condition(1) 100 ns th Hold time, EN high after Stop condition(1) 100 ns

www.ti.com SCPS242D –DECEMBER 2012–REVISED JULY 2017 Product Folder Links: TCA9517 Submit Documentation FeedbackCopyright © 2012–2017, Texas Instruments Incorporated (1) Times are specified with loads of 1.35-kΩ pull-up resistance and 50-pF load capacitance on the B-side and 167-Ω pull-up and 57-pF load capacitance on the A side. Different load resistance and capacitance alter the RC time constant, thereby changing the propagation delay and transition times. (2) pull-up voltages are VCCA on the A side and VCCB on the B-side. (3) Typical values were measured with VCCA = VCCB = 3.3 V at TA = 25°C, unless otherwise noted. (4) The tPLH delay data from B to A side is measured at 0.4 V on the B-side to 0.5 VCCA on the A side when VCCA is less than 2 V, and 1.5 V on the A side if VCCA is greater than 2 V. (5) The proportional delay data from A to B-side is measured at 0.3 VCCA on the A side to 1.5 V on the B-side. (6) Typical value measured with VCCA = 2.7 V at TA = 25°C

7.7 I2C Interface Switching Characteristics

VCCB = 2.7 V to 5.5 V, GND = 0 V, TA = –40°C to 85°C (unless otherwise noted)(1) (2) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS MIN TYP(3) MAX UNIT tPLZ Propagation delay SDAB, SCLB(4) (see Figure 6) SDAA, SCLA(4) (see Figure 6) 80 141 250 ns SDAA, SCLA(5) (see Figure 5) SDAB, SCLB(5) (see Figure 5) 25 74 110 tPZL Propagation delay SDAB, SCLB SDAA, SCLA VCCA ≤ 2.7 V (see Figure 4) 30 76(6) 110 nsVCCA ≥ 3 V (see Figure 4) 10 86 230 SDAA, SCLA(5) (see Figure 5) SDAB, SCLB(5) (see Figure 5) 60 107 230 tTLH Transition time B-side to A side 80% 20% VCCA ≤ 2.7 V (see Figure 5) 10 12 15 nsVCCA ≥ 3 V (see Figure 5) 40 42 45 A side to B-side (see Figure 4) 110 125 140 tTHL Transition time B-side to A side 80% 20% VCCA ≤ 2.7 V (see Figure 5) 1 52(6) 105 nsVCCA ≥ 3 V (see Figure 5) 20 67 175 A side to B-side (see Figure 4) 30 48 90

7.8 Typical Characteristics

Figure 1. Port A VOL vs IOL Figure 2. Port B VOL vs IOL

1.5 V if V is greater than 2 V

0.3 VCCAINPUT

3 V80%

0.3 VCCA

8 Parameter Measurement Information

B. RT termination resistance should be equal to ZOUT of pulse generators. C. CL includes probe and jig capacitance. E. The outputs are measured one at a time, with one transition per measurement. F. tPLH and tPHL are the same as tpd. G. tPLZ and tPHZ are the same as tdis. H. tPZL and tPZH are the same as ten. Figure 3. Test Circuit Figure 4. Waveform 1 – Propagation Delay and Figure 5. Waveform 2 – Propagation Delay and Figure 6. Waveform 3 – Propagation Delay for B-side to A-side

9 Detailed Description

9.1 Overview

The TCA9517 is a bidirectional buffer with level shifting capabilities for I2C and SMBus systems. It provides bidirectional voltage-level translation (up-translation/down-translation) between low voltages (down to 0.9 V) and higher voltages (2.7 V to 5.5 V) in mixed-mode applications. This device enables I2C and SMBus systems to be extended without degradation of performance, even during level shifting. The TCA9517 buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, thus allowing two buses of up to 400-pF bus capacitance to be connected in an I2C application. The TCA9517 has two types of drivers: A-side drivers and B-side drivers. All inputs and I/Os are over-voltage tolerant to 5.5 V, even when the device is unpowered (VCCB and/or VCCA = 0 V).

9.2 Functional Block Diagram

9.3 Feature Description

9.3.1 Two-Channel Bidirectional Buffer

9.3.2 Active-High Repeater-Enable Input

9.3.3 VOL B-Side Offset Voltage

but the input voltage must be 70 mV or more below the output low level when the output internally is driven low. condition is released. This type of design prevents 2 B-side ports from being connected to each other.

9.3.4 Standard Mode and Fast Mode Support

depend on system design and the delays added by the repeater.

9.3.5 Clock Stretching Support

9.4 Device Functional Modes

Table 1. Function Table

validate and test their design implementation to confirm system functionality.

10.1 Application Information

bus voltages and 2.7 V to 5.5 V bus voltages. turn on and turn off of the acknowledge signals are slightly delayed. the driver in the TCA9517 for a short delay, while the A-bus side rises above 0.3 × VCCA and then continues high.

10.2 Typical Application

Figure 7. Typical Application Schematic

10.2.1 Design Requirements

VCCA = 0.9 V to 5.5 V
VCCB = 2.7 to 5.5 V
B-side ports must not be connected together

10.2.2 Detailed Design Procedure

10.2.2.1 Clock Stretching Support

10.2.2.2 VILC and Pullup Resistor Sizing

transferred correctly to the A-side. Figure 8. Typical Star Application

10.2.3 Application Curve

Figure 12. Voltage Translation at 400 kHz, VCCA = 0.9 V, VCCB = 2.7 V

11 Power Supply Recommendations

0402 Cap

12 Layout

12.1 Layout Guidelines

There are no special layout procedures required for the TCA9517 . It is recommended that the decoupling capacitors be placed as close to the VCC pins as possible.

12.2 Layout Example

Figure 13 shows an example layout of the DGK package. Figure 13. TCA9517A Layout Example

13 Device and Documentation Support

13.1 Community Resource

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

13.2 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

13.3 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

13.4 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 15-Jul-2026 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TCA9517DGKR Active Production VSSOP (DGK) | 8 2500 | LARGE T&R Yes NIPDAU | SN | NIPDAUAG Level-1-260C-UNLIM -40 to 85 AYK TCA9517DGKR.B Active Production VSSOP (DGK) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 AYK TCA9517DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 PW517 TCA9517DR.B Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 PW517 TCA9517DRG4 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 PW517 TCA9517DRG4.B Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 PW517 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

www.ti.com 15-Jul-2026 OTHER QUALIFIED VERSIONS OF TCA9517 :

Automotive : TCA9517-Q1 NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 29-Jun-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Jun-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TCA9517DGKR VSSOP DGK 8 2500 353.0 353.0 32.0 TCA9517DR SOIC D 8 2500 340.5 336.1 25.0 TCA9517DRG4 SOIC D 8 2500 340.5 336.1 25.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C .228-.244 TYP [5.80-6.19] .069 MAX [1.75] 6X .050 [1.27] 8X .012-.020 [0.31-0.51] .150 [3.81] .005-.010 TYP [0.13-0.25] 0 - 8 .004-.010 [0.11-0.25] .010 [0.25].016-.050 [0.41-1.27] 4X (0 -15 ) A .189-.197 [4.81-5.00] NOTE 3 B .150-.157 [3.81-3.98] NOTE 4 4X (0 -15 ) (.041) [1.04] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. 1 8 .010 [0.25] C A B PIN 1 ID AREA SEATING PLANE .004 [0.1] C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800

www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM 4 5 SEE DETAILS SYMM

www.ti.com EXAMPLE STENCIL DESIGN 8X (.061 ) [1.55] 8X (.024) [0.6] 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X SYMM SYMM 4 5

www.ti.com PACKAGE OUTLINE C 6X 0.65 1.95 8X 0.38 0.25 5.05

4.75 TYP

0.15 0.05 0.25 GAGE PLANE 0 -8

1.1 MAX

0.23 0.13 B 3.1 2.9 NOTE 4 A 3.1 2.9 NOTE 3 0.7 0.4 VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023

0.13 C A B

0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. PowerPAD is a trademark of Texas Instruments. A 20 DETAIL A TYPICAL SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MAX

0.05 MIN

8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. TM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SYMM SYMM SEE DETAILS 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 12. Board assembly site may have different recommendations for stencil design. TM SOLDER PASTE EXAMPLE SCALE: 15X SYMM SYMM

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Product Information

TCA9517 specifications and overview.

Summary

TCA9517 Level-Shifting I2C Bus Repeater REVISED JULY 2017

Description

TCA9517 Level-Shifting I2C Bus Repeater REVISED JULY 2017

Source title TCA9517_V01 Datasheet(PDF) - Texas Instruments

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