TC9127AP TOSHIBA | Alldatasheet
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TOSHIBA TC9172AP,TC9227,28P TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC9172AP, TC9227P, TC9228P HIGH SPEED PLL WITH BUILT-IN PRESCALER TC9172AP, TC9227P and TC9228P are high-speed PLL-LSI 7¢9227P developed for digital tuning system use, and contain 2- TC9228P _— modulus prescaler. - N\\ When they are used in combination with system a <a 1 controller LSI TC9301AN, TC9302AF, TC9303AN, TC9306F RE << eictalalal series, high performance digital synthesized tuner can be N ry yf ra yl realized. yu DIP22-P-400-2.54 FEATURES TC9172AP @ They contain prescaler, and can directly input the _ frequency signal of 120MHz max. at FM band. oe @ Either pulse swallow dividing type or direct dividing type en s ay lh can be applied depending upon receiving band. aN Ra \\ | (Hy © Both high function type (DIP22 pin) and conventional | type (DIP16 pin) are provided. High function type contains IF counter which counts IF DIP16-P-300-2.54 A 7 Weight signal at FM/AM band each and produces auto-stop DIP22-P-400-2.54 : 2.1g (Typ.) signal. DIP16-P-300-2.54A : 1.0g (Typ.) @ Reference frequency is supplied from the controller LSI, and no crystal oscillator is required on the PLL LSI. @ They have two phase comparator outputs, and can use two kinds of low pass filters without changing. @ Abundant general purpose input-output terminals make possible the control of radio frequency circuit part. @ Frequency input terminals are provided for FM and AM, independently. © IF offset can be easily controlled at FM band. @ As serial ports are contained, control of all functions including frequency division number setting is performed through four serial bus lines. 9809 10EBA2 ©@ TOSHIBA is continually working to improve the quality and the reliability of its products, Nevertheless, semiconductor devices in general can malfunction or fall due to thei inherent electrical sensitivity and, vulnerability to physical stres. itis the responsibilty of the buyer, when utlizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. @ The products described in this document are subject to the foreign exchange and foreign trade laws. @ The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others e The information contained herein is subject to change without notice. 1999-03-19 1/21
TOSHIBA TC9172AP,TC9227,28P PIN CONNECTION (TOP VIEW) TC9227P, TC9228P TC9172AP nei 22 voo news 16M Yop REF 2 21 Min, REF 2 15 FM so 93 20 GND sis 14 fl GND sie 19 BAMin, ck 13 BAM cK fs 18 Test sas 12 test sT8 ie 17f 001 oie 11g Do1 Aste 7 16 002 or 7 10 ff 002 en We 15 lors on is 9 flora ini fio 14 OTS *OT1/(IN2) 10 13 J oT4
3 OT2/(IN3) 11 12 ff oT3
(Note) * Bracketed letters indicate TC9228P terminal name. Others indicate common terminals. VERSION TABLE PRODUCTION NAME TC9172AP TC9227P TC9228P Silicon EMOS gate Frequency Dividing Type Pulse swallow and direct dividing type IseiaiPore |S OCdCOCdCCOC*Y lif Counter ———~i| +i Od SOY Phase Comparator Output| 2 | _2. | 2 | Supply Voltage 5V+10% single power supply 1999-03-19 2/21
TOSHIBA TC9172AP,TC9227,28P BLOCK DIAGRAM TRISTATE BUFFER TINY 14 N A compa. avin O-T> D+ raror | LLC) 002 VA) Fin {> a Se 2 [2 IF yt Foo aus © | 10 PORT O « IF COUNTER rsd [0] CODE BUS © (aspi) conton K—— tL, [-———]_ AND BD ro t CONTROL C) ste SARRREEL AREA PORT O-O-O O wey y TEST GND Vpp OT6 OTS oT4 oT3 oT2 oT1 INT ASTP (U3) 3% 1(IN2) 3 (Note) % Bracketed letters indicate TC9228P terminal name. @Terminal does not exist in TC9172AP. PIN FUNCTION ( ): Terminal of TC9172AP PIN No.|symBor PIN NAME EXPLANATION OF FUNCTIONS AND OPERATIONS REMARKS No pom [ne [mewn | Reference Input of reference frequency signal supplied from 2, (2) REF . controller LSI. Bilt-in Amp. C coupling small amplitude frequency input . operation. Carries out between controller the setting of frequency 4, (3) Serial input dividing number, dividing type, and the transfer of data oF for controlling IF counter, general purpose |/O ports. so Clock signal As TC9172AP has no serial output mode. 5, (4) cK input SO terminal does not exist. Oo Strobe signal SO terminal is P-ch open drain output, and SI, CK, STB Si cx, STB 6, (5) terminals are Schmitt trigger inputs. o input 1999-03-19 3/21
TOSHIBA TC9172AP,TC9227,28P fein no.|ymeo] PIN NAME | EXPLANATION OF FUNCTIONS AND OPERATIONS REMARKS 7 . Inputs auto stop signal. It can be used as general 7, —) | ASTP [Auto stop input | «pose input port also. (TC9227P, TC9228P) OF IF signal input of IF counter to detect auto stop. Built-in IFin [IF signal input |Amp. C coupling small amplitude operation (TC9227P, TC9228P). General purpose | Freely usable general purpose input terminal (TC9227P, 9, (>) INI input port TC9228P) O > omT1 “ 10, (©) | ¢ ana) “ 11, (7) “ Freely usable general purpose output terminals. 3K (IN3)[ They can be used for switching control signal output of 42, (8) | oT3 radio frequency circuit. ‘ General purpose @ TC9172AP : 4 O-«<- 13, 8) | ora | output ports @ 1C9227P :6 (9) © Tc9228P : 4 (Note) >< In TC9228P, 10, 11 pins are indicated as input 14, (—)| OTS port. 16, (10)) DO2 Yoo 16, 109] 002 | pase or Tri-state outputs of phase comparator. — 17, can] 00 | ne pe e DO1, DO2 are parallel outputs. i . Test mode control input. With pull-down resistance. 18, (12)| TEST | Test terminal Usually, used in OPEN state or GND connected. 19, (13) AM fot signal Programmable counter input at AM band. ' input 9 Built-in Amp. C coupling small amplitude operation. FM local Prescaler input at FM band. f 120MH. - ‘ inpu |. fMAX= z 21, (15) oneal signal Built-in Amp. C coupling small amplitude operation. ofsl Power supply | supply SV 10% terminal 20, (14) 1999-03-19 4/21
TOSHIBA TC9172AP,TC9227,28P 1/0 MAP @ TC9227P, TC9228P |1/O MAP Poo nT PURO OUTPUT TJ [ro [_ri_| 2 [rs | om | or | ors | om a te 8 bee tre pA] i oo JO SS asi [int [ina [3 | fo [Breiner ding ant’ u| ner puso outst [ro [_ri_| 2 [rs | om | or | ors | om a 2 [A [res Ts [os | ors KW 8 thee re ELS me Ts KWH ¢ [>> ame SON ra fo | 0 Jo | o | 1 | 0 |] 0] 1999-03-19 5/21
TOSHIBA TC9172AP,TC9227,28P @ 1TC9172AP 1/O MAP Sar Tn PRPORE GUT cope a eS NNT Pe a a a A a A oY Caer a] ea Dor or) on om & | pa | ps5 [ pe [ p7 | 2 ———a as above eee a 8 ee Poa foo Too foo foo fot fT oe (Note) TC9172AP contains no input port. As it contains IF counter, there is no control port of it. 1999-03-19 6/21
TOSHIBA TC9172AP,TC9227,28P OPERATIONS In TC9172AP, TC9227P, TC9228P as indicated in the block diagram, each function is controlled by accessing the ports connected with 4bit data bus © and code bus ©. Each data on this data bus and code bus is conducted from the controller LS! by four terminals of SI, SO, CK, STB (three terminals of SI, CK, STB in the case of TC9172AP). As control is all made with port, explanations will be given here chiefly about the functions of each port. These ports are constituted with 4bit units, and selected by 4bit code data. Code assignment of each port is shown in |/O map indicated previously. On the whole, code “OH~7H” is assigned to input port, and code “8H~FH” to output port. (Note 1) “Input port” and “Output port” mentioned here are always based on the controller LSI. Thus, the port served when putting out data from controller LSI is called the output port, while the port (which data is taken from PLL side) to controller LSI is called the input port. (Note 2) In this explanation, code assignment of each port is encoded as shown below. ¢ (K or L) mon L_ Low-ranking 3bit value “O~7” among 4bit code data. 1: 1/0 port relating to PLL. 2: 1/0 port of general purpose output terminal. Distinction between input/output port Ik : input ports L : output ports (Example) ¢K17 : General purpose input port ¢L21 : General purpose output ports OT1~OT4 © Programmable counter Programmable counter block is composed of two modulus prescaler, 4bit + 10bit programmable binary counter, and PLL I/O ports to control the above. 1, PLL 1/O ports (¢KL10~¢KL14) (1) Exclusive PLL ports to entirely control frequency dividing number, dividing type and IF correction (IF offset) at FM band. (2) In TC9227P, TC9228P PLL ports are entirely |/O port structure. Therefore, it is possible to take the set data again into the controller LS! by accessing input port. (¢K10~¢K14) 1999-03-19 7/21
TOSHIBA TC9172AP,TC9227,28P (3) PLL port configuration gu10 gut gr gu13 guia ON ABZ? PGE EILEEEIL EEE ILL SS NOT YET Heo +7 -1 eM PO PI P28 POPS PG OPT PROD PID PIT. «PI PI Use IF OFFSET FREQUENCY DIVIDING SETTING OF FREQUENCY DIVIDING NUMBER 14BIT OF PROGRAMMABLE COUNTER (4) Setting of frequency dividing type Selection of pulse swallow dividing type or direct dividing type is made by HF, FM ports. Make selection from the following three types according to the applied frequency band. RECEIVING INPUT INPUT FREQUENCY} HF | FM | FREQUENCY DIVIDING TYPE BAND FREQUENCY |reeninat| DIVIDING EXAMPLE RANGE NUMBER [0 [0 [Direct dviding ____[LW. MW, sw, [0S~ 10MHz | AM | on _| 1 1 Jo [1 [Notuse Pe 1 1 1 xX! Ise swalloy (S45 Fe) Pulse swallow FM 50~ 140MHz 2n type (Note) n represents programmed frequency dividing numeral value. (5) IF offset function at FM band When pulse swallow dividing type is selected, it is possible to vary actual frequency dividing number by +1 without changing the programmed dividing numerals by AIF +1 ports. Thus, it can be applied to IF offset at FM band. In the case of direct dividing type selection, IF off set function does not operate. _ FREQUENCY DIVIDING NUMBER A Pa Bane, po f of an poo fo a fe n=t) pa foo fe imet) a 1999-03-19 8/21
TOSHIBA TC9172AP,TC9227,28P (6) Setting of frequency dividing number Dividing number of programmable counter is set on PO~P13 ports with binary. @ At pulse swallow type (14bit) MSB USB [ro [oe [on Joo Le Too [fo [of fe [on] = | = 2 3X Frequency dividing number setting range (pulse swallow type) n=210H~3FFFH (528~ 16383) @ At direct dividing type (10bit) MSB Le [ie [oe [on | ve | [= | CGE: 7 = ~) ; ; UNRELATED 3X Frequency dividing number setting range (direct dividing type) n=10H~3FFH (16~1023) (Note 1) As the programmable counter is not provided with frequency dividing offset, the programmed dividing number becomes the actual frequency dividing number. However, in the case of FM band, the actual frequency dividing number becomes two times of programmed value. (Note 2) In the case of direct dividing type, PO~P3 port (¢L11) data become unrelated, and Pq port becomes LSB. (Note 3) Frequency dividing number is entirely renewed at the time of data setting of MSB port (¢L14). For this reason, the data of MSB port (¢L14) must be set at the end of dividing number setting. Even when the data setting is considered unnecessary (When the data is same as the previous one), the data setting must be executed for MSB port (¢L14). 1999-03-19 9/21
TOSHIBA TC9172AP,TC9227,28P 2. Circuit configuration of prescaler and programmable counter. (1) Circuit configuration of pulse swallow dividing type The circuit is composed of 1/15, 1/16 2-modulus prescaler and binary programmable counter of 4bit on N1 side and 10bit on N2 side. In the case of FM band, 1/2 divider is added to the front stage of prescaler. PO~P3 aw Nt COUNTER 7 ame L PRESET amin O-[> | TO PHASE x, {} P4~P13 (2) Circuit configuration of direct dividing type In this case, prescaler block is passed and N2 side counter 10 bits is used. PRESET AMP CT Pa~P13 (3) | Both FMjxy, AMjy terminals have built-in amp. and small amplitude operation is possible with capacitor coupling. © Phase comparator Phase comparator compares the phase difference between the reference frequency signal applied to REF terminal and programmable counter dividing output signal, and puts out its error component. Further, it controls VCO through low pass filter as that the frequency and phase of these two signals may agree with each other. 1. Two tri-state buffer DO1, DO2 terminals are put out in parallel from the phase comparator. For this reason, optimum design of filter constant can be made for each of FM/AM band. 2. Reference frequency signal is supplied from the controller LS! to the REF terminal, and no crystal oscillator is needed on PLL LSI. 3. REF input has built-in amp. and small amplitude operation is possible with capacitor coupling. 1999-03-19 10/21
TOSHIBA TC9172AP,TC9227,28P REFERENCE AMP net rw <] (= — supPLieD FROM THE CONTROLLER LS! VoD R Dot PHASE PROGRAMMABLE _$ con Ob i) COUNTER OUTPUT Lee Yop 002 Pe Vee oe es a ee ee t= * A RL ' i H Rp TO VARACTOR >t HI H po DIODE OF VCO i vt I | i 1 | HIGH LeveL Rt Do {porn yt --st-- FLOATING LOW LEVEL DO output timing chart Example of active low pass filter Shown above are indicated DO output timing chart and example of active low pass filter circuit by darlington connection of FET and transistor. © IF counter (TC9227P, TC9228P) TC9227P, TC9228P have IF counter which counts intermediate frequency (IF) of FM or AM during auto search tuning, and produces auto stop signal when that frequency has entered in the specified range. TC9172AP contains no IF counter. IF counter block is composed of 15bit presettable counter and IF counter control ports. AMP if PRESET DATA STOP | wen Frequency 7) CONTROL bef $KI6 ciRCUIT | | oh (tf, i @DATA BUS Ocoee Bus 1999-03-19 11/21
TOSHIBA TC9172AP,TC9227,28P 1. Operation of IF counter IF counter counts IF signal of 10.7MHz at FM band and 450kHz at AM band, and its gate- time is made of the reference frequency signal supplied to REF input. (1) IFijy terminal has built-in amp. and is capable of making small amplitude operation with capacitor coupling. (2) IF counter has two kinds of detectability, WIDE / NARROW. (3) | Gate time and detectability in each band are shown below. REFERENCE NARROW WIDE BAND |FREQUENCY| GATE TIME | DETECTABILITY | GATE TIME | DETECTABILITY (kHz) (ms) (Hz) (ms) (Hz) [iw [1] 20 _|_a5 0k 600 a5Ok# ZAK [sw [5 [ 40 | a5 0k 3k 450k # 12k ww ok 9 | 22 | 450ksak | 0.55 | 450k#21.6k MW 10k a50k=6k [0.50 | 450k # 24k [2s [16 | [oa | + + eee ee ee oe 2. IF counter control output port (1) REF code data output port (¢L15) It sets the code data corresponding to the reference frequency which serves as time base. Never fail to set the code of the presently employed reference frequency signal. @ Reference frequency code table gus Y GA Reference soma USED (Note) * : Code “1”, “3” can not use. 1999-03-19 12/21
TOSHIBA TC9172AP,TC9227,28P (2) IF counter control output port (¢L16) gli6 V AAA” NOT YET USED 0 us “1" : IF counter reset (IF counter RESET —IF counter operation does not operate.) reset "0" : IF counter normal operation ‘WIDE — WIDE / NARROW “1" ; WIDE mode selection “0” : NARROW mode START — IF count starts : IF count is started whenever data “1” is setting. (3) IF counter control input port ($K16) pKI6 Y AAA” NOT YET USED #1” + Inside of IF t detecti ‘STOP —— IF counter detection . width (top OK) etecting result (Auto stop “0” : Outside of IF count detecting signa width (stop NG) WIDE — WIDE /NARROW {oy : WIDE mode mode data input port \\“0” : NARROW mode __ A “1" : IFcounter is counting BUSY VF counter operating {ro : IF counter counting is completed (Note 1) In the case of auto stop detection by IF counter, refer to the contents of STOP port after confirmation that BUSY port is “0” (counting completed). (Note 2) IF counter cannot be used when reference frequency of 50kHz or 100kHz is used at FM band or when IF off set is carried out. The same applies to the case where frequency other than 10.7MHz and 450kHz is used for IF signal. O General purpose input and output ports They have general purpose input/output terminals controlled with 4bit units. However, TC9172AP has output terminals only. |_|] NUMBER OF INPUT ] NUMBER OF OUTPUT TERMINAL TERMINAL Tear | — iid LC [resazep | a SCidY SCY 1999-03-19 13/21
TOSHIBA TC9172AP,TC9227,28P (1) General purpose output ports (¢L21, L22) gt21 gl22 AAA Va oma a NOT YET ons USED ore os om1 OTs (Note) TC9172AP has no ¢L22 port. In the case of TC9228P, OT1, OT2 ports are not output terminals. The set data is put out in positive logic. Output terminals are CMOS structure. In TC9227P, TC9228P general purpose output ports are entirely |/O ports structure. Therefore, it is possible to take the set data again into the controller side by accessing input ports (¢K21, $K22). (2) General purpose input port (¢K17) eKi7 AAA ina IN2 AsTP (Note 1) In TC9227P, data of IN2, IN3 ports is “0”. Further, TC9172AP has no general purpose input port. (Note 2) A-STP port is for auto stop signal input use, but it can be applied to other use. Data is got in positive logic. Input terminals are CMOS structure. 1999-03-19 14/21
TOSHIBA TC9172AP,TC9227,28P © Serial 1/O ports As shown previously, each port is controlled through serial ports and serial bus line. Serial ports control the data transfer between the serial bus line and code data bus line of IC inside. Number of input/output terminals of serial port is as follows : TC9227P, TC9228P .. 4 terminals (SO, SI, CK, STB), with input port. SI, CK, STB terminals contain Schmitt trigger input, and SO terminal has P-ch FET open drain output construction. (Note) SO terminal needs external load resistance. (RL = 2k~3kQ) SERIAL BUS LINE TO TB Ky SI Ox VY VV V ‘SCHMITT Sbit SHIFT INPUT a -———> Ocone sus CONTROL I I ciRculT Sa CODE LATCH } STROBE SIGNAL (Note) > TC9172AP has no SO terminal. 1. Data transfer format (1) Data output timing (access of output port) STB l CODE DATA OUTPUT DATA Code data (C1~Cg) 4 bits of output port and output data (Y1~Y8) 4 bits are serially transferred to SI terminal with the timing shown above. SI data is read in with the rising of CK. (Note) During the designation of output port, code data “Cg” is “1” at all times. 1999-03-19 15/21
TOSHIBA TC9172AP,TC9227,28P (2) Data input timing (access of input port) STB J l l CODE DATA so SEE) INPUT DATA When code data (C1~Cg) 4 bits of input port is transferred to SI terminal with the above timing, the data of designated port is output to SO terminal with 4bit serial of Y1~Y8. SI data is read in with the rising of CK signal, and SO data is output with the rising of CK signal. (Note) During the designation of input port, code data “Cg” is “0” at all times. 2. Designation of chip select Besides PLL IC, various peripheral option ICs can be connected on the serial bus line. It is necessary, therefore, to designate the IC connected with controller LSI through bus line, between which data is to be transferred. Chip select code is provided to designate the controlled IC on the bus line. Select code for designating TC9172AP, TC9227P and TC9228P is as follows : © Chip select code for PLL 1/O ports 21 © Chip select code for general purpose output ports : 2 (1) Select code is set up to the chip select code data output port. (code “FH”) (2) Select code must be set up first at the time of serial data transfer. (3) Select code once set maintains the same data unless otherwise designated, and so, there is no need of designating select code every time serial data is transferred. 3. Pulse width of serial timing 2ys Min 2ps Min — i cK so ps Max 1999-03-19 16/21
TOSHIBA TC9172AP,TC9227,28P MAXIMUM RATINGS (Ta = 25°C CHARACTERISTIC SYMBOL RATING UNIT Supply Voltage [Vpp | _-03-60 | v_| Input Voltage =0.3~Vpp + 0.3 [Power Dissipation | Pp | 300 | mw | Operating Temperature [Storage Temperature | Tag | -55~125 | “c_| ELECTRICAL CHARACTERISTICS (Unless otherwise specified, Ta = 25°C, Vpp =5V) TEST CHARACTERISTIC SYMBOL TEST CONDITION fn, ve. | ma | UNIT CUIT Operating Supply VI . Vv Voltage Range DD 5.5 ce | we [= |rmcvome |= Ls] [oe Current Operating frequency range FMIN fru | 1 [VIN=0.5Vp-p *] 507 ~ J 140 [ Miz | FIN fra VIN=O3Vp- [50 = [120 we | [amin (HF Wode) | tamu | 1 [Viv=0.3Vp» | _8| ~ | 60_| Mie | AM (UF Mode) Vin=0:3Vpp [os [ = [10 [wie | Fy [tie | — [ViIn=03Vp- [oa = [13 wee | REF Input fer | — [Vin=02Vp-p t= [100] ee | Operating input amplitude range FMIN Vina (Fw) | 1 [fin =50~140MH2 * 7 057 ~ |Vpp=0.5] Vio | Vin2 (et) |__| fin = 50~120MH2 = [03 | = |vpp=05) Veo | AM (HF Mode) fiy=8~G0MHZ [793 [ = Wop=05| Vor | AMin (LF Mode) Vin (Amt) | 1 | fin =0.5~10MHz * 7 03] ~ [Vpp-05| Vp-p | Vin cf) | = [fin=0.4=13MHe [03 = \\vpp=03| Vor | REF Input Vin ner) | — [f= 1~T00kHe 702, =] voo | Voe | OT1~6, DO1~2, SO “H" Level lou VOH =4V, SO terminal is Output excepted 7 7 mA Current “L” Level | VoL=1V, SO terminal is ot excepted SO Terminal Output | VoOH =4V 2. -3. A Serre Te [fore [el ae — oe SO Terminal Off Leak DO Terminal Tri-State | Vv: =5V, V- =0V 0: A fteege caren | te |= [mvc vracoy | = | = | 208 | oa | 1999-03-19 17/21
TOSHIBA TC9172AP,TC9227,28P IN1~3, SI, CK, STB, A-STP input [7H” level | tw —[va=svSSSCSCSCr TT TO, current [PL Level_ |i | = |wu=ov SSS | — | 10] input ["H7 tevel_| Vw [—| =| 40[ =| 50], Voltage [LP tevel | vy =] = +d So = [10 (Note) : * Marked characteristics are guaranteed in a range of Vpp =4.5~5.5V, Ta= -30~75°C. 1999-03-19 18/21
TOSHIBA TC9172AP,TC9227,28P TEST CIRCUIT TC9227P, TC9228P TC9172AP GND Vpp MONITOR GND Vpp MONITOR o oO © oO ol © g 3 200 2002 - ne v { S Ne y /| S oof TTT oor fe oo TTT ooo F REF FMIN Fy © sc REF FMIN Fy © sc sO st AMIN © sc «oO cK AMIN © sc A-STP pO2 om OT2 po2 o FIN oT6 © 073 oT4 ) OT1/(IN2) OTS OD fout D fout EXAMPLE FOR APPLICATION CIRCUIT (TC9227P) sv y cc
1 Ed ele | Lo
TC9301AN, TC9302AF, STB 6 7 ‘SERIES 8 15 0 3 _ output port| | auto stop siGNaL 1999-03-19 19/21
TOSHIBA TC9172AP,TC9227,28P OUTLINE DRAWING DIP22-P-400-2.54 Unit : mm 22 12 T im ee ° | |e + Ud ‘{ | ° 38 FP 1 cry so 27.8MAX. Q.95+0.1 H ow We MW eg MU A est 610.25 @) Weight : 2.1g (Typ.) 1999-03-19 20/21
TOSHIBA TC9172AP,TC9227,28P OUTLINE DRAWING DIP16-P-300-2.54A Unit : mm 18 aes Ss 6 | J g 8 Py A g 1 8 19.75MAX Q.95+0.1 rsT 2 MEE MEE est § z 2 —8 oO Weight : 1.0g (Typ.) 1999-03-19 21/21