TC9106BP

TC9106BP TOSHIBA | Alldatasheet

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\\\\\\\\\\ erties) Q oe ~ A ~ \\\\W eee Be “| TENTATIVE , - . : Unit in om TCS1O6BP CB TRANSCEIVER PLL FREQUENCY SYNTHESIZER - = 0 * ‘'TC9LO6BP (C-MOS LSI) may be used @ 40 channels CB transceiver frequency synthesizer, by e 9 ~ Included high speed programmable counter, . opérated direct division of VCO, can be used SEB MAT | Se a. # simplified external circuit high quality 3 . . “PLL synthesizer in two-way. f > Outline is a 18 pin DIP, E| assare on one . . . 3 a aap Bas mos “ some Jend pitch ie 25¢ and tolerence io _- #026 ageinat theoretical center of each lead that i@ obtained on the . TEDEO — . TOSHIBA SDIGA-P . . . : PIN CONNECTION cee : - vp fh. as PX ° oe Ray ls wy , "MAXIMUM RATINGS ( Ta = 25°C ) : “Es ad alld cumererics [somo [mmm [mr] wal, ny Supply Voltage. | Yoo | =0,3%410 M . Operation Temperature -30 +70 argc wis Storage Temperature [seas | *c| ‘loess . . solr ay 4 “et - : . TRE ur, . . a. * Pm ffo 20 o seacoast ee ee a Sear seer AUDIO DIGITAL IC== : Het 7 - 1 a

~ T-50-17 | A\\N\\\\\\\\ . ta . . : ta ANY A. . sss eel ELECTRICAL CHARACTERISTICS (Unless otherwise specified Ypp=8v, Riyw10.24Mils, Ta~25*C) j [| _wwtcrousne "| somocE Efi] vase eowreron [am | er. | oat, [ow | Operating Supply Voltage "| Von _| | 8.0 | as |v | . Operating Supply Current [tp | Vpn"8V, fry=16MHz [1s [25 | aa] PROGRAMMABLE COUNTER z [Vatiageretns Tact hrc] | | =| ve-o| REFERENCE FREQUENCY DIVIDER - Max. Operating Frequeney | fuax |__| Von-?.3¥ | wl - i] - [wm aa 2) “"H" LEVEL OUTPUT CURRENT Do Output Ao Output CL Output [roe] | Yaw7¥ LD Output | 20% LD] . "LY LEVEL OUTPUT CURRENT Do Output ToL Do D Ca oy | Voursy = es [=] [iD Output sf ton | a ce Do TRI-STATE LEAKAGE [aval Tea jet ter || -[ =] [= ‘ AMPLIFIER d Toput "a" Levi “VrH~8V . Leakage Current |" Level [new] Po P7, 1/R ar ; j | 20 {so [20 | a] Low Level Input Voltage ee ee . a : ;

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\\\\\\\\\\ FEATURE - + Single X-tal (10.24miz), ALL 40 channels CB transceiver. . Direct division of VCO oscillation frequericy due to high speed programmable counter, not necessary mixing down. ° . The following Fig. 1 and Pig. 2 show che external circuit difference between present single X-tal type and TC9LO6BP (Toshiba new single K-tal). TC9LO6BP - : can sinplify external circuit. . Fig. 1 PRESENT SINCLE X-TAL METHOD -. Fig. 2 TC9106HP DIRECT . 8 SmuCLE x 8: * prvision METHOD - | — a Direct Countdown SaeMne orf 28 + Programmable counter has frequency devide shift. function so that vCO oscillation > frequency may shift 455kHe, equivalent to 2nd IF frequency, automatically be s external switch. Sasa es ee ee AUDIO DIGITAL IC=x: ; . Bo ag

. * Can be programmed by 2 digit, 7 segment type LED drive code because of included code converter in internal channel selection program circuit. Therefore o convenient to rotary switch/LED channel indicator type, and also can use conventional rotary switch. * : + Included a detector of misprogram. ° -- Detected wrong program and can be stopped PLL function at the moment. * Included a detector of lockout. : When switched tranamitting/receiving or channel, can detect instant lockout state, and make transmitting power hold for a short time. This hold time may by determinded by value of external capacitor. This function in effective as . a audio muting against shock noise in channel change. -- 4 , : ae Ph -30-

were ey on rer oe nee ore ng nen apres | sew woo \\\\ TCS106BP \\\\\\ . BLOCK DIAGRAM : : . amy > . 1" Oar Phase Comparator \\7 Pm LD] Z * y° . | | Tn, TL, I. HAR AM BH RF Cr BRIEF EXPLANATION OF EACH BLOCK PERFORMANCE . 1. STANDARD FREQUENCY DIVIDER (11 BIT REFERENCE DIVIDER) . * Standard frequency divider generate 5kliz, PLL standard frequency by 1l-stage , binary counter (supplied 10.24miz signal frou Ryy terminal). . ° Ry input circuit has self-biased amplifier, input signal through a coupling : capacitor is enough about 1 Vp-p sinesoidal wave. . . 2 er . Re= tor? : . : . . =tel 100 pr ree) . . 1O24MEB Bw . SS eee AUDIO DIGITAL ICx= a Ley -in— .

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: t : 2. _ PROGRAMMABLE COUNTER (13 BIT PROGRAMMABLE COUNTER) . * Programmable counter is a 13 bit variable divider. Divided by indicated divide ratio from code converter binary code which is mentioned in following. * TC9106BP has special high speed programmable counter, maximum operation frequency is higher than 20 MHz at Vpp=8V. Therefore can be divided directly by . programmable counter without VCO oscillation frequency mixingdown in two ways. * Divide tange of progranmable counter is 3345 3433 division (in transmitting) “and 3254 3342 division (in receiving). - . . * Pin input has a self biased amplifier as like as Ryy input circuit. Therefore * low input signal like higher than 2 Vp-p (16MHz) sinesoidal wave through a “coupling capacitor is sufficient to operate it, 5 3. CODE CONVERTER . . * Po \\ P7 channel selection are programmed by 2 digit, 7 segment LED indication code. Code converter include read only memory (ROM) to convert Po \\ P7 input code to 13 bit binary code.-- + «+ - * This code converter include control terminal (/R) to shift 2139 from the standard programmable counter division number in two ways. Obtained 10.695 MHz in case standard frequency is 5 kHz for example. When T/R is L or open, it is receive-state, when T/R is H, it is transmit-state, ’ * Po V P7-input terminals include pull-up resistor respectively, read H level in : : case of open, lead connection between Py v P7-and LED is as follows. a . 7 seo ORE ae . Ypp - ~ 2°. Fy ft : TURBAL Boe: Raz —— ° . Py fee] A - hy F “ re) ) © \\O aot é and Digit let Digit . \\ y y y Yeo ow se TOS HIB A 222s iit ere nee torte er me ere ema tetera ese ie . : |

. a 7 4 pes TOSHIBA, ELECTRONIC O2 DEM} 1057247 oo1zaeo s : T-50-17 4, MISPROGRAM DETECTOR * Detect any wrong code except normal 1 V 40 channels from input, When wrong code is detected, controlled lockout detector. This circuit changes . LD output level to be L-level and makes phase converter performance stop simultaneously. * Protect perfectly performance against any external interference, for instance cause by rotary switch wrong contact. . . ° 5. PHASE COMPARATER . - - * Phase comparater generates proper VCO control voltage, compared frequency and phase between 5 kHz, standard frequency, and ‘programmable counter divided ~ output signal. . . * $ and R input signal rise-phases are compared.” When S input signal phase advances Dg output become to be H level, when delays Do output become L level. i Otherwise Dg output is held to be high impedance state. + Do terminal output signal controls VCO by converting DC level through low pass | filter which has proper time ‘constant. . Performance waveforms in phase comparater are shown below. FIG. 3 PHASE COMPARATER WAVEFORM [ eo soe (Note) Lo output is supplied to detector. . [coc AUDIO DIGITAL ICx b : yet —33— . - - q a

SS “BA, co 7 go1eel 7 BP -—; Ves TOSHIBA. ELECTRONIC 02 Deg sos7e4? ooL? 7 a TC9106BP ) a 6. LOCKOUT DETECTOR * Detects lockout state and supplys L level signal to LD terminal when abnormal phenomena occur in external circuit, for example PLL lockout caused at channel. selection or on/off of press talk switch. . . * LD terminal turns to L level in case that misprogram detector circuit operate | like as lockout state. 0 , : 7 + After lockout (L level), LD terminal is held for determinded period, then returns H level. The constant time period can be choosed by capacitor value between . CL terminal and ground. : * To prevent wrong performance from external noise or vibration, designed to operate at the condition more than 10 sec., pulse width of Lo signal L level. (equivalent to that lockout detector operates at more than about + 20°, phase difference between § and R input phase. ‘ . . * Fig. 4 shows logic diagram of lockout detector, Fig. 5 shows waveform. FIG. 4 LOGIC DIAGRAM . Lo output in phaso lo Pules width _ comparater Detector D ID : Output of. * M.Prog: A : : . mieprogram defector 250~1000 KC) i . . ., oL Pr a FIG. 5 OPERATION WAVEFORM ~ - - : : . . Internal R and on’, External 0 . 0 a ee en == TOS HIB A s2sesecsssrese eee cence enon nett merncaoraerrerermmemrnmseer : at —34—

Cee 24. AMET SL cRIEINS SoS SETS RENN A TS FI I SER iM ak Wee TOSHIBA, ELECTRONIC G2 DEM 109724? OOl?aee 4 3 . T-50-17 PROGRAM CODE TABLE (Note) oshow "H" level fycg=Nx0.005 (Miz) cuanned, ROGRAM CODE R/T=L_ (RECEIVE) R/T=H (TRANSMIT) ma apelin pees Pte [roo | r3-o}2fefetete te fe | se [aear | sais 6.75 | | 2 Po fT fo fo fo | 3256 p 3 Tol | fol To fo fo | 3258 | 16.29 | 3349] 16.745 | J 4 | fol Te folto fo tol 3262 | i6.31 | 3353 | 16.765] | 5 of fo | To To fo | 3264 [16.32 | 3355 [16-775] . ital tote tots ete ee ae ere | 7 | 32 Lama et see} aa} te 3363 | 16.815 | 9 | | fe Foto fo fo | 3274 [16.37 | 3365 | “10 fo fo Fo [3276 16.38 | 3367] 16-835] Le fee te tet te fo [sre =| 16.39 aaa Tas. 005 | a2 Po PP Pe Fo | 3282 | a3 fo [fo | fo Fo | 3284 P1642} 3375} 16-875] | 14 | fo fo To | fo to | 3286 | "16.43 | 3377} _ 16. 883 —] et te te fet a20e esas 379 [16895 | . | ie fo TP Tr to | 7 jaz to | lo to fo | fo [o | 3294 [16-47 | 3385 | 16.925 | pas [Jo To | 3296 | 16.48} 3387 | 16.935] } 19 | fe fo} fo fo [3298 | 16.49] 3389 | “16-995 | | 20 | fo yy fo | fo | 3302 |" 16.51 [3393] 16.965] | 21 [oto lo to fo fo | To | 3304 {16.52 |-_3395 | 16-975 —| [22 To yy fo | oF 3306 | “6.53 [3397 | 16.985] | 23 oe || fot fo | To | 3312 | "16.56 | 3403 | 17015] [24 | fo | fo fe to | fo | 3308 [16.54 |" 3399 | 16-993] pas | | fo | fo | fof ~3310 | i6.55 | 3401} 17-008] p26 | fo Ty | fo [To 3314 | 16:57} 3405 | 17-028 | } 27 Jo | lo fo fo To [lo | 33167 [16:58 | 3407 | 17.035 | [28 fo fo | 3318 | 16.59} 3409 17-043 | } 29 | fe fo fo | to | 3320 | 16.60] 34a. | 17.055 | : } a0 fo fof 33224661 | 3413 [17.065] : [2 Jo [eo fo fo fo [| fo | 3324 [16.62 | _3uas | 17.075] }—32 To fo | 33261663 347] 1708s] | 33 fo |) to | | Fo} 3328 | 16: 64 | 3419 | 17095 —] p34 | fo} fo fo | fo | 33301665 | 3421 J 17-108] pas Pe) oF 3332 16.68 3423 ads] 36 foo 33361667} 3425 37-195 [37 fo | to to fo | | fo | 3336 [16:68 | 3427. | “17-135 —] p38 fo | 3338 16.69 | 3829 a7] 39 fo fo | fof 3360 36.70 | 343117155] Lo [| fo PY fe 3342 67 | 3433 ares] (Note) Rotary switch Pg v P7 : None-mark is "ON", o-mark is "OPEN" Fee a te So AAYIDIO DIGITAL ICs: . : = 35- .

| ae i TOSHIBA, ELECTRONIC O2 DEM 909724? 0017423 O I : Ries leaxe se csc Ts 0 TITRE CRRA RE Serena or wo oe ~ >: . —— PERFORMANCE AGAINST WRONG-PROGRAM . © TC9106BP include a program data code ROM, respectively only 40 channel, regulated by FCC rules. . Any external channel selection program can determine the data out of the programmable counter in the IC directly, and cannot generate the any other EL frequency except only formal 40 channel frequencies. © TC9106BP include eight program input terminals because of LED drive code. SO these are 256 combinations due to eight inputs theoretically, however, this IC is designed to detect only formal 40 channel combinations. At the other combinations, this IC detécts wrong code combinations or mis- . programs, then make a phase comparator performance in the IC stop and trans~ mitting output of two way radio is cut off by generated lockout signal at the moment. - o As the above mentioned, TC9106BP is designed to prevent any abnormal - performances and interferences perfectly due to channel selection failure, illegal modification, or any other malfunctions. Following are an explanation on circuit performance. When the 8 bit channel data is put into ROM-1, if the channel data is one of normal 1% 40 channel, output of ROM-1 is sent to ROM-2 and the output "of NOR gate is L-level : When the input channel data is the wrong except normal 1 ~ 40 channel, 7 * the NOR output changes H-level. . _ At the same time, this circuit changes LD output level to be L-level . “and make phase comparator performance stop. sot OS HIB A eres senescent nme cc cc ance eccrine | —36—- : hk

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