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Document overview
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- PDF pages: 20
Technical content
Features
- Wide Input Voltage Range: +1.5V to +10V
- Efficient Voltage Conversion (99.9%, typ)
- Excellent Power Efficiency (98%, typ)
- Low Power Consumption: 80 µA (typ) @ V IN = 5V
- Low Cost and Easy to Use - Only Two External Capacitors Required
- Available in 8-Pin Small Outline (SOIC), 8-Pin PDIP and 8-Pin CERDIP Packages
- Improved ESD Protection (3 kV HBM)
- No External Diode Required for High-Voltage Operation
Applications
- RS-232 Negative Power Supply
- Simple Conversion of +5V to ±5V Supplies
- Voltage Multiplication V OUT = ± n V+
- Negative Supplies for Data Acquisition Systems and Instrumentation Package Types General Description The TC7660 device is a pin-compatible replacement for the industry standard 7660 charge pump voltage converter. It converts a +1.5V to +10V input to a corre- sponding -1.5V to -10V output using only two low-cost capacitors, eliminating inductors and their associated cost, size and electromagnetic interference (EMI). The on-board oscillator operates at a nominal fre- quency of 10 kHz. Operation below 10 kHz (for lower supply current applications) is possible by connecting an external capacitor from OSC to ground. The TC7660 is available in 8-Pin PDIP, 8-Pin Small Outline (SOIC) and 8-Pin CERDIP packages in commercial and extended temperature ranges. Functional Block Diagram TC7660 NC CAP+ GND CAP- VOUT LOW VOLTAGE (LV) OSC PDIP/CERDIP/SOIC TC7660 GND Internal Voltage Regulator RC Oscillator Voltage Level Translator V+ CAP+ OSC LV Logic Network VOUT CAP-42 Internal Voltage Regulator Charge Pump DC-to-DC Voltage Converter
DS21465C-page 2 2002-2011 Microchip Technology Inc.
1.0 ELECTRICAL
Absolute Maximum Ratings* LV and OSC Inputs Voltage: (Note 1) Package Power Dissipation: (TA 70°C) Operating Temperature Range: * Notice: Stresses above those listed under “Maximum Rat- ings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Expo- sure to maximum rating conditions for extended periods may affect device reliability. FIGURE 1-1: TC7660 Test Circuit. ELECTRICAL SPECIFICATIONS TC7660+ (+5V) VOUT 10 µF COSC 10 µF IL RL IS Electrical Characteristics: Unless otherwise noted, specifications measured over operating temperature range with V+ = 5V, COSC = 0, refer to test circuit in Figure 1-1. Parameters Sym Min Typ Max Units Conditions Supply Current I+ — 80 180 µA R L = Supply Voltage Range, High V + H 3.0 — 10 V Min TAMax, RL = 10 k, LV Open Supply Voltage Range, Low V + L 1.5 — 3.5 V Min TAMax, RL = 10 k, LV to GND Output Source Resistance ROUT — 70 100 IOUT=20 mA, TA = +25°C — — 120 I OUT=20 mA, TA +70°C (C Device) — — 130 I OUT=20 mA, TA +85°C (E and I Device) — 104 150 I OUT=20 mA, TA +125°C (M Device) — 150 300 V + = 2V, IOUT = 3 mA, LV to GND 0°C TA +70°C — 160 600 V + = 2V, IOUT = 3 mA, LV to GND -55°C TA +125°C (M Device) Oscillator Frequency fOSC — 10 — kHz Pin 7 open Power Efficiency PEFF 95 98 — % R L = 5 k Voltage Conversion Efficiency VOUTEFF 97 99.9 — % R L = Oscillator Impedance ZOSC —1 . 0— M V+ = 2V Note 1: Destructive latch-up may occur if voltages greater than V + or less than GND are supplied to any input pin.
2002-2011 Microchip Technology Inc. DS21465C-page 3 TC7660
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, C1 = C2 = 10 µF, ESRC1 = ESRC2 = 1 , TA = 25°C. See Figure 1-1. FIGURE 2-1: Operating Voltage vs. Temperature. FIGURE 2-2: Output Source Resistance vs. Supply Voltage. FIGURE 2-3: Frequency of Oscillation vs. Oscillator Capacitance. FIGURE 2-4: Power Conversion Efficiency vs. Oscillator Frequency. FIGURE 2-5: Output Source Resistance vs. Temperature. FIGURE 2-6: Unloaded Oscillator Frequency vs. Temperature. Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. -25 0 +25 +75 +100 +125 +50-55 SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE RANGE 7 8 10k 100ΩOUTPUT SOURCE RESISTANCE (Ω) 6 5 4 3 2 1 0 SUPPLY VOLTAGE (V) 10Ω OSCILLATOR CAPACITANCE (pF) 10kOSCILLATOR FREQUENCY (Hz) 100 10 100 1000 10k V+ = +5V OSCILLATOR FREQUENCY (Hz) 100POWER CONVERSION EFFICIENCY (%) 100 1k 10k V+ = +5V IOUT = 1 mA IOUT = 15 mA 500 450 400 200 150 100 -55 -25 0 +25 +50 +75 +100 +125 TEMPERATURE (°C) OUTPUT SOURCE RESISTANCE (Ω) V + = +2V V + = +5V IOUT = 1 mA TEMPERATURE (°C) OSCILLATOR FREQUENCY (kHz) -55 -25 0 +25 +50 +75 +100 +125 V+ = +5V
2002-2011 Microchip Technology Inc. DS21465C-page 5 TC7660
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE
3.1 Charge Pump Capacitor (CAP +)
Positive connection for the charge pump capacitor, or flying capacitor, used to transfer charge from the input source to the output. In the voltage-inverting configura- tion, the charge pump capacitor is charged to the input voltage during the first half of the switching cycle. Dur- ing the second half of the switching cycle, the charge pump capacitor is inverted and charge is transferred to the output capacitor and load. It is recommended that a low ESR (equivalent series resistance) capacitor be used. Additionally, larger values will lower the output resistance.
3.2 Ground (GND)
Input and output zero volt reference.
3.3 Charge Pump Capacitor (CAP -)
Negative connection for the charge pump capacitor, or flying capacitor, used to transfer charge from the input to the output. Proper orientation is imperative when using a polarized capacitor.
3.4 Output Voltage (V OUT)
Negative connection for the charge pump output capacitor. In the voltage-inverting configuration, the charge pump output capacitor supplies the output load during the first half of the switching cycle. During the second half of the switching cycle, charge is restored to the charge pump output capacitor. It is recommended that a low ESR (equivalent series resistance) capacitor be used. Additionally, larger values will lower the output ripple.
3.5 Low Voltage Pin (LV)
The low voltage pin ensures proper operation of the internal oscillator for input voltages below 3.5V. The low voltage pin should be connected to ground (GND) for input voltages below 3.5V. Otherwise, the low voltage pin should be allowed to float.
3.6 Oscillator Control Input (OSC)
The oscillator control input can be utilized to slow down or speed up the operation of the TC7660. Refer to Section 5.4 “Changing the TC7660 Oscillator Fre- quency”, for details on altering the oscillator frequency.
3.7 Power Supply (V +)
Positive power supply input voltage connection. It is recommended that a low ESR (equivalent series resis- tance) capacitor be used to bypass the power supply input to ground (GND). Pin No. Symbol Description
1 NC No connection
2C AP+ Charge pump capacitor positive terminal
3 GND Ground terminal
4C A P - Charge pump capacitor negative terminal 5V OUT Output voltage 6 LV Low voltage pin. Connect to GND for V+ < 3.5V 7 OSC Oscillator control input. Bypass with an external capacitor to slow the oscillator + Power supply positive voltage input
DS21465C-page 6 2002-2011 Microchip Technology Inc.
4.0 DETAILED DESCRIPTION
4.1 Theory of Operation
The TC7660 charge pump converter inverts the voltage applied to the V+ pin. The conversion consists of a two- phase operation ( Figure 4-1). During the first phase, switches S2 and S4 are open and switches S 1 and S3 are closed. C1 charges to the voltage applied to the V+ pin, with the load current being supplied from C 2. Dur- ing the second phase, switches S 2 and S4 are closed and switches S 1 and S 3 are open. Charge is trans- ferred from C 1 to C 2, with the load current being supplied from C1. FIGURE 4-1: Ideal Switched Capacitor Inverter. In this manner, the TC7660 performs a voltage inver- sion, but does not provide regulation. The average out- put voltage will drop in a linear manner with respect to load current. The equivalent circuit of the charge pump inverter can be modeled as an ideal voltage source in series with a resistor, as shown in Figure 4-2. FIGURE 4-2: Switched Capacitor Inverter Equivalent Circuit Model. The value of the series resistor (R OUT) is a function of the switching frequency, capacitance and equivalent series resistance (ESR) of C1 and C2 and the on-resis- tance of switches S 1, S 2, S 3 and S 4. A close approximation for R OUT is given in the following equation: EQUATION
4.2 Switched Capacitor Inverter
The overall power loss of a switched capacitor inverter is affected by four factors: 1. Losses from power consumed by the internal oscillator, switch drive, etc. These losses will vary with input voltage, temperature and oscillator frequency. 2. Conduction losses in the non-ideal switches. 3. Losses due to the non-ideal nature of the external capacitors. 4. Losses that occur during charge transfer from C 1 to C2 when a voltage difference between the capacitors exists. Figure 4-3 depicts the non-ideal elements associated with the switched capacitor inverter power loss. FIGURE 4-3: Non-Ideal Switched Capacitor Inverter. The power loss is calculated using the following equation: EQUATION GND S3 S1 S2 VOUT = -VIN ROUT VOUT ROUT RSW on-resistance of the switches= ESR C1 equivalent series resistance of C1= ESR C2 equivalent series resistance of C2= fPUMP fOSC Where: LOAD C1 C2 RSW IDD ESRC1 RSW RSW S3 RSW ESRC2 IOUT PLOSS IOUT
2 ROUT IDD V++=
2002-2011 Microchip Technology Inc. DS21465C-page 7 TC7660
5.0 APPLICATIONS INFORMATION
5.1 Simple Negative Voltage
Figure 5-1 shows typical connections to provide a negative supply where a positive supply is available. A similar scheme may be employed for supply voltages anywhere in the operating range of +1.5V to +10V, keeping in mind that pin 6 (LV) is tied to the supply negative (GND) only for supply voltages below 3.5V. FIGURE 5-1: Simple Negative Converter. The output characteristics of the circuit in Figure 5-1 are those of a nearly ideal voltage source in series with a 70resistor. Thus, for a load current of -10 mA and a supply voltage of +5V, the output voltage would be -4.3V.
5.2 Paralleling Devices
To reduce the value of ROUT, multiple TC7660 voltage converters can be connected in parallel ( Figure 5-2). The output resistance will be reduced by approximately a factor of n, where n is the number of devices connected in parallel. EQUATION While each device requires its own pump capacitor (C1), all devices may share one reservoir capacitor (C2). To preserve ripple performance, the value of C 2 should be scaled according to the number of devices connected in parallel.
5.3 Cascading Devices
A larger negative multiplication of the initial supply volt- age can be obtained by cascading multiple TC7660 devices. The output voltage and the output resistance will both increase by approximately a factor of n, where n is the number of devices cascaded. EQUATION FIGURE 5-2: Paralleling Devices Lowers Output Impedance. FIGURE 5-3: Increased Output Voltage By Cascading Devices. TC7660 VOUT* 10 µF * VOUT = -V+ for 1.5V V+ 10V 10 µF ROUT ROUT of TC7660 VOUT n– V+= ROUT nR OUT of TC7660= “n” “1” RL TC7660C1 TC7660C1 VOUT * “1” TC766010 µF * VOUT = -n V+ for 1.5V V+ 10V “n” TC766010 µF 10 µF + 10 µF
DS21465C-page 8 2002-2011 Microchip Technology Inc.
5.4 Changing the TC7660 Oscillator
The operating frequency of the TC7660 can be changed in order to optimize the system performance. The frequency can be increased by over-driving the OSC input (Figure 5-4). Any CMOS logic gate can be utilized in conjunction with a 1 k series resistor. The resistor is required to prevent device latch-up. While TTL level signals can be utilized, an additional 10 k pull-up resistor to V + is required. Transitions occur on the rising edge of the clock input. The resultant output voltage ripple frequency is one half the clock input. Higher clock frequencies allow for the use of smaller pump and reservoir capacitors for a given output volt- age ripple and droop. Additionally, this allows the TC7660 to be synchronized to an external clock, eliminating undesirable beat frequencies. At light loads, lowering the oscillator frequency can increase the efficiency of the TC7660 ( Figure 5-5). By lowering the oscillator frequency, the switching losses are reduced. Refer to Figure 2-3 to determine the typi- cal operating frequency based on the value of the external capacitor. At lower operating frequencies, it may be necessary to increase the values of the pump and reservoir capacitors in order to maintain the desired output voltage ripple and output impedance. FIGURE 5-4: External Clocking. FIGURE 5-5: Lowering Oscillator Frequency.
5.5 Positive Voltage Multiplication
Positive voltage multiplication can be obtained by employing two external diodes ( Figure 5-6). Refer to the theory of operation of the TC7660 ( Section 4.1 “Theory of Operation”). During the half cycle when switch S 2 is closed, capacitor C 1 of Figure 5-6 is charged up to a voltage of V + - VF1, where VF1 is the forward voltage drop of diode D 1. During the next half cycle, switch S 1 is closed, shifting the reference of capacitor C1 from GND to V+. The energy in capacitor C1 is transferred to capacitor C2 through diode D2, pro- ducing an output voltage of approximately: EQUATION FIGURE 5-6: Positive Voltage Multiplier.
5.6 Combined Negative Voltage
Conversion and Positive Supply Multiplication Simultaneous voltage inversion and positive voltage multiplication can be obtained (Figure 5-7). Capacitors C1 and C3 perform the voltage inversion, while capaci- tors C2 and C4, plus the two diodes, perform the posi- tive voltage multiplication. Capacitors C 1 and C 2 are the pump capacitors, while capacitors C 3 and C 4 are the reservoir capacitors for their respective functions. Both functions utilize the same switches of the TC7660. As a result, if either output is loaded, both outputs will drop towards GND. CMOS GATE 1k VOUT“1” TC766010 µF 10 µF VOUT TC7660C1 COSC VOUT 2 V+ VF1 VF2+– = where: VF1 is the forward voltage drop of diode D1 and VF2 is the forward voltage drop of diode D2. + C2 D1 D2 + C1 VOUT = TC7660 (2 V+) - (2 VF)
2002-2011 Microchip Technology Inc. DS21465C-page 9 TC7660 FIGURE 5-7: Combined Negative Converter and Positive Multiplier.
5.7 Efficient Positive Voltage
Since the switches that allow the charge pumping operation are bidirectional, the charge transfer can be performed backwards as easily as forwards. Figure 5-8 shows a TC7660 transforming -5V to +5V (or +5V to +10V, etc.). The only problem here is that the internal clock and switch-drive section will not operate until some positive voltage has been generated. An ini- tial inefficient pump, as shown in Figure 5-7, could be used to start this circuit up, after which it will bypass the other (D 1 and D2 in Figure 5-7 would never turn on), or else the diode and resistor shown dotted in Figure 5-8 can be used to “force” the internal regulator on. FIGURE 5-8: Positive Voltage Conversion. +C1 VOUT = TC7660 (2 V+) - (2 VF) VOUT = -V+ VOUT = -V- 1M V- input TC7660 10 µF 10 µF
DS21465C-page 10 2002-2011 Microchip Technology Inc.
6.0 PACKAGING INFORMATION
6.1 Package Marking Information
Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. TC7660C OA 12083e 8-Lead SOIC (3.90 mm) Example NNN Example TC7660C OA1208 256 256 8-Lead CERDIP (.300”) Example XXXXXNNN XXXXXXXX YYWW Example TC7660 MJA 256 TC7660 MJA256 1208 1208 8-Lead PDIP (300 mil) Example XXXXXXXX XXXXXNNN YYWW Example TC7660 CPA 2563e TC7660 CPA256 1208 1208
2002-2011 Microchip Technology Inc. DS21465C-page 11 TC7660 /g27/g16/g47/g72/g68/g71/g3/g51/g79/g68/g86/g87/g76/g70/g3/g39/g88/g68/g79/g3/g44/g81/g16/g47/g76/g81/g72/g3/g11/g51/g36/g12/g3/g177/g3/g22/g19/g19/g3/g80/g76/g79/g3/g37/g82/g71/g92/g3/g62/g51/g39/g44/g51/g64 /g49/g82/g87/g72/g86/g29 /g20/g17 /g51/g76/g81/g3/g20/g3/g89/g76/g86/g88/g68/g79/g3/g76/g81/g71/g72/g91/g3/g73/g72/g68/g87/g88/g85/g72/g3/g80/g68/g92/g3/g89/g68/g85/g92/g15/g3/g69/g88/g87/g3/g80/g88/g86/g87/g3/g69/g72/g3/g79/g82/g70/g68/g87/g72/g71/g3/g90/g76/g87/g75/g3/g87/g75/g72/g3/g75/g68/g87/g70/g75/g72/g71/g3/g68/g85/g72/g68/g17 /g21/g17 /g134/g3/g54/g76/g74/g81/g76/g73/g76/g70/g68/g81/g87/g3/g38/g75/g68/g85/g68/g70/g87/g72/g85/g76/g86/g87/g76/g70/g17 /g22/g17 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g86/g3/g39/g3/g68/g81/g71/g3/g40/g20/g3/g71/g82/g3/g81/g82/g87/g3/g76/g81/g70/g79/g88/g71/g72/g3/g80/g82/g79/g71/g3/g73/g79/g68/g86/g75/g3/g82/g85/g3/g83/g85/g82/g87/g85/g88/g86/g76/g82/g81/g86/g17/g3/g48/g82/g79/g71/g3/g73/g79/g68/g86/g75/g3/g82/g85/g3/g83/g85/g82/g87/g85/g88/g86/g76/g82/g81/g86/g3/g86/g75/g68/g79/g79/g3/g81/g82/g87/g3/g72/g91/g70/g72/g72/g71/g3/g17/g19/g20/g19/g5/g3/g83/g72/g85/g3/g86/g76/g71/g72/g17 /g23/g17 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g76/g81/g74/g3/g68/g81/g71/g3/g87/g82/g79/g72/g85/g68/g81/g70/g76/g81/g74/g3/g83/g72/g85/g3/g36/g54/g48/g40/g3/g60/g20/g23/g17/g24/g48/g17 /g37/g54/g38/g29/g3/g37/g68/g86/g76/g70/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g17/g3/g55/g75/g72/g82/g85/g72/g87/g76/g70/g68/g79/g79/g92/g3/g72/g91/g68/g70/g87/g3/g89/g68/g79/g88/g72/g3/g86/g75/g82/g90/g81/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g86/g17 /g49/g82/g87/g72/g29/g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87/g3 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g56/g81/g76/g87/g86 /g44/g49/g38/g43/g40/g54 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g3/g47/g76/g80/g76/g87/g86 /g48/g44/g49 /g49/g50/g48 /g48/g36/g59 /g49/g88/g80/g69/g72/g85/g3/g82/g73/g3/g51/g76/g81/g86/g49 /g27 /g51/g76/g87/g70/g75 /g72 /g17/g20/g19/g19/g3/g37/g54/g38 /g55/g82/g83/g3/g87/g82/g3/g54/g72/g68/g87/g76/g81/g74/g3/g51/g79/g68/g81/g72/g36 /g177 /g177 /g17/g21/g20/g19 /g48/g82/g79/g71/g72/g71/g3/g51/g68/g70/g78/g68/g74/g72/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86/g36/g21 /g17/g20/g20/g24 /g17/g20/g22/g19 /g17/g20/g28/g24 /g37/g68/g86/g72/g3/g87/g82/g3/g54/g72/g68/g87/g76/g81/g74/g3/g51/g79/g68/g81/g72/g36/g20 /g17/g19/g20/g24/g177 /g177 /g54/g75/g82/g88/g79/g71/g72/g85/g3/g87/g82/g3/g54/g75/g82/g88/g79/g71/g72/g85/g3/g58/g76/g71/g87/g75/g40 /g17/g21/g28/g19 /g17/g22/g20/g19 /g17/g22/g21/g24 /g48/g82/g79/g71/g72/g71/g3/g51/g68/g70/g78/g68/g74/g72/g3/g58/g76/g71/g87/g75/g40/g20 /g17/g21/g23/g19 /g17/g21/g24/g19 /g17/g21/g27/g19 /g50/g89/g72/g85/g68/g79/g79/g3/g47/g72/g81/g74/g87/g75/g39 /g17/g22/g23/g27 /g17/g22/g25/g24 /g17/g23/g19/g19 /g55/g76/g83/g3/g87/g82/g3/g54/g72/g68/g87/g76/g81/g74/g3/g51/g79/g68/g81/g72/g47 /g17/g20/g20/g24 /g17/g20/g22/g19 /g17/g20/g24/g19 /g47/g72/g68/g71/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86/g70 /g17/g19/g19/g27 /g17/g19/g20/g19 /g17/g19/g20/g24 /g56/g83/g83/g72/g85/g3/g47/g72/g68/g71/g3/g58/g76/g71/g87/g75/g69/g20 /g17/g19/g23/g19 /g17/g19/g25/g19 /g17/g19/g26/g19 /g47/g82/g90/g72/g85/g3/g47/g72/g68/g71/g3/g58/g76/g71/g87/g75/g69 /g17/g19/g20/g23 /g17/g19/g20/g27 /g17/g19/g21/g21 /g50/g89/g72/g85/g68/g79/g79/g3/g53/g82/g90/g3/g54/g83/g68/g70/g76/g81/g74/g3/g3/g134/g72/g37 /g177 /g177 /g17/g23/g22/g19 N NOTE 1 D 12 3 A L b e E eB c /g48/g76/g70/g85/g82/g70/g75/g76/g83 /g55/g72/g70/g75/g81/g82/g79/g82/g74/g92 /g39/g85/g68/g90/g76/g81/g74 /g38/g19/g23/g16/g19/g20/g27/g37
DS21465C-page 12 2002-2011 Microchip Technology Inc. Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
2002-2011 Microchip Technology Inc. DS21465C-page 13 TC7660 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
DS21465C-page 14 2002-2011 Microchip Technology Inc. Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
2002-2011 Microchip Technology Inc. DS21465C-page 15 TC7660 /g27/g16/g47/g72/g68/g71/g3/g51/g79/g68/g86/g87/g76/g70/g3/g54/g80/g68/g79/g79/g3/g50/g88/g87/g79/g76/g81/g72/g3/g11/g50/g36/g12/g3/g177/g3/g49/g68/g85/g85/g82/g90/g15/g3/g22/g17/g28/g19/g3/g80/g80/g3/g37/g82/g71/g92/g3/g62/g54/g50/g44/g38/g64 /g49/g82/g87/g72/g29/g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87/g3 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74
DS21465C-page 16 2002-2012 Microchip Technology Inc. APPENDIX A: REVISION HISTORY Revision C (March 2012) The following is the list of modifications. 1. Updated Figure 5-5. 2. Added Appendix A. Revision B (March 2003) Undocumented changes. Revision A (May 2002) Original release of this document.
2002-2012 Microchip Technology Inc. DS21465C-page 17 TC7660 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office . PART NO. X /XX PackageTemperature Range Device Device: TC7660: DC-to-DC Voltage Converter Temperature Range: C = 0°C to +70°C E = -40°C to +85°C I = -25°C to +85°C (CERDIP only) M = -55°C to +125°C (CERDIP only) Package: PA = Plastic DIP, (300 mil body), 8-lead JA = Ceramic DIP, (300 mil body), 8-lead OA = SOIC (Narrow), 8-lead OA713 = SOIC (Narrow), 8-lead (Tape and Reel) Examples: a) TC7660COA: Commercial Temp., SOIC package. b) TC7660COA713:Tape and Reel, Commercial Temp., SOIC package. c) TC7660CPA: Commercial Temp., PDIP package. d) TC7660EOA: Extended Temp., SOIC package. e) TC7660EOA713:Tape and Reel, Extended Temp., SOIC package. f) TC7660EPA: Extended Temp., PDIP package. g) TC7660IJA: Industrial Temp., CERDIP package h) TC7660MJA: Military Temp., CERDIP package.
DS21465C-page 18 2002-2012 Microchip Technology Inc. NOTES:
2002-2012 Microchip Technology Inc. DS21465C-page 19 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY , PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002-2012, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-62076-089-5 Note the following details of the code protection feature on Microchip devices:
- Microchip products meet the specification cont ained in their particular Microchip Data Sheet.
- Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions.
- There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specif ications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
- Microchip is willing to work with the customer who is concerned about the integrity of their code.
- Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are co mmitted to continuously improvin g the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT S YSTEM CERTIFIED BY DNV == ISO/TS 16949 ==
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