TC7129CJL713

TC7129_06 MICROCHIP | Alldatasheet

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© 2006 Microchip Technology Inc. DS21459D-page 1 TC7129 Features:

• Count Resolution: ±19,999
• Resolution on 200 mV Scale: 10 μV
• True Differential Input and Reference
• Low Power Consumption: 500 μA at 9V
• Direct LCD Driver for 4-1/2 Digits, Decimal Points, Low Battery Indicator, and Continuity Indicator
• Overrange and Underrange Outputs
• Range Select Input: 10:1
• High Common Mode Rejection Ratio: 110 dB
• External Phase Compensation Not Required Applications:
• Full-Featured Multimeters
• Digital Measurement Devices Device Selection Table General Description: The TC7129 is a 4-1/2 digit Analog-to-Digital Converter (ADC) that directly drives a multiplexed Liquid Crystal Display (LCD). Fabricated in high-performance, low- power CMOS, the TC7129 ADC is designed specifi- cally for high-resolution, battery-powered digital multi- meter applications. The traditional dual-slope method of A/D conversion has been enhanced with a succes- sive integration technique to produce readings accu- rate to better than 0.005% of full-scale and resolution down to 10 μV per count. The TC7129 includes features important to multimeter applications. It detects and indicates low battery condi- tion. A continuity output drives an annunciator on the display and can be used with an external driver to sound an audible alarm. Overrange and underrange outputs, along with a range-change input, provide the ability to create auto-ranging instruments. For snapshot read- ings, the TC7129 includes a latch-and-hold input to freeze the present reading. This combination of features makes the TC7129 the ideal choice for full-featured multimeter and digital measurement applications. Typical Application Package Code Pin Layout Package Temperature Range TC7129CPL Normal 40-Pin PDIP 0°C to +70°C TC7129CKW Formed 44-Pin PQFP 0°C to +70°C TC7129CLW 44-Pin PLCC 0°C to +70°C TC7129 Low Battery Continuity 5 pF 120 kHz 10 pF 0.1 µF kΩ 0.1 µF 100 kΩ 1 µF 0.1 µF 150 kΩ 10 kΩ VIN *Note: RC network between pins 26 and 28 is not required. 330 kΩ 4-1/2 Digit Analog-to-Digital Converters with On-Chip LCD Drivers

© 2006 Microchip Technology Inc. Package Types TC7129CLW F1, E1, DP1 B2, C2, BATT A2, G2, D2 F2, E2, DP2 B3, C3, MINUS A3, G3, D3 F3, E3, DP3 B4, C4, BC5 A4, G4, D4 F4, E4, DP4 NC REF LO REF HI IN HI IN LO BUFF CREF- CREF+ COMMON CONTINUITY INT OUT NC A1, G1, D1 B1, C1, CONT ANNUNCIATOR OSC3 OSC1 NC OSC2 DP1 DP2 RANGE DGND BP3 BP2 BP1 VDISP DP4/OR NC DP3/UR LATCH/HOLD INT IN TC7129CKW A1, G1, D1 B1, C1, CONT ANNUNCIATOR OSC3 OSC1 NC OSC2 DP1 DP2 RANGE DGND REF LO REF HI IN HI IN LO BUFF CREF- CREF+ COMMON CONTINUITY INT OUT NC F1, E1, DP1 B2, C2, BATT A2, G2, D2 F2, E2, DP2 B3, C3, MINUS A3, G3, D3 F3, E3, DP3 B4, C4, BC5 A4, G4, D4 F4, E4, DP4 NC BP3 BP2 BP1 VDISP DP4/OR NC DP3/UR LATCH/HOLD INT IN TC7129CPL 40-Pin PDIP 44-Pin QFP 44-Pin PLCC OSC2 DP1 DP2 RANGE DGND REF LO REF HI IN HI IN LO BUFF CREF- CREF+ COMMON CONTINUITY INT OUT INT IN DP3/UR OSC1 OSC3 ANNUNICATOR B1, C1, CONT A1, G1, D1 F1, E1, DP1 B2, C2, LO BATT A2, G2, D2 F2, E2, DP2 B3, C3, MINUS A3, G3, D3 F3, E3, DP3 B4, C4, BC5 A4, G4, D4 F4, E4, DP4 BP3 BP2 BP1 VDISP DP4/OR Display Output Lines LATCH/HOLD

© 2006 Microchip Technology Inc. DS21459D-page 3 TC7129 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings* Digital Input (Pins 1, 2, 19, 20, Package Power Dissipation (TA ≤ 70°C) *Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. TC7129 ELECTRICAL SPECIFICATIONS Electrical Characteristics: V+ to V– = 9V, VREF = 1V, TA = +25°C, fCLK = 120 kHz, unless otherwise indicated. Pin numbers refer to 40-pin DIP. Symbol Parameter Min Typ Max Unit Test Conditions Input Zero Input Reading –0000 0000 +0000 Counts VIN = 0V, 200 mV scale Zero Reading Drift ±0.5 μV/°C VIN = 0V, 0°C < TA < +70°C Ratiometric Reading 9996 10000 Counts VIN = VREF = 1000 mV, Range = 2V Range Change Accuracy 0.9999 1.0000 1.0001 Ratio VIN = 1V on High Range, VIN = 0.1V on Low Range RE Rollover Error Counts VIN– = VIN+ = 199 mV NL Linearity Error Counts 200mV Scale CMRR Common Mode Rejection Ratio 110 dB VCM = 1V, VIN = 0V, 200 mV scale CMVR Common Mode Voltage Range (V-) + 1.5 V VIN = 0V (V+) – 1 V 200 mV scale eN Noise (Peak-to-Peak Value not Exceeded 95% of Time) μVP-P VIN = 0V 200 mV scale IIN Input Leakage Current pA VIN = 0V, pins 32, 33 Scale Factor Temperature Coefficient ppm/°C VIN = 199 mV, 0°C < TA < +70°C External VREF = 0 ppm/°C Note 1: Input voltages may exceed supply voltages, provided input current is limited to ±400 μA. Currents above this value may result in invalid display readings, but will not destroy the device if limited to ±1 mA. Dissipation ratings assume device is mounted with all leads soldered to printed circuit board.

© 2006 Microchip Technology Inc. Power VCOM Common Voltage 2.8 3.2 3.5 V V+ to pin 28 Common Sink Current 0.6 mA ΔCommon = +0.1V Common Source Current μA ΔCommon = -0.1V DGND Digital Ground Voltage 4.5 5.3 5.8 V V+ to pin 36, V+ to V– = 9V Sink Current 1.2 mA ΔDGND = +0.5V Supply Voltage Range V V+ to V– IS Supply Current Excluding Common Current 0.8 1.3 mA V+ to V– = 9V fCLK Clock Frequency 120 360 kHz VDISP Resistance kΩ VDISP to V+ Low Battery Flag Activation Voltage 6.3 7.2 7.7 V V+ to V– Digital Continuity Comparator Threshold Voltages 100 200 mV VOUT pin 27 = High 200 400 mV VOUT pin 27 = Low Pull-down Current μA Pins 37, 38, 39 “Weak Output” Current Sink/Source μA Pins 20, 21 sink/source μA Pin 27 sink/source Pin 22 Source Current μA Pin 22 Sink Current μA TC7129 ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: V+ to V– = 9V, VREF = 1V, TA = +25°C, fCLK = 120 kHz, unless otherwise indicated. Pin numbers refer to 40-pin DIP. Symbol Parameter Min Typ Max Unit Test Conditions Note 1: Input voltages may exceed supply voltages, provided input current is limited to ±400 μA. Currents above this value may result in invalid display readings, but will not destroy the device if limited to ±1 mA. Dissipation ratings assume device is mounted with all leads soldered to printed circuit board.

© 2006 Microchip Technology Inc. DS21459D-page 5 TC7129 2.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Pin No. 40-Pin PDIP Pin No. 44-Pin PQFP Pin No. 44-Pin PLCC Symbol Function OSC1 Input to first clock inverter. OSC3 Output of second clock inverter. ANNUNCIATOR Backplane square wave output for driving annunciators. B1, C1, CONT Output to display segments. A1, G1, D1 Output to display segments. F1, E1, DP1 Output to display segments. B2, C2, LO BATT Output to display segments. A2, G2, D2 Output to display segments. F2, E2, DP2 Output to display segments. B3, C3, MINUS Output to display segments. A3, G3, D3 Output to display segments. F3, E3, DP3 Output to display segments. B4, C4, BC5 Output to display segments. A4, D4, G4 Output to display segments. F4, E4, DP4 Output to display segments. BP3 Backplane #3 output to display. BP2 Backplane #2 output to display. BP1 Backplane #1 output to display. VDISP Negative rail for display drivers. DP4/OR Input: When high, turns on most significant decimal point. Output: Pulled high when result count exceeds ±19,999. DP3/UR Input: Second-most significant decimal point on when high. Output: Pulled high when result count is less than ±1000. LATCH/HOLD Input: When floating, ADC operates in Free Run mode. When pulled high, the last displayed reading is held. When pulled low, the result counter contents are shown incrementing during the de-integrate phase of cycle. Output: Negative going edge occurs when the data latches are updated. Can be used for converter status signal. Negative power supply terminal. Positive power supply terminal and positive rail for display drivers. INT IN Input to integrator amplifier. INT OUT Output of integrator amplifier. CONTINUITY Input: When low, continuity flag on the display is off. When high, continuity flag is on. Output: High when voltage between inputs is less than +200 mV. Low when voltage between inputs is more than +200 mV. COMMON Sets common mode voltage of 3.2V below V+ for DE, 10X, etc. Can be used as pre-regulator for external reference. CREF+ Positive side of external reference capacitor. CREF– Negative side of external reference capacitor. BUFFER Output of buffer amplifier. IN LO Negative input voltage terminal. IN HI Positive input voltage terminal. REF HI Positive reference voltage. REF LO Negative reference voltage

© 2006 Microchip Technology Inc. DGND Internal ground reference for digital section. See Section 4.2.1 “±5V Power Supply”. RANGE 3 μA pull-down for 200 mV scale. Pulled high externally for 2V scale. DP2 Internal 3 μA pull-down. When high, decimal point 2 will be on. DP1 Internal 3 μA pull-down. When high, decimal point 1 will be on. OSC2 Output of first clock inverter. Input of second clock inverter. 6,17, 28, 39 12, 23, 34, 1 NC No connection. TABLE 2-1: PIN FUNCTION TABLE (CONTINUED) Pin No. 40-Pin PDIP Pin No. 44-Pin PQFP Pin No. 44-Pin PLCC Symbol Function

© 2006 Microchip Technology Inc. DS21459D-page 7 TC7129 3.0 DETAILED DESCRIPTION (All pin designations refer to 40-pin PDIP.) The TC7129 is designed to be the heart of a high- resolution analog measurement instrument. The only additional components required are a few passive elements: a voltage reference, a LCD and a power source. Most component values are not critical; substitutes can be chosen based on the information given below. The basic circuit for a digital multimeter application is shown in Figure 3-1. See Section 4.0 “Typical Appli- cations”, for variations. Typical values for each component are shown. The sections below give component selection criteria. 3.1 Oscillator (XOSC, CO1, CO2, RO) The primary criterion for selecting the crystal oscillator is to choose a frequency that achieves maximum rejec- tion of line frequency noise. To do this, the integration phase should last an integral number of line cycles. The integration phase of the TC7129 is 10,000 clock cycles on the 200 mV range and 1000 clock cycles on the 2V range. One clock cycle is equal to two oscillator cycles. For 60 Hz rejection, the oscillator frequency should be chosen so that the period of one line cycle equals the integration time for the 2V range. EQUATION 3-1: This equation gives an oscillator frequency of 120 kHz. A similar calculation gives an optimum frequency of 100 kHz for 50 Hz rejection. The resistor and capacitor values are not critical; those shown work for most applications. In some situations, the capacitor values may have to be adjusted to compensate for parasitic capacitance in the circuit. The capacitors can be low-cost ceramic devices. Some applications can use a simple RC network instead of a crystal oscillator. The RC oscillator has more potential for jitter, especially in the least significant digit. See Section 4.5 “RC Oscillator”. 3.2 Integrating Resistor (RINT) The integrating resistor sets the charging current for the integrating capacitor. Choose a value that provides a current between 5 μA and 20 μA at 2V, the maximum full-scale input. The typical value chosen gives a charging current of 13.3 μA: EQUATION 3-1: Too high a value for RINT increases the sensitivity to noise pickup and increases errors due to leakage current. Too low a value degrades the linearity of the integration, leading to inaccurate readings. 1/60 second = 16.7 msec = 1000 clock cycles *2 OSC cycles/clock cycle OSC Frequency ICHARGE = 150 kΩ 13.3 µA

© 2006 Microchip Technology Inc. Figure 3-1: Standard Circuit. 3.3 Integrating Capacitor (CINT) The charge stored in the integrating capacitor during the integrate phase is directly proportional to the input voltage. The primary selection criterion for CINT is to choose a value that gives the highest voltage swing while remaining within the high-linearity portion of the integrator output range. An integrator swing of 2V is the recommended value. The capacitor value can be calculated using the following equation: EQUATION 3-1: Using the values derived above (assuming 60 Hz operation), the equation becomes: EQUATION 3-2: The capacitor should have low dielectric absorption to ensure good integration linearity. Polypropylene and Teflon® capacitors are usually suitable. A good measurement of the dielectric absorption is to connect the reference capacitor across the inputs by connecting: Pin-to-Pin: 20 → 33 (CREF+ to IN HI) 30 → 32 (CREF– to IN LO) A reading between 10,000 and 9998 is acceptable; anything lower indicates unacceptably high dielectric absorption. 3.4 Reference Capacitor (CREF) The reference capacitor stores the reference voltage during several phases of the measurement cycle. Low leakage is the primary selection criterion for this com- ponent. The value must be high enough to offset the effect of stray capacitance at the capacitor terminals. A value of at least 1 μF is recommended. Low Battery Continuity 5 pF 120 kHz 10 pF 0.1 µF kΩ 0.1 µF 100 kΩ CINT 0.1 µF VIN 330 kΩ Crystal RO CO2 CRF DREF RREF CIF RIF CREF+ 1 µF 10 kΩ RBIAS 150 kΩ RINT OSC1 OSC3 ANNUNC VDISP DP4 /OR Display Drive Outputs DP3 /UR LATCH/ HOLD INT IN INT OUT CONTINUITY COMMON CREF+ CREF– BUFF IN LO IN HI REF HI REF LO DGND RANGE DP2 DP1 OSC2 TC7129 CO1 CINT = tINT x IINT VSWING Where tINT is the integration time. CINT = = 0.1 μA 16.7 msec x 13.3 μA

© 2006 Microchip Technology Inc. DS21459D-page 13 TC7129 4.8 Successive Integration The successive integration technique picks up where dual-slope conversion ends. The overshoot voltage shown in Figure 4-9 (called the “integrator residue voltage”) is measured to obtain a correction to the initial count. Figure 4-10 shows the cycles in a successive integration measurement. The waveform shown is for a negative input signal. The sequence of events during the measurement cycle is shown in Table 4-1. TABLE 4-1: MEASUREMENT CYCLE SEQUENCE 4.9 Digital Auto-Zeroing To eliminate the effect of amplifier offset errors, the TC7129 uses a digital auto-zeroing technique. After the input voltage is measured as described above, the measurement is repeated with the inputs shorted internally. The reading with inputs shorted is a measurement of the internal errors and is subtracted from the previous reading to obtain a corrected measurement. Digital auto-zeroing eliminates the need for an external auto-zeroing capacitor used in other ADCs. 4.10 Inside the TC7129 Figure 4-11 shows a simplified block diagram of the TC7129. Phase

Description

Input signal is integrated for fixed time (1000 clock cycles on 2V scale, 10,000 on 200 mV). DE1 Integrator voltage is ramped to zero. Counter counts up until zero-crossing to produce reading accurate to 3-1/2 digits. Residue represents an overshoot of the actual input voltage. REST Rest; circuit settles. X10 Residue voltage is amplified 10 times and inverted. DE2 Integrator voltage is ramped to zero. Counter counts down until zero-crossing to correct reading to 4-1/2 digits. Residue represents an undershoot of the actual input voltage. REST Rest; circuit settles. X10 Residue voltage is amplified 10 times and inverted. DE3 Integrator voltage is ramped to zero. Counter counts up until zero-crossing to correct reading to 5-1/2 digits. Residue is discarded.

© 2006 Microchip Technology Inc. Figure 4-15: Digital Ground (DGND) and Common Outputs. 4.14 Low Battery The low battery annunciator turns on when supply volt- age between V– and V+ drops below 6.8V. The internal zener diode has a threshold of 6.3V. When the supply voltage drops below 6.8V, the transistor tied to V– turns off pulling the “Low Battery” point high. 4.15 Sequence and Results Counter A sequence counter and associated control logic pro- vide signals that operate the analog switches in the integrator section. The comparator output from the inte- grator gates the results counter. The results counter is a six-section up/down decade counter that holds the intermediate results from each successive integration. 4.16 Overrange and Underrange Outputs When the results counter holds a value greater than ±19,999, the DP4/OR output (Pin 20) is driven high. When the results counter value is less than ±1000, the DP3/UR output (Pin 21) is driven high. Both signals are valid on the falling edge of LATCH/HOLD (L/H) and do not change until the end of the next conversion cycle. The signals are updated at the end of each conversion, unless the L/H input (Pin 22) is held high. Pins 20 and 21 can also be used as inputs for external control of decimal points 3 and 4. Figure 4-14 shows a schematic of the input/output nature of these pins. 4.17 LATCH/Hold The L/H output goes low during the last 100 cycles of each conversion. This pulse latches the conversion data into the display driver section of the TC7129. This pin can also be used as an input. When driven high, the display will not be updated; the previous reading is displayed. When driven low, the display reading is not latched; the sequence counter reading will be displayed. Since the counter is counting much faster than the backplanes are being updated, the reading shown in this mode is somewhat erratic. 4.18 Display Driver The TC7129 drives a triplexed LCD with three back- planes. The LCD can include decimal points, polarity sign and annunciators for continuity and low battery. Figure 4-16 shows the assignment of the display segments to the backplanes and segment drive lines. The backplane drive frequency is obtained by dividing the oscillator frequency by 1200. This results in a back- plane drive frequency of 100 Hz for 60 Hz operation (120 kHz crystal) and 83.3 Hz for 50 Hz operation (100 kHz crystal). Backplane waveforms are shown in Figure 4-17. These appear on outputs BP1, BP2, BP3 (pins 16, 17 and 18). They remain the same, regardless of the segments being driven. Other display output lines (pins 4 through 15) have waveforms that vary depending on the displayed values. Figure 4-18 shows a set of waveforms for the A, G, D outputs (pins 5, 8, 11 and 14) for several combinations of “ON” segments. The ANNUNCIATOR DRIVE output (pin 3) is a square wave, running at the backplane frequency (100 Hz or

83.3 Hz) with a peak-to-peak voltage equal to DGND

voltage. Connecting an annunciator to pin 3 turns it on; connecting it to its backplane turns it off. 12 µA P TC7129 Logic Section 3.2V N N COM DGND

© 2006 Microchip Technology Inc. 5.0 PACKAGING INFORMATION 5.1 Package Marking Information Package marking data not available a this time. 5.2 Taping Forms User Direction of Feed P, Pitch S tandard R eel Component Orientation R everse R eel Component Orientation W, Width of Carrier Tape Pin 1 Pin 1 Component Taping Orientation for 44-Pin PQFP Devices User Direction of Feed Pin 1 Standard Reel Component Orientation for 713 Suffix Device W P Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 44-Pin PQFP 24 mm 16 mm 500 13 in Carrier Tape, Number of Components Per Reel and Reel Size Note: Drawing does not represent total number of pins.

© 2006 Microchip Technology Inc. DS21459D-page 19 TC7129 40-Lead Plastic Dual In-line (P) – 600 mil Body (PDIP) β Mold Draft Angle Bottom α Mold Draft Angle Top 17.27 16.51 15.75 .680 .650 .620 eB Overall Row Spacing 0.56 0.46 0.36 .022 .018 .014 B Lower Lead Width 1.78 1.27 0.76 .070 .050 .030 Upper Lead Width 0.38 0.29 0.20 .015 .012 .008 c Lead Thickness 3.43 3.30 3.05 .135 .130 .120 L Tip to Seating Plane 52.45 52.26 51.94 2.065 2.058 2.045 D Overall Length 14.22 13.84 13.46 .560 .545 .530 Molded Package Width 15.88 15.24 15.11 .625 .600 .595 E Shoulder to Shoulder Width 0.38 .015 Base to Seating Plane 4.06 3.81 3.56 .160 .150 .140 Molded Package Thickness 4.83 4.45 4.06 .190 .175 .160 A Top to Seating Plane 2.54 .100 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS INCHES* Units D n c β eB E α p L B A * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-011 Drawing No. C04-016 § Significant Characteristic

© 2006 Microchip Technology Inc. 44-Lead Plastic Leaded Chip Carrier (LW) – Square (PLCC) CH2 x 45° CH1 x 45° β Mold Draft Angle Bottom α Mold Draft Angle Top 0.53 0.51 0.33 .021 .020 .013 B 0.81 0.74 0.66 .032 .029 .026 Upper Lead Width 0.33 0.27 0.20 .013 .011 .008 c Lead Thickness Pins per Side 16.00 15.75 14.99 .630 .620 .590 Footprint Length 16.00 15.75 14.99 .630 .620 .590 Footprint Width 16.66 16.59 16.51 .656 .653 .650 Molded Package Length 16.66 16.59 16.51 .656 .653 .650 Molded Package Width 17.65 17.53 17.40 .695 .690 .685 D Overall Length 17.65 17.53 17.40 .695 .690 .685 E Overall Width 0.25 0.13 0.00 .010 .005 .000 CH2 Corner Chamfer (others) 1.27 1.14 1.02 .050 .045 .040 CH1 Corner Chamfer 1 0.86 0.74 0.61 .034 .029 .024 Side 1 Chamfer Height 0.51 .020 Standoff Molded Package Thickness 4.57 4.39 4.19 .180 .173 .165 A Overall Height 1.27 .050 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS INCHES* Units β c D n #leads=n1 E α p A 35° B .145 .153 .160 3.68 3.87 4.06 .028 .035 0.71 0.89 Lower Lead Width * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-047 Drawing No. C04-048 § Significant Characteristic

© 2006 Microchip Technology Inc. DS21459D-page 21 TC7129 44-Lead Plastic Quad Flatpack (KW) 10x10x2.0 mm Body, 1.95/0.25 mm Lead Form (PQFP) CHAMFER VARIES D E p c B n L F A α β φ 1.95 REF. .077 REF. F Footprint Units INCHES MILLIMETERS* Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n Pitch p .031 BSC

0.80 BSC

A .096 2.45 Molded Package Thickness .077 .079 .083 1.95 2.00 2.10 Standoff § .010 0.25 Foot Length L .029 .035 .041 0.73 0.88 1.03 Foot Angle φ 3.5° 3.5° Overall Width E .547 BSC

13.90 BSC

D .547 BSC .394 BSC

10.00 BSC

.394 BSC c .004 .009 0.11 0.23 Lead Width B .012 .018 0.30 0.45 Mold Draft Angle Top α 16° 16° Mold Draft Angle Bottom β 16° 16° Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. Notes: JEDEC Equivalent: MO-112 AA-1 Revised 07-21-05 * Controlling Parameter § Significant Characteristic BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M See ASME Y14.5M Drawing No. C04-119

© 2006 Microchip Technology Inc. NOTES:

© 2006 Microchip Technology Inc. DS21459D-page 23 TC7129 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Device: TC7129: 4-1/2 Digit Analog-to-Digital Converter Temperature: C = 0°C to +70°C I = -25°C to +85°C Package: PL = 40-Pin PDIP KW = 40-Pin PQFP LW = 44-Pin PLCC JL = 40-Pin CDIP Taping Direction: 713 = Standard Taping PART NO. XX Pkg Device X Temp. XX Taping Direction Examples: TC7129CPL: 40-Pin PDIP TC7129CKW713: 44-Pin PQFP Tape and Reel TC7129CLW: 44-Pin PLCC

© 2006 Microchip Technology Inc. NOTES:

© 2006 Microchip Technology Inc. DS21459D-page 25 TC7129 THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information:

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© 2006 Microchip Technology Inc. READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod- uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: Technical Publications Manager RE: Reader Response From: Name Company Address City / State / ZIP / Country Application (optional): Would you like a reply? Y N Device: Literature Number: Questions: DS21459D TC7129 What are the best features of this document? How does this document meet your hardware and software development needs? Do you find the organization of this document easy to follow? If not, why? What additions to the document do you think would enhance the structure and subject? What deletions from the document could be made without affecting the overall usefulness? Is there any incorrect or misleading information (what and where)? How would you improve this document?

© 2006 Microchip Technology Inc. DS21459D-page 27 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Note the following details of the code protection feature on Microchip devices: Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.

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