TC7116 MICROCHIP | Alldatasheet
Document overview
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Technical content
Features
- Low Temperature Drift Internal Reference - TC7116/TC7117 80 ppm/°C Typ. - TC7116A/TC7117A 20 ppm/°C Typ. Display Hold Function Directly Drives LCD or LED Display Zero Reading with Zero Input Low Noise for Stable Display - 2V or 200mV Full Scale Range (FSR) Auto-Zero Cycle Eliminates Need for Zero Adjustment Potentiometer True Polarity Indication for Precision Null
Applications
Convenient 9V Battery Operation: (TC7116/TC7116A) High Impedance CMOS Differential Inputs: 10 12Ω Low Power Operation: 10mW Thermometry Bridge Readouts: Strain Gauges, Load Cells, Null Detectors Digital Meters: Voltage/Current/Ohms/Power, pH Digital Scales, Process Monitors Portable Instrumentation Device Selection Table General Description The TC7116A/TC7117A are 3-1/2 digit CMOS analog- to-digital converters (ADCs) containing all the active components necessary to construct a 0.05% resolution measurement system. Seven-segment decoders, polarity and digit drivers, voltage reference, and clock circuit are integrated on-chip. The TC7116A drives liq- uid crystal displays (LCDs) and includes a backplane driver. The TC7117A drives common anode light emit- ting diode (LED) displays directly with an 8mA drive current per segment. These devices incorporate a display hold (HLDR) func- tion. The displayed reading remains indefinitely, as long as HLDR is held high. Conversions continue, but output data display latches are not updated. The refer- ence low input (V REF-) is not available, as it is with the TC7106/7107. V REF-i st i e di n t e r n a l l yt oa n a l o gc o m - mon in the TC7116A/7117A devices. The TC7116A/7117A reduces linearity error to less than 1 count. Rollover error (the difference in readings for equal magnitude but opposite polarity input signals) is below ±1 count. High-impedance differential inputs offer 1pA leakage current and a 10 12Ω input imped- ance. The 15µVP-P noise performance enables a “rock solid” reading. The auto-zero cycle ensures a zero dis- play reading with a 0V input. The TC7116A and TC7117A feature a precision, low drift internal reference, and are functionally identical to the TC7116/TC7117. A low drift external reference is not normally required with the TC7116A/TC7117A. Package Code Package Temperature Range CPL 40-Pin PDIP 0 °Ct o+ 7 0°C IJL 40-Pin CERDIP -25 °Ct o+ 8 5°C CKW 44-Pin PQFP 0 °Ct o+ 7 0°C CLW 44-Pin PLCC 0 °Ct o+ 7 0°C 3-1/2 Digit Analog-to-Digital Converters with Hold
DS21457B-page 2 2002 Microchip Technology Inc. Package Type BP/ GND COMMON 18 19 20 21 23 24 AB4 POL NC VIN+ NC VIN-B2 6543 1 4 4 2 OSC1 43OSC2 42OSC3 41TEST 40VREF+ 25 26 27 28
3214 CAZ
3115 VBUFF
3016 VINTE2
(Minus Sign) (Minus Sign) 10's 100's 1000's (TC7116/7117) (TC7116A/TC7117A) (TC7116/7117) (TC7116A/TC7117A) 100's OSC2 OSC3 CREF+ CREF- VIN+ VIN- VBUFF VINT BP/GNDPOL 1's HLDR TC7116IJL TC7116AIJL TC7117IJL TC7117AIJL OSC1 TEST VREF+ COMMON CAZ HLDR AB4 10's 100's 1000's 100's OSC2 OSC3 CREF+ CREF- VIN+ VIN- VBUFF VINT BP/GNDPOL 1's Note 1: NC = No internal connection. 2: Pins 9, 25, 40 and 56 are connected to the die substrate. The potential at these pins is approximately V+. No external connections should be made.
2002 Microchip Technology Inc. DS21457B-page 3 TC7116/A/TC7117/A Typical Application VREF+ TC7116/A 9VVREF 3334 24kΩ 1kΩ 39 38 40 0.47µF 0.1µF OSC1OSC3OSC2 To Analog Common (Pin 32)
3 Conversions Per Second
100kΩ 47kΩ 0.22µF 0.01µFAnalog Input CREF-CREF+ VIN+ VIN- ANALOG COMMON VINT VBUFF CAZ Segment Drive 2–19 22–25 POL BP/GND Minus Sign Backplane Drive ROSC 100pF LCD Display (TC7116/7116A) or Common Anode LED Display (TC7117/7117A) 1MΩ HLDR Display Hold 100mV TC7117/A
DS21457B-page 4 2002 Microchip Technology Inc.
1.0 ELECTRICAL
Absolute Maximum Ratings* Supply Voltage: Analog Input Voltage (Either Input) (Note 1) ... V+ to V- Clock Input: Package Power Dissipation; T A ≤ 70°C (Note 2) Operating Temperature: *Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. TC7116/A AND TC7117/A ELECTRICAL SPECIFICATIONS fCLOCK = 48kHz. Parts are tested in the circuit of the Typical Operating Circuit. Symbol Parameter Min Typ Max Unit Test Conditions ZIR Zero Input Reading — ±0 — Digital Reading VIN =0 V Full Scale = 200mV Ratiometric Reading 999 999/1000 1000 Digital Reading VIN =V REF VREF =1 0 0 m V R/O Rollover Error (Difference in Reading for Equal Positive and Negative Readings Near Full Scale) -1 ±0.2 +1 Counts V IN-=+V IN+ ≅ 200mV or ≈ 2V Linearity (Maximum Deviation from Best Straight Line Fit) -1 ±0.2 +1 Counts Full Scale = 200mV or 2V CMRR Common Mode Rejection Ratio (Note 3) —5 0 — µV/V V CM =± 1 V ,VIN =0 V Full Scale = 200mV eN Noise (Peak to Peak 95% of Time) — 15 — µVV IN =0 V Full Scale = 200mV IL Leakage Current at Input — 1 10 pA V IN =0 V Zero Reading Drift — 0.2 1 µV/°C V IN =0 V “C” Device = 0°C to +70°C —1 . 0 2 µV / ° C “ I ”D e v i c e=- 2 5 ° Ct o+ 8 5 ° C Note 1: Input voltages may exceed the supply voltages provided the input current is limited to ±100 µA. 2: Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. 3: Refer to “Differential Input” discussion. 4: Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. 5: The TC7116/TC7116A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to TEST, Pin 37. The TC7117/TC7117A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to GND, Pin 21.
2002 Microchip Technology Inc. DS21457B-page 5 TC7116/A/TC7117/A TCSF Scale Factor T emperature Coefficient — 1 5 ppm/°C V IN =1 9 9 m V , “C” Device = 0°C to +70°C (Ext. Ref = 0ppm°C) — — 20 ppm/°C “I” Device = -25°C to +85°C Input Resistance, Pin 1 30 70 — k Ω (Note 5) VIL, Pin 1 — — Test + 1.5 V TC7116/A Only VIL, Pin 1 — — GND + 1.5 V TC7117/A Only VIH, Pin 1 V + - 1.5 — — V Both IDD Supply Current (Does not Include LED Current for TC7117/A) —0 . 8 1 . 8 m A V IN =0 V VC Analog Common Voltage (with Respect to Positive Supply) 2.4 3.05 3.35 V 25k Ω Between Common and Positive Supply VCTC Temperature Coefficient of Analog Common (with Respect to Positive Supply) ppm/°C ppm/°C “C” Device: 0°C to +70°C TC7116A/TC7117A TC7116/TC7117 VSD TC7116/TC7117A ONLY Peak to Peak Segment Drive Voltage 45 6 V V + t o V - = 9 V (Note 4) VBD TC7116A/TC7116A ONLY Peak to Peak Backplane Drive Voltage 45 6 V V + t o V - = 9 V (Note 4) TC7117/TC7117A ONLY Segment Sinking Current (Except Pin 19) 5 8 — m A V +=5 . 0 V Segment Voltage = 3V TC7117/TC7117A ONLY Segment Sinking Current (Pin 19 Only) 1 0 1 6 — m A V +=5 . 0 V Segment Voltage = 3V TC7116/A AND TC7117/A ELECTRICAL SPECIFICATIONS (CONTINUED) fCLOCK = 48kHz. Parts are tested in the circuit of the Typical Operating Circuit. Symbol Parameter Min Typ Max Unit Test Conditions Note 1: Input voltages may exceed the supply voltages provided the input current is limited to ±100 µA. 2: Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. 3: Refer to “Differential Input” discussion. 4: Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. 5: The TC7116/TC7116A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to TEST, Pin 37. The TC7117/TC7117A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to GND, Pin 21.
DS21457B-page 6 2002 Microchip Technology Inc.
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Pin Number (40-Pin PDIP) (40-Pin CERDIP) Pin Number (44-Pin PQFP) Symbol Description 1 8 HLDR Hold pin, Logic 1 holds present display reading. 29 D 1 Activates the D section of the units display. 31 0 C 1 Activates the C section of the units display. 41 1 B 1 Activates the B section of the units display. 51 2 A 1 Activates the A section of the units display. 61 3 F 1 Activates the F section of the units display. 71 4 G 1 Activates the G section of the units display. 81 5 E 1 Activates the E section of the units display. 91 6 D 2 Activates the D section of the tens display. 10 17 C 2 Activates the C section of the tens display. 11 18 B 2 Activates the B section of the tens display. 12 19 A 2 Activates the A section of the tens display. 13 20 F 2 Activates the F section of the tens display. 14 21 E 2 Activates the E section of the tens display. 15 22 D 3 Activates the D section of the hundreds display. 16 23 B 3 Activates the B section of the hundreds display. 17 24 F 3 Activates the F section of the hundreds display. 18 25 E 3 Activates the E section of the hundreds display. 19 26 AB 4 Activates both halves of the 1 in the thousands display. 20 27 POL Activates the negative polarity display. 21 28 BP/ GND LCD backplane drive output (TC7116/TC7116A). Digital ground (TC7117/TC7117A). 22 29 G 3 Activates the G section of the hundreds display. 23 30 A 3 Activates the A section of the hundreds display. 24 31 C 3 Activates the C section of the hundreds display. 25 32 G 2 Activates the G section of the tens display. 26 34 V- Negative power supply voltage. 27 35 V INT Integrator output. Connection point for integration capacitor. See Section 4.3, Integrating Capacitor for more details. 28 36 V BUFF Integration resistor connection. Use a 47kΩ resistor for a 200mV full scale range and a 470kΩ resistor for 2V full scale range. 29 37 C AZ The size of the auto-zero capacitor influences system noise. Use a 0.47 µF capacitor for 200mV full scale, and a 0.047 µF capacitor for 2V full scale. See Section 4.1, Auto-Zero Capacitor for more details. 30 38 V IN- The analog LOW input is connected to this pin. 31 39 V IN+ The analog HIGH input signal is connected to this pin. 32 40 COMMON This pin is primarily used to set the Analog Common mode voltage for battery operation, or in systems where the input signal is referenced to the power supply. It also acts as a reference voltage source. See Section 3.1.6, Analog Common for more details. 33 41 C REF-S e e P i n 3 4 . 34 42 C REF+A 0 . 1 µF capacitor is used in most applications. If a large Common mode voltage exists (for example, the VIN- pin is not at analog common), and a 200mV scale is used, a 1µF capacitor is recommended and will hold the rollover error to 0.5 count.
2002 Microchip Technology Inc. DS21457B-page 7 TC7116/A/TC7117/A
3.0 DETAILED DESCRIPTION
(All Pin Designations Refer to 40-Pin PDIP .)
3.1 Analog Section
Figure 3-1 shows the block diagram of the analog sec- tion for the TC7116/TC7116A and TC7117/TC7117A. Each measurement cycle is divided into three phases: (1) Auto-Zero (AZ), (2) Signal Integrate (INT), and (3) Reference Integrate (REF), or De-integrate (DE).
3.1.1 AUTO-ZERO PHASE
High and low inputs are disconnected from the pins and internally shorted to analog common. The reference capacitor is charged to the reference voltage. A feed- back loop is closed around the system to charge the auto-zero capacitor (C AZ) to compensate for offset volt- ages in the buffer amplifier, integrator, and comparator. Since the comparator is included in the loop, AZ accu- racy is limited only by system noise. The offset referred to the input is less than 10 µV.
3.1.2 SIGNAL INTEGRATE PHASE
The auto-zero loop is opened, the internal short is removed, and the internal high and low inputs are con- nected to the external pins. The converter then inte- grates the differential voltages between V IN+ and VIN- for a fixed time. This differential voltage can be within a wide Common mode range: 1V of either supply. How- ever, if the input signal has no return with respect to the converter power supply, V IN- can be tied to analog common to establish the correct Common mode volt- age. At the end of this phase, the polarity of the integrated signal is determined . 35 43 V+ Positive Power Supply Voltage. 36 44 V REF+ The analog input required to generate a full scale output (1999 counts). Place 100mV between Pins 32 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for 2V full scale. See Section 4.6, Reference Voltage. 37 3 TEST Lamp test. When pulled HIGH (to V+), all segments will be turned on and the dis- play should read -1888. It may also be used as a negative supply for externally generated decimal points. See Section 3.1.7, TEST for additional information. 38 4 OSC3 See Pin 40. 39 6 OSC2 See Pin 40. 40 7 OSC1 Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock (3 readings per section), connect Pin 40 to the junction of a 100k Ω resistor and a 100pF capaci- tor. The 100kΩ resistor is tied to Pin 39 and the 100pF capacitor is tied to Pin 38. TABLE 2-1: PIN FUNCTION TABLE (CONTINUED) Pin Number (40-Pin PDIP) (40-Pin CERDIP) Pin Number (44-Pin PQFP) Symbol Description
DS21457B-page 8 2002 Microchip Technology Inc. FIGURE 3-1: ANALOG SECTION OF TC7116/TC7117A AND TC7117/TC7117A
3.1.3 REFERENCE INTEGRATE PHASE
The final phase is reference integrate, or de-integrate. Input low is internally connected to analog common and input high is connected across the previously charged reference capacitor. Circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. The time required for the output to return to zero is proportional to the input signal. The digital reading displayed is: EQUATION 3-1:
3.1.4 REFERENCE
The positive reference voltage (V REF+) is referred to analog common.
3.1.5 DIFFERENTIAL INPUT
This input can accept differential voltages anywhere within the Common mode range of the input amplifier or, specifically, from 1V below the positive supply to 1V above the negative supply. In this range, the system has a CMRR of 86dB, typical. However, since the inte- grator also swings with the Common mode voltage, care must be exercised to ensure that the integrator output does not saturate. A worst case condition would be a large, positive Common mode voltage with a near full scale negative differential input voltage. The nega- tive input signal drives the integrator positive, when most of its swing has been used up by the positive Common mode voltage. For these critical applications, the integrator swing can be reduced to less than the recommended 2V full scale swing with little loss of accuracy. The integrator output can swing within 0.3V of either supply without loss of linearity.
3.1.6 ANALOG COMMON
This pin is included primarily to set the Common mode voltage for battery operation (TC7116/TC7116A), or for any system where the input signals are floating, with respect to the power supply. The analog common pin sets a voltage approximately 2.8V more negative than the positive supply. This is selected to give a minimum end of life battery voltage of about 6V. However, analog common has some attributes of a reference voltage. When the total supply voltage is large enough to cause the zener to regulate (>7V), the analog common volt- age will have a low voltage coefficient (0.001%), low output impedance ( ≅15Ω), and a temperature coeffi- cient of less than 20ppm/°C, typically, and 50 ppm max- imum. The TC7116/TC7117 temperature coefficients are typically 80ppm/°C. An external reference may be used, if necessary, as s h o w ni nF i g u r e3 - 2 . FIGURE 3-2: USING AN EXTERNAL REFERENCE TC7116 TC7116A TC7117 TC7117A CREF CREF+ CREF- RINT CAZ Auto-Zero VINT 28 35 29 27333634 10µA AZ AZ INT AZ & DE (±) INT 26 Integrator V+ -3V Comparator To Digital Section DE (+) DE (–) DE (+) DE (–) AZ Analog Common VIN+ VIN- VBUFF CINT VREF+ Low Temp. Drift Zener VREF – + 1000 = VIN VREF 1.2V REF COMMON TC7116 TC7116A TC7117 TC7117A 6.8kΩ VREF+ 20kΩ
2002 Microchip Technology Inc. DS21457B-page 9 TC7116/A/TC7117/A A n a l o gc o m m o ni sa l s ou s e da sVIN- return during auto-zero and de-integrate. If VIN- is different from ana- log common, a Common mode voltage exists in the system and is taken care of by the excellent CMRR of the converter. However, in some applications, V IN-w i l l be set at a fixed, known voltage (power supply common for instance). In this application, analog common should be tied to the same point, thus removing the Common mode voltage from the converter. The same holds true for the reference voltage; if it can be conve- niently referenced to analog common, it should be. This removes the Common mode voltage from the reference system. Within the IC, analog common is tied to an N-channel FET, that can sink 30mA or more of current to hold the voltage 3V below the positive supply (when a load is trying to pull the analog common line positive). How- ever, there is only 10 µA of source current, so analog common may easily be tied to a more negative voltage, thus overriding the internal reference.
3.1.7 TEST
The TEST pin serves two functions. On the TC7117/ TC7117A, it is coupled to the internally generated digi- tal supply through a 500Ω resistor. Thus, it can be used as a negative supply for externally generated segment drivers, such as decimal points, or any other presenta- tion the user may want to include on the LCD. (Figure 3-3 and Figure 3-4 show such an application.) No more than a 1mA load should be applied. The second function is a "lamp test." When TEST is pulled HIGH (to V+), all segments will be turned ON and the display should read -1888. The TEST pin will sink about 10mA under these conditions. FIGURE 3-3: SIMPLE INVERTER FOR FIXED DECIMAL POINT FIGURE 3-4: EXCLUSIVE “OR” GATE FOR DECIMAL POINT DRIVE
3.2 Digital Section
Figure 3-5 and Figure 3-6 show the digital section for TC7116/TC7116A and TC7117/TC7117A, respectively. For the TC7116/TC7116A (Figure 3-5), an internal dig- ital ground is generated from a 6V zener diode and a large P-channel source follower. This supply is made stiff to absorb the relative large capacitive currents when the backplane (BP) voltage is switched. The BP frequency is the clock frequency 4800. For 3 readings per second, this is a 60Hz square wave with a nominal amplitude of 5V. The segments are driven at the same frequency and amplitude, and are in phase with BP when OFF , but out of phase when ON. In all cases, negligible DC voltage exists across the segments. Figure 3-6 is the digital section of the TC7117/ TC7117A. It is identical to the TC7116/TC7116A, except that the regulated supply and BP drive have been eliminated, and the segment drive is typically 8mA. The 1000's output (Pin 19) sinks current from two LED segments, and has a 16mA drive capability. The TC7117/TC7117A are designed to drive common anode LED displays. In both devices, the polarity indication is ON for analog inputs. If V IN- and VIN+ are reversed, this indication can be reversed also, if desired.TC7116 TC7116A BP TEST 37 V+ V+ GND To LCD Decimal Point To LCD Backplane 4049 TC7116 TC7116A Decimal Point Select TEST GND 4030 To LCD Decimal Point BP
DS21457B-page 10 2002 Microchip Technology Inc. FIGURE 3-5: TC7116/TC7116A DIGITAL SECTION
3.2.1 SYSTEM TIMING
T h ec l o c k i n gm e t h o du s e df o rt h eT C 7 1 1 6 / T C 7 1 1 6 A and TC7117/TC7117A is shown in Figure 3-6. Three clocking methods may be used: 1. An external oscillator connected to Pin 40. 2. A crystal between Pins 39 and 40. 3. An RC network using all three pins. The oscillator frequency is ÷4 before it clocks the decade counters. It is then further divided to form the three convert cycle phases: Signal Integrate (1000 counts), Reference De-integrate (0 to 2000 counts), and Auto-Zero (1000 to 3000 counts). For signals less than full scale, auto-zero gets the unused portion of ref- erence de-integrate. This makes a complete measure cycle of 4000 (16,000 clock pulses), independent of input voltage. For 3 readings per second, an oscillator frequency of 48kHz would be used. To achieve maximum rejection of 60Hz pickup, the sig- nal integrate cycle should be a multiple of 60Hz. Oscil- lator frequencies of 240kHz, 120kHz, 80kHz, 60kHz, 48kHz, 40kHz, etc. should be selected. For 50Hz rejec- tion, oscillator frequencies of 200kHz, 100kHz, 66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note that 40kHz (2.5 readings per second) will reject both 50Hz and 60Hz.
3.2.2 HOLD READING INPUT
When HLDR is at a logic HIGH, the latch will not be updated. Analog-to-digital conversions will continue, but will not be updated until HLDR is returned to LOW. To continuously update the display, connect to TEST (TC7116/TC7116A) or GROUND (TC7117/TC7117A), or disconnect. This input is CMOS compatible with 70kΩ typical resistance to TEST (TC7116/TC7116A) or GROUND (TC7117/TC7117A). TC7116 TC7116A LCD Phase Driver Thousands Hundreds Tens Units Backplane OSC2 Internal Digital Ground TEST 6.2V 500Ω To Switch Drivers From Comparator Output Clock VTH = 1V 7-Segment Decode 7-Segment Decode 7-Segment Decode 200 40 38 Typical Segment Output Internal Digital Ground Segment Output 0.5mA 2mA Latch OSC3OSC1 HLDR ~70kΩ Logic Control
2002 Microchip Technology Inc. DS21457B-page 11 TC7116/A/TC7117/A FIGURE 3-6: TC7117/TC711A DIGITAL SECTION TC7117 TC7117A OSC2 Digital GND TEST Clock 40 38 OSC3OSC1 HLDR Control Logic Typical Segment Output Digital Ground To Segment 0.5mA 8mA 500Ω Latch ~70kΩ To Switch Drivers From Comparator Output Internal Digital Ground Thousands Hundreds Tens Units 7-Segment Decode 7-Segment Decode 7-Segment Decode
DS21457B-page 12 2002 Microchip Technology Inc.
4.0 COMPONENT VALUE
4.1 Auto-Zero Capacitor
The size of the auto-zero capacitor has some influence on system noise. For 200mV full scale, where noise is very important, a 0.47 µF capacitor is recommended. On the 2V scale, a 0.047 µF capacitor increases the speed of recovery from overload and is adequate for noise on this scale.
4.2 Reference Capacitor
A0 . 1µF capacitor is acceptable in most applications. However, where a large Common mode voltage exists (i.e., the V IN- pin is not at analog common), and a 200mV scale is used, a larger value is required to pre- vent rollover error. Generally, 1µF will hold the rollover error to 0.5 count in this instance.
4.3 Integrating Capacitor
The integrating capacitor should be selected to give the maximum voltage swing that ensures tolerance buildup will not saturate the integrator swing (approximately 0.3V from either supply). In the TC7116/TC7116A or the TC7117/TC7117A, when the analog common is used as a reference, a nominal ±2V full scale integrator swing is acceptable. For the TC7117/TC7117A, with ±5V supplies and analog common tied to supply ground, a ±3.5V to ±4V swing is nominal. For 3 read- ings per second (48kHz clock), nominal values for C INT are 0.22µ1F and 0.10µF, respectively. If different oscil- lator frequencies are used, these values should be changed in inverse proportion to maintain the output swing. The integrating capacitor must have low dielec- tric absorption to prevent rollover errors. Polypropylene capacitors are recommended for this application.
4.4 Integrating Resistor
Both the buffer amplifier and the integrator have a class A output stage with 100 µA of quiescent current. They can supply 20 µA of drive current with negligible non- linearity. The integrating resistor should be large enough to remain in this very linear region over the input voltage range, but small enough that undue leak- age requirements are not placed on the PC board. For 2V full scale, 470k Ω is near optimum and, similarly, 47kΩ for 200mV full scale.
4.5 Oscillator Components
For all frequency ranges, a 100k Ω resistor is recom- mended; the capacitor is selected from the equation: EQUATION 4-1: For a 48kHz clock (3 readings per second), C = 100pF.
4.6 Reference Voltage
To generate full scale output (2000 counts), the analog input requirement is V IN =2 VREF. Thus, for the 200mV and 2V scale, V REF should equal 100mV and 1V, respectively. In many applications, where the ADC is connected to a transducer, a scale factor exists between the input voltage and the digital reading. For instance, in a measuring system, the designer might like t oh a v eaf u l ls c a l er e a d i n gw h e nt h ev o l t a g ef r o mt h e transducer is 700mV. Instead of dividing the input down to 200mV, the designer should use the input voltage directly and select V REF = 350mV. Suitable values for integrating resistor and capacitor would be 120kW and 0.22µF . This makes the system slightly quieter and also avoids a divider network on the input. The TC7117/ TC7117A, with ±5V supplies, can accept input signals up to ±4V. Another advantage of this system is when a digital reading of zero is desired for V IN ≠ 0. T empera- ture and weighing systems with a variable tare are examples. This offset reading can be conveniently gen- erated by connecting the voltage transducer between V IN+ and analog common, and the variable (or fixed) offset voltage between analog common and VIN-.
5.0 TC7117/TC7117A POWER
The TC7117/TC7117A are designed to operate from ±5V supplies. However, if a negative supply is not avail- able, it can be generated with a TC7660 DC-to-DC con- verter and two capacitors. Figure 5-1 shows this application. In selected applications, a negative supply is not required. The conditions for using a single +5V supply are: 1. The input signal can be referenced to the center of the Common mode range of the converter. 2. The signal is less than ±1.5V. 3. An external reference is used. FIGURE 5-1: NEGATIVE POWER SUPPLY GENERATION WITH TC7660 f 0.45 VREF+V+ TC7117 TC7117A 10µF VIN+ VIN- COM GND 10µF VIN (-5V)5 +5V TC7660 LED Drive
2002 Microchip Technology Inc. DS21457B-page 13 TC7116/A/TC7117/A
6.0 TYPICAL APPLICATIONS
The TC7117/TC7117A sink the LED display current, causing heat to build up in the IC package. If the inter- nal voltage reference is used, the changing chip tem- perature can cause the display to change reading. By reducing the LED common anode voltage, the TC7117/ TC7117A package power dissipation is reduced. Figure 6-1 is a curve tracer display showing the rela- tionship between output current and output voltage for typical TC7117CPL/TC7117ACPL devices. Since a typical LED has 1.8V across it at 8mA and its common anode is connected to +5V, the TC7117/TC7117A out- put is at 3.2V (Point A, Figure 6-1). Maximum power dissipation is 8.1mA x 3.2V x 24 segments = 622mW. However, notice that once the TC7117/TC7117A's out- put voltage is above 2V, the LED current is essentially constant as output voltage increases. Reducing the output voltage by 0.7V (Point B Figure 6-1) results in 7.7mA of LED current, only a 5% reduction. Maximum power dissipation is now only 7.7mA x 2.5V x 24 = 462mW, a reduction of 26%. An output voltage reduc- tion of 1V (Point C) reduces LED current by 10% (7.3mA), but power dissipation by 38% (7.3mA x 2.2V x 24 = 385mW). FIGURE 6-1: TC7117/TC7117A OUTPUT VS. OUTPUT VOLTAGE Reduced power dissipation is very easy to obtain. Figure 6-2 shows two ways: either a 5.1 Ω,1 / 4 Wr e s i s - tor, or a 1A diode placed in series with the display (but not in series with the TC7117/TC7117A). The resistor reduces the TC7117/TC7117A's output voltage (when all 24 segments are ON) to Point C of Figure 6-1. When segments turn off, the output voltage will increase. The diode, however, will result in a relatively steady output voltage, around Point B. In addition to limiting maximum power dissipation, the resistor reduces change in power dissipation as the display changes. The effect is caused by the fact that, as fewer segments are ON, each ON output drops more voltage and current. For the best case of six seg- ments (a “111” display) to worst case (a “1888” display), the resistor circuit will change about 230mW, while a circuit without the resistor will change about 470mW. Therefore, the resistor will reduce the effect of display dissipation on reference voltage drift by about 50%. The change in LED brightness caused by the resistor is almost unnoticeable as more segments turn off. If dis- play brightness remaining steady is very important to the designer, a diode may be used instead of the resistor. FIGURE 6-2: DIODE OR RESISTOR LIMITS PACKAGE POWER DISSIPATION C B A 6.000 7.000 8.000 9.000 10.000 Output Voltage (V) Output Current (mA) TP2TP5 100 kΩ TP1 24kΩ 1kΩ 0.1 µF TP3 0.01 µF In 0.22 µF Display Display 100 pF +5V 1MΩ -5V 150kΩ 0.47 µF TC7117 TC7117A 40 TP 3035 21 20101 kΩ 1N4001 1.5W, 1/4Ω
2002 Microchip Technology Inc. DS21457B-page 17 TC7116/A/TC7117/A
7.0 PACKAGING INFORMATION
7.1 Package Marking Information
Package marking data not available at this time.
7.2 Taping Form
Component Taping Orientation for 44-Pin PLCC Devices User Direction of Feed Standard Reel Component Orientation for TR Suffix Device Note: Drawing does not represent total number of pins. W P Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 44-Pin PLCC 32 mm 24 mm 500 13 in Carrier Tape, Number of Components Per Reel and Reel Size Component Taping Orientation for 44-Pin PQFP Devices User Direction of Feed PIN 1 Standard Reel Component Orientation for TR Suffix Device W P Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 44-Pin PQFP 24 mm 16 mm 500 13 in Carrier Tape, Number of Components Per Reel and Reel Size Note: Drawing does not represent total number of pins.
DS21457B-page 18 2002 Microchip Technology Inc.
7.3 Package Dimensions
Dimensions: inches (mm) 2.065 (52.45) 2.027 (51.49) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .070 (1.78) .045 (1.14) .022 (0.56) .015 (0.38) .110 (2.79) .090 (2.29) .555 (14.10) .530 (13.46) .610 (15.49) .590 (14.99) .015 (0.38) .008 (0.20) .700 (17.78) .610 (15.50) .040 (1.02) .020 (0.51) 40-Pin PDIP (Wide) PIN 1 3° MIN. Dimensions: inches (mm) .015 (0.38) .008 (0.20) .620 (15.75) .590 (15.00) .700 (17.78) .620 (15.75) .540 (13.72) .510 (12.95) 2.070 (52.58) 2.030 (51.56) .210 (5.33) .170 (4.32) .020 (0.51) .016 (0.41) .110 (2.79) .090 (2.29) .065 (1.65) .045 (1.14) .200 (5.08) .125 (3.18) .060 (1.52) .020 (0.51) .150 (3.81) MIN. 40-Pin CERDIP (Wide) PIN 1 3° MIN.
2002 Microchip Technology Inc. DS21457B-page 19 TC7116/A/TC7117/A
7.3 Package Dimensions (Continued)
Dimenisons: inches (mm) .695 (17.65) .685 (17.40) .656 (16.66) .650 (16.51) .656 (16.66) .650 (16.51) .021 (0.53) .013 (0.33) .032 (0.81) .026 (0.66) .630 (16.00) .591 (15.00) .120 (3.05) .090 (2.29) .180 (4.57) .165 (4.19) .695 (17.65) .685 (17.40) .050 (1.27) TYP. .020 (0.51) MIN. PIN 1 44-Pin PLCC Dimenisons: inches (mm) .557 (14.15) .537 (13.65) .398 (10.10) .390 (9.90) .031 (0.80) TYP. .018 (0.45) .390 (9.90) .010 (0.25) TYP. .096 (2.45) MAX. .557 (14.15) .537 (13.65) .083 (2.10) .075 (1.90) .041 (1.03) .026 (0.65) 7° MAX. .009 (0.23) .005 (0.13) 44-Pin PQFP PIN 1
DS21457B-page 20 2002 Microchip Technology Inc. PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. SALES AND SUPPORT Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. T o determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales office 2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 3. The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. PART CODE TC711X X X XXX 6 = LCD 7 = LED A or blank* R (reversed pins) or blank (CPL pkg only) * "A" parts have an improved reference TC Package Code (see Device Selection Table)
2002 Microchip Technology Inc. DS21457B-page 21 TC7116/ATC7117/A Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip T echnology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical com- ponents in life support systems is not authorized except with express written approval by Microchip. No licenses are con- veyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, K EELOQ,m i c r o I D ,M P L A B ,P I C ,P I C m i c r o ,P I C M A S T E R , PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Tech- nology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro ® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified.
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