TC642CUA

TC642 MICROCHIP | Alldatasheet

Document overview

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Technical content

Features

• T emperature Proportional Fan Speed for Acoustic Control and Longer Fan Life
• Efficient PWM Fan Drive
• 3.0V to 5.5V Supply Range: - Fan Voltage Independent of TC642 Supply Voltage - Supports any Fan Voltage
• FanSense™ Fault Detection Circuits Protect Against Fan Failure and Aid System T esting
• Shutdown Mode for "Green" Systems
• Supports Low Cost NTC/PTC Thermistors
• Space Saving 8-Pin MSOP Package
• Over-temperature Indication

Applications

• Power Supplies
• Personal Computers
• File Servers
• T elecom Equipment
• UPSs, Power Amps, etc.
• General Purpose Fan Speed Control Available Tools
• Fan Controller Demonstration Board (TC642DEMO)
• Fan Controller Evaluation Kit (TC642EV) Package Types General Description The TC642 is a switch mode fan speed controller for use with brushless DC fans. Temperature proportional speed control is accomplished using pulse width mod- ulation (PWM). A thermistor (or other voltage output temperature sensor) connected to the V IN input fur- nishes the required control voltage of 1.25V to 2.65V (typical) for 0% to 100% PWM duty cycle. Minimum fan speed is set by a simple resistor divider on the V MIN input. An integrated Start-up Timer ensures reliable motor start-up at turn-on, coming out of shutdown mode or following a transient fault. A logic low applied to V MIN (Pin 3) causes fan shutdown. The TC642 also features Microchip T echnology's pro- prietary FanSense™ technology for increasing system reliability. In normal fan operation, a pulse train is present at SENSE (Pin 5). A missing pulse detector monitors this pin during fan operation. A stalled, open or unconnected fan causes the TC642 to trigger its Start-up Timer once. If the fault persists, the FAULT output goes low and the device is latched in its shut- down mode. FAULT is also asserted if the PWM reaches 100% duty cycle, indicating a possible thermal runaway situation, although the fan continues to run. See Section 5.0, “Typical Applications”, for more information and system design guidelines. The TC642 is available in the standard 8-pin plastic DIP , SOIC and MSOP packages and is available in the commercial, extended commercial and industrial temperature ranges. TC642 GND CF VIN VMIN FAULT SENSE VDD VOUT SOIC/PDIP/MSOP PWM Fan Speed Controller with FanSense™ Technology

DS21444C-page 2  2002 Microchip Technology Inc. Functional Block Diagram FAULT SHDN SENSE OTF GND 70mV (typ.) 10kΩ VMIN VIN CF VDD VOUT TC642 Control Logic VOTF VSHDN 3 x TPWM Timer Start-up Timer Clock Generator Missing Pulse Detect

 2002 Microchip Technology Inc. DS21444C-page 3 TC642

1.0 ELECTRICAL

Absolute Maximum Ratings* Package Thermal Resistance: *Stresses above those listed under "Absolute Maximum Rat- ings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Expo- sure to absolute maximum rating conditions for extended peri- ods may affect device reliability. ELECTRICAL SPECIFICATIONS Note 1: Ensured by Design, not tested. Electrical Characteristics: TMIN < TA < TMAX, VDD = 3.0V to 5.5V, unless otherwise specified. Symbol Parameter Min Typ Max Units Test Conditions VDD Supply Voltage 3.0 — 5.5 V IDD Supply Current, Operating — 0.5 1.0 mA Pins 6, 7 Open, CF = 1 µF, VIN = VC(MAX) IDD(SHDN) Supply Current, Shutdown Mode — 25 — µA Pins 6, 7 Open, CF = 1 µF, VMIN = 0.35V, Note 1 IIN VIN, VMIN Input Leakage - 1.0 — +1.0 µA Note 1 VOUT Output tR VOUT Rise Time — — 50 µsec I OH = 5 mA, Note 1 tF VOUT Fall Time — — 50 µsec I OL = 1 mA, Note 1 tSHDN Pulse Width (On VMIN) to Clear Fault Mode 30 — — µsec V SHDN, VHYST Specifications, Note 1 IOL Sink Current at VOUT Output 1.0 — — mA V OL = 10% of VDD IOH Source Current at VOUT Output 5.0 — — mA V OH = 80% of VDD VIN, VMIN Inputs VC(MAX), VOTF Input Voltage at VIN or VMIN for 100% PWM Duty Cycle 2.5 2.65 2.8 V VC(SPAN) VC(MAX) - VC(MIN) 1.3 1.4 1.5 V VSHDN Voltage Applied to VMIN to ensure Shutdown Mode —— V DD x 0.13 V VREL Voltage Applied to VMIN to Release Shutdown Mode VDD x 0.19 — — V V DD = 5V Pulse Width Modulator FPWM PWM Frequency 26 30 34 Hz C F = 1.0 µF SENSE Input VTH(SENSE) SENSE Input Threshold Voltage with Respect to GND 50 70 90 mV Note 1 FAULT Output VOL Output Low Voltage — — 0.3 V I OL = 2.5 mA tMP Missing Pulse Detector Timer — 32/F — Sec tSTARTUP Start-up Timer — 32/F — Sec tDIAG Diagnostic Timer — 3/F — Sec

DS21444C-page 4  2002 Microchip Technology Inc.

2.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE

2.1 Analog Input (V IN)

The thermistor network (or other temperature sensor) connects to the V IN input. A voltage range of 1.25V to 2.65V (typical) on this pin drives an active duty cycle of 0% to 100% on the V OUT pin.

2.2 Analog Output (C F)

CF is the positive terminal for the PWM ramp generator timing capacitor. The recommended C F is 1 µF for 30 Hz PWM operation.

2.3 Analog Input (V MIN)

An external resistor divider connected to the VMIN input sets the minimum fan speed by fixing the minimum PWM duty cycle (1.25V to 2.65V = 0% to 100%, typi- cal). The TC642 enters shutdown mode when V MIN ≤ VSHDN. During shutdown, the FAULT output is inactive and supply current falls to 25 µA (typical). The TC642 exits shutdown mode when V MIN ≥ VREL (see Section 5.0, “Typical Applications”).

2.4 Ground (GND)

GND denotes the ground terminal.

2.5 Analog Input (SENSE)

Pulses are detected at the SENSE pin as fan rotation chops the current through a sense resistor. The absence of pulses indicates a fault.

2.6 Digital Output (FAULT )

The FAULT line goes low to indicate a fault condition. When FAULT goes low due to a fan fault condition, the device is latched in shutdown mode until deliberately cleared or until power is cycled. FAULT may be con- nected to V MIN if a hard shutdown is desired. FAULT will also be asserted when the PWM reaches 100% duty cycle, indicating that maximum cooling capability has been reached and a possible over-temperature condition may occur. This is a non-latching state and the FAULT output will go high when the PWM duty cycle goes below 100%.

2.7 Digital Output (V OUT)

VOUT is an active high complimentary output that drives the base of an external NPN transistor (via an appropri- ate base resistor) or the gate of an N-channel MOS- FET. This output has asymmetrical drive (see Section 1.0, “Electrical Characteristics”).

2.8 Power Supply Input (V DD)

VDD may be independent of the fan’s power supply (see Section 1.0, “Electrical Characteristics”). Pin No. Symbol Description 1V IN Analog Input 2C F Analog Output 3V MIN Analog Input

4 GND Ground Terminal

5 SENSE Analog Input

6F A U L T Digital (Open Collector) Output 7V OUT Digital Output 8V DD Power Supply Input

 2002 Microchip Technology Inc. DS21444C-page 5 TC642

3.0 DETAILED DESCRIPTION

3.1 PWM

The PWM circuit consists of a ramp generator and threshold detector. The frequency of the PWM is deter- mined by the value of the capacitor connected to the C F input. A frequency of 30 Hz is recommended F = 1 µF). The PWM is also the time base for the Start-up Timer (see Section 3.4, “Start-Up Timer”). The PWM voltage control range is 1.25V to 2.65V (typical) for 0% to 100% output duty cycle.

3.2 FAULT Output

The TC642 detects faults in two ways. First, pulses appearing at SENSE due to the PWM turning on are blanked, with the remaining pulses filtered by a missing pulse detector. If consecutive pulses are not detected for 32 PWM cycles ( ≅1 Sec if CF = 1 µF), the Diagnostic Timer is activated, and VOUT is driven high continuously for three PWM cycles (≅100 msec if C F = 1 µF). If a pulse is not detected within this window, the Start-up Timer is triggered (see Section 3.4). This should clear a transient fault condi- tion. If the missing pulse detector times out again, the PWM is stopped and FAULT goes low. When FAULT is activated due to this condition, the device is latched in shutdown mode and will remain off indefinitely. The TC642 may be configured to continuously attempt fan restarts, if so desired. Continuous restart mode is enabled by connecting the FAULT output to V MIN through a 0.01 µF capacitor, as shown in Figure 3-1. When connected in this manner, the TC642 automatically attempts to restart the fan every time a fault condition occurs. When the FAULT output is driven low, the V MIN input is momentarily pulled below V SHDN, initiating a reset and clearing the fault condition. Normal fan start-up is then attempted as previously described. The FAULT output may be connected to external logic (or the interrupt input of a microcontroller) to shut the TC642 down if multiple fault pulses are detected at approximately one second intervals. Diode D 1, capacitor C 1 and resistors R 5 and R6 are provided to ensure fan restarts are the result of a fan fault and not an over-temperature fault. A CMOS logic OR gate may be substituted for these components, if available. FIGURE 3-1: Fan Fault Output Circuit. Note: At this point, action must be taken to restart the fan by momentarily pulling V MIN below VSHDN, or cycling system power. In either case, the fan cannot remain disabled due to a fault condition, as severe system dam- age could result. If the fan cannot be restarted, the system should be shut down. FAULT SENSE 10kΩ R4 GND From System Shutdown Controller (Optional) *The parallel combination of R3 and R4 must be >10 kΩ. +12V +5V VDDVIN VMIN VOUT RBASE 1kΩ VDD RSENSE CSENSE CF 1µF CF TC642 Fan CB 0.01µF From Temp Sensor +5V 0.01µF TC642 RESET Fault Detected

DS21444C-page 6  2002 Microchip Technology Inc. The second condition by which the TC642 detects a fault is when the PWM control voltage applied to V IN becomes greater than that needed to drive 100% duty cycle (see Section 1.0 , “Electrical Characteristics”). This indicates that the fan is at maximum drive and the potential exists for system overheating. Either heat dis- sipation in the system has gone beyond the cooling system’s design limits or some subtle fault exists (such as fan bearing failure or an airflow obstruction). This output may be treated as a system overheat warning and be used to trigger system shutdown. However, in this case, the fan will continue to run even when FAULT is asserted. If a shutdown is desired, FAULT may be connected to VMIN outside the device. This will latch the TC642 in shutdown mode when any fault occurs.

3.3 V OUT Output

The VOUT pin is designed to drive a low cost transistor or MOSFET as the low side power switching element in the system. Various examples of driver circuits will be shown throughout this data sheet. This output has asymmetric complementary drive and is optimized for driving NPN transistors or N-channel MOSFETs. Since the system relies on PWM rather than linear control, the power dissipation in the power switch is kept to a minimum. Generally, very small devices (TO-92 or SOT packages) will suffice.

3.4 Start-Up Timer

To ensure reliable fan start-up, the Start-up Timer turns the V OUT output on for 32 cycles of the PWM whenever the fan is started from the off state. This occurs at power-up and when coming out of shutdown mode. If the PWM frequency is 30 Hz (C F = 1 µF), the resulting start-up time will be approximately one second. If a fault is detected, the Diagnostic Timer is triggered once, followed by the Start-up Timer. If the fault per- sists, the device is shut down (see Section 3.2, “FAULT Output”).

3.5 Shutdown Control (Optional)

If VMIN (Pin 3) is pulled below VSHDN, the TC642 will go into shutdown mode. This can be accomplished by driving V MIN with an open-drain logic signal or by using an external transistor, as shown in Figure 3-1. All func- tions are suspended until the voltage on VMIN becomes higher than V REL (0.85V @ V DD = 5.0V). Pulling V MIN below V SHDN will always result in complete device shutdown and reset. The FAULT output is unconditionally inactive in shutdown mode. A small amount of hysteresis, typically one percent of VDD (50 mV at VDD = 5.0V), is designed into the VSHDN and VREL thresholds. The levels specified for V SHDN and V REL in Section 1.0 , “Electrical Characteristics”, include this hysteresis, plus adequate margin to account for normal variations in the absolute value of the threshold and hysteresis.

3.6 SENSE Input

(FanSense Technology) The SENSE input (Pin 5) is connected to a low value current sensing resistor in the ground return leg of the fan circuit. During normal fan operation, commutation occurs as each pole of the fan is energized. This causes brief interruptions in the fan current, seen as pulses across the sense resistor. If the device is not in shutdown mode, and pulses are not appearing at the SENSE input, a fault exists. The short, rapid change in fan current (high dI/dt) causes a corresponding dV/dt across the sense resistor, R SENSE. The waveform on RSENSE is differen- tiated and converted to a logic-level pulse-train by C SENSE and the internal signal processing circuitry. The presence and frequency of this pulse-train is a direct indication of fan operation (see Section 5.0, “Typ- ical Applications”, for more details). CAUTION: Shutdown mode is unconditional. That is, the fan will not be activated regardless of the voltage at V IN. The fan should not be shut down until all heat producing activity in the system is at a negligible level.

 2002 Microchip Technology Inc. DS21444C-page 7 TC642

4.0 SYSTEM BEHAVIOR

The flowcharts describing the TC642’s behavioral algorithm are shown in Figure 4-1. They can be summarized as follows:

4.1 Power-Up

(1) Assuming the device is not being held in shutdown mode (VMIN > VREL)… (2) Turn V OUT output on for 32 cycles of the PWM clock. This ensures that the fan will start from a dead stop. (3) During this Start-up Timer, if a fan pulse is detected, branch to Normal Operation; if none are received… (4) Activate the 32-cycle Start-up Timer one more time and look for a fan pulse; if a fan pulse is detected, proceed to Normal Operation; if none are received… (5) Proceed to Fan Fault. (6) End.

4.2 Normal Operation

Normal Operation is an endless loop which may only be exited by entering shutdown mode or Fan Fault. The loop can be thought of as executing at the frequency of the oscillator and PWM. (1) Reset the missing pulse detector. (2) Is TC642 in shutdown? If so… a. V OUT duty cycle goes to zero. b. FAULT is disabled. c. Exit the loop and wait for V MIN > VREL to resume operation (indistinguishable from power-up). (3) If an over-temperature fault occurs (V IN > V OTF), activate FAULT; release FAULT when VIN < VOTF. (4) Drive V OUT to a duty cycle proportional to the greater of VIN and VMIN on a cycle by cycle basis. (5) If a fan pulse is detected, branch back to the start of the loop (1). (6) If the missing pulse detector times out … (7) Activate the 3-cycle Diagnostic Timer and look for pulses; if a fan pulse is detected, branch back to the start of the loop (1); if none are received… (8) Activate the 32-cycle Start-up Timer and look for pulses; if a fan pulse is detected, branch back to the start of the loop (1); if none are received… (9) Quit Normal Operation and go to Fan Fault. (10) End.

4.3 Fan Fault

Fan fault is an infinite loop wherein the TC642 is latched in shutdown mode. This mode can only be released by a reset (i.e., V MIN being brought below VSHDN, then above VREL, or by power-cycling). (1) While in this state, FAULT is latched on (low) and the VOUT output is disabled. (2) A reset sequence applied to the V MIN pin will exit the loop to Power-Up. (3) End.

DS21444C-page 8  2002 Microchip Technology Inc. FIGURE 4-1: TC642 Behavioral Algorithm Flowchart. FAULT = 0, VOUT = 0 Cycling Power?VMIN < VSHDN? Yes Yes Yes No No Fan Fault Power-up VMIN > VREL? Fan Fault Detected? Fan Pulse Detected? VMIN < VSHDN Shutdown VOUT = 0 Yes No No Yes Yes Power-Up Normal Operation Fan Fault YES Power-on Reset FAULT = 1 VMIN > VREL? No Fire Start-up Timer (1 SEC) Fire Start-up Timer (1 SEC) VMIN > VREL Yes Fan Fault Clear Missing Pulse Detector VOUT Proportional to Greater of VIN or VMIN VMIN < VSHDN? VIN > VOTF? M.P.D. Expired? Fan Pulse Detected? No No No No No No Yes Yes Yes Normal Operaton Power-up Yes FAULT = 0 Yes Fire Diagnostic Timer (100msec) Fan Pulse Detected? Fan Pulse Detected? Fire Start-up Timer (1 SEC) Yes No Shutdown VOUT = 0 No Yes No

 2002 Microchip Technology Inc. DS21444C-page 9 TC642

5.0 TYPICAL APPLICATIONS

Designing with the TC642 involves the following: (1) The temp sensor network must be configured to deliver 1.25V to 2.65V on VIN for 0% to 100% of the temperature range to be regulated. (2) The minimum fan speed (V MIN) must be set. (3) The output drive transistor and associated circuitry must be selected. (4) The SENSE network, R SENSE and C SENSE, must be designed for maximum efficiency, while delivering adequate signal amplitude. (5) If shutdown capability is desired, the drive require- ments of the external signal or circuit must be considered. The TC642 demonstration and prototyping board (TC642DEMO), and the TC642 Evaluation Kit (TC642EV), provide working examples of TC642 cir- cuits and prototyping aids. The TC642DEMO is a printed circuit board optimized for small size and ease of inclusion into system prototypes. The TC642EV is a larger board intended for benchtop development and analysis. At the very least, anyone contemplating a design using the TC642 should consult the documen- tation for both TC642EV (DS21403) and TC642DEMO (DS21401). FIGURE 5-1: Typical Application Circuit.

5.1 Temperature Sensor Design

The temperature signal connected to VIN must output a voltage in the range of 1.25V to 2.65V (typical) for 0% to 100% of the temperature range of interest. The circuit in Figure 5-2 illustrates a convenient way to provide this signal. Figure 5-2 shows a simple temperature dependent voltage divider circuit. RT 1 is a conventional NTC ther- mistor while R1 and R2 are standard resistors. The sup- ply voltage, VDD, is divided between R2 and the parallel combination of RT1 and R1 (for convenience, the paral- lel combination of RT 1 and R 1 will be referred to as RTEMP). The resistance of the thermistor at various temperatures is obtained from the manufacturer’s specifications. Thermistors are often referred to in terms of their resistance at 25°C. FAULT SENSE NTCR1 GND Thermal Shutdown Shutdown (Optional) Note: *See cautions regarding latch-up considerations in Section 5.0, "Typical Applications". +12V +5V* VDDVIN VMIN VOUT RBASE RSENSE CSENSE CF 1 µF CF TC642 Fan CB 1 µF CB 0.01 µF CB 0.01 µF

DS21444C-page 10  2002 Microchip Technology Inc. FIGURE 5-2: Temperature Sensing Circuit. Generally, the thermistor shown in Figure 5-2 is a non- linear device with a negative temperature coefficient (also called an NTC thermistor). In Figure 5-2, R 1 is used to linearize the thermistor temperature response, while R 2 is used to produce a positive temperature coefficient at the V IN node. As an added benefit, this configuration produces an output voltage delta of 1.4V, which is well within the range of the V C(SPAN) specification of the TC642. A 100 kΩ NTC thermistor is selected for this application in order to keep I DIV at a minimum. For the voltage range at V IN to be equal to 1.25V to 2.65V, the temperature range of this configuration is 0°C to 50°C. If a different temperature range is required from this circuit, R 1 should be chosen to equal the resistance value of the thermistor at the center of this new temperature range. With this change, R 2 is adjusted according to the formulas below. It is suggested that a maximum temperature range of 50°C be used with this circuit due to thermistor linearity limitations. The following two equations permit solving for the two unknown variables, R 1 and R 2. More information regarding thermistors can be found in AN679, “Temper- ature Sensing Technologies”, and AN685, “Thermistors in Single Supply T emperature Sensing Circuits”, which can be downloaded from Microchip’s web site at: www.microchip.com. EQUATION

5.2 Minimum Fan Speed

A voltage divider on VMIN sets the minimum PWM duty cycle and, thus, the minimum fan speed. As with the V IN input, 1.25V to 2.65V typically corresponds to 0% to 100% duty cycle. Assuming that fan speed is linearly related to duty cycle, the minimum speed voltage is given by the equation: EQUATION For example, if 2500 RPM equates to 100% fan speed, and a minimum speed of 1000 RPM is desired, then the V MIN voltage is: EQUATION The V MIN voltage may be set using a simple resistor divider, as shown in Figure 5-3. Per Section 1.0, “Electrical Characteristics”, the leakage current at the V MIN pin is no more than 1 µA. It would be very conservative to design for a divider current, I DIV, of 100 µA. If VDD = 5.0V then; EQUATION FIGURE 5-3: VIN Circuit. R2 = 23.2 kΩ R1 = 100 kΩ NTC Thermistor 100 kΩ @ 25˚C RT1 IDIV VIN VDD VDD x R2 RTEMP (T1) + R2 = V(T1) RTEMP (T2) + R2 = V(T2)VDD x R2 Where T1 and T2 are the chosen temperatures and RTEMP is the parallel combination of the thermistor and R1. Minimum Speed Full Speed VMIN = x (1.4) + 1.25V 1000 2500 R1+ R2 IDIV = 100µA = , therefore 5.0V R1 + R2 = = 50,000Ω = 50kΩ 100µA 5.0V GND VDD VMINIDIV IIN

 2002 Microchip Technology Inc. DS21444C-page 11 TC642 We can further specify R1 and R2 by the condition that the divider voltage is equal to our desired V MIN. This yields the following equation: EQUATION Solving for the relationship between R 1 and R2 results in the following equation: EQUATION In this example, R1 = (1.762) R2. Substituting this rela- tionship back into the previous equation yields the resistor values: R 2 = 18.1 kΩ , and R1 = 31.9 kΩ In this case, the standard values of 31.6 k Ω and 18.2 kΩ are very close to the calculated values and would be more than adequate.

5.3 Operations at Low Duty Cycle

One boundary condition which may impact the selec- tion of the minimum fan speed is the irregular activation of the Diagnostic Timer due to the TC642 “missing” fan commutation pulses at low speeds. This is a natural consequence of low PWM duty cycles (typically 25% or less). Recall that the SENSE function detects commu- tation of the fan as disturbances in the current through R SENSE. These can only occur when the fan is ener- gized (i.e., V OUT is “on”). At very low duty cycles, the VOUT output is “off” most of the time. The fan may be rotating normally, but the commutation events are occurring during the PWM’s off-time. The phase relationship between the fan’s commutation and the PWM edges tends to “walk around” as the system operates. At certain points, the TC642 may fail to capture a pulse within the 32-cycle missing pulse detector window. When this happens, the 3-cycle Diagnostic Timer will be activated, the V OUT output will be active continuously for three cycles and, if the fan is operating normally, a pulse will be detected. If all is well, the system will return to normal operation. There is no harm in this behavior, but it may be audible to the user as the fan accelerates briefly when the Diagnostic Timer fires. For this reason, it is recommended that V MIN be set no lower than 1.8V.

5.4 FanSense Network

(RSENSE and CSENSE) The FanSense network, comprised of R SENSE and CSENSE, allows the TC642 to detect commutation of the fan motor (FanSense technology). This network can be thought of as a differentiator and threshold detector. The function of R SENSE is to convert the fan current into a voltage. CSENSE serves to AC-couple this voltage signal and provide a ground-referenced input to the SENSE pin. Designing a proper SENSE network is simply a matter of scaling R SENSE to provide the nec- essary amount of gain (i.e., the current-to-voltage con- version ratio). A 0.1 µF ceramic capacitor is recommended for C SENSE. Smaller values require larger sense resistors, and higher value capacitors are bulkier and more expensive. Using a 0.1 µF capacitor results in reasonable values for R SENSE. Figure 5-4 illustrates a typical SENSE network. Figure 5-5 shows the waveforms observed using a typical SENSE net- work. FIGURE 5-4: SENSE Network. FIGURE 5-5: SENSE Waveforms. VDD x R2 R1 + R2 VMIN = VDD - VMIN VMIN R1 = R2 x GND VDD RSENSE SENSE RBASE CSENSE (0.1 µF Typ.) VOUT Fan Ch1 100mV Tek Run: 10.0kS/s Sample Ch2 100mV M5.00ms Ch1 142mV GND [ T ] T Waveform @ Sense Resistor 90mV 50mV GND Waveform @ Sense Pin

DS21444C-page 12  2002 Microchip Technology Inc. Table 5-1 lists recommended values for RSENSE based on the nominal operating current of the fan. Note that the current draw specified by the fan manufacturer may be a worst-case rating for near-stall conditions and may not be the fan’s nominal operating current. The values in Table 5-1 refer to actual average operating current. If the fan current falls between two of the values listed, use the higher resistor value. The end result of employ- ing Table 5-1 is that the signal developed across the sense resistor is approximately 450 mV in amplitude. TABLE 5-1: RSENSE VS. FAN CURRENT

5.5 Output Drive Transistor Selection

The TC642 is designed to drive an external transistor or MOSFET for modulating power to the fan. This is shown as Q and 5-9. The V OUT pin has a minimum source current of 5 mA and a minimum sink current of 1 mA. Bipolar transistors or MOSFET s may be used as the power switching element, as shown in Figure 5-7. When high current gain is needed to drive larger fans, two transis- tors may be used in a Darlington configuration. Three possible circuit topologies are shown in Figure 5-7: (a) shows a single NPN transistor used as the switching element; (b) illustrates the Darlington pair; and (c) shows an N-channel MOSFET. One major advantage of the TC642’s PWM control scheme versus linear speed control is that the power dissipation in the pass element is kept very low. Gener- ally, low cost devices in very small packages, such as TO-92 or SOT , can be used effectively. For fans with nominal operating currents of no more than 200 mA, a single transistor usually suffices. Above 200 mA, the Darlington or MOSFET solution is recommended. For the fan sensing function to work correctly, it is impera- tive that the pass transistor be fully saturated when “on”. Table 5-2 gives examples of some commonly available transistors and MOSFETs. This table should be used as a guide only since there are many transistors and MOSFETs which will work just as well as those listed. The critical issues when choosing a device to use as Q 1 are: (1) the breakdown voltage (V (BR)CEO or V DS (MOSFET)) must be large enough to withstand the highest voltage applied to the fan (Note: This will occur when the fan is off); (2) 5 mA of base drive current must be enough to saturate the transistor when conducting the full fan current (transistor must have sufficient gain); (3) the V OUT voltage must be high enough to suf- ficiently drive the gate of the MOSFET to minimize the R DS(on) of the device; (4) rated fan current draw must be within the transistor's/MOSFET's current handling capability; and (5) power dissipation must be kept within the limits of the chosen device. A base-current limiting resistor is required with bipolar transistors (Figure 5-6). FIGURE 5-6: Circuit For Determining RBASE. The correct value for this resistor can be determined as follows: VOH = VRSENSE + VBE(SAT) + VRBASE VRSENSE = IFAN x RSENSE VRBASE = RBASE x IBASE IBASE = IFAN / hFE VOH is specified as 80% of VDD in Section 1.0, “Electri- cal Characteristics”; V BE(SAT) is given in the chosen transistor’s data sheet. It is now possible to solve for RBASE. EQUATION Nominal Fan Current (mA) R SENSE (Ω ) 50 9.1 100 4.7 150 3.0 200 2.4 250 2.0 300 1.8 350 1.5 400 1.3 450 1.2 500 1.0 GND VDD RSENSE RBASE VOH = 80% VDD + VRBASE + VBE(SAT) VRSENSE Fan RBASE = VOH - VBE(SAT) - VRSENSE IBASE

DS21444C-page 14  2002 Microchip Technology Inc. TABLE 5-2: TRANSISTORS AND MOSFETS FOR Q 1 (VDD = 5V)

5.6 Latch-up Considerations

As with any CMOS IC, the potential exists for latch-up if signals are applied to the device which are outside the power supply range. This is of particular concern during power-up if the external circuitry (such as the sensor network, V MIN divider or shutdown circuit) is powered by a supply different from that of the TC642. Care should be taken to ensure that the TC642’s V DD supply powers up first. If possible, the networks attached to V IN and V MIN should connect to the V DD supply at the same physical location as the IC itself. Even if the IC and any external networks are powered by the same supply, physical separation of the connecting points can result in enough parasitic capacitance and/or inductance in the power supply connections to delay one power supply “routing” versus another. Device Package Max. V BE(sat)/VGS (V) Min. HFE VCEO/VDS (V) Fan Current (mA) Suggested RBASE (Ω ) MMBT2222A SOT-23 1.2 50 40 150 800 MPS2222A TO-92 1.2 50 40 150 800 MPS6602 TO-92 1.2 50 40 500 301 SI2302 SOT-23 2.5 NA 20 500 Note 1 MGSF1N02E SOT-23 2.5 NA 20 500 Note 1 SI4410 SO-8 4.5 NA 30 1000 Note 1 SI2308 SOT-23 4.5 NA 60 500 Note 1 Note 1: A series gate resistor may be used in order to control the MOSFET turn-on and turn-off times.

 2002 Microchip Technology Inc. DS21444C-page 15 TC642

5.7 Power Supply Routing and

Noise present on the V IN and V MIN inputs may cause erroneous operation of the FAULT output. As a result, these inputs should be bypassed with a 0.01 µF capacitor mounted as close to the package as is possi- ble. This is particularly true of V IN, which is usually driven from a high impedance source (such as a ther- mistor). In addition, the V DD input should be bypassed with a 1 µF capacitor. Grounds should be kept as short as possible. To keep fan noise off the TC642 ground pin, individual ground returns for the TC642 and the low side of the fan current sense resistor should be used. Design Example Step 1. Calculate R1 and R2 based on using an NTC having a resistance of 10 k Ω at T MIN (25°C) and 4.65 kΩ at TMAX (45°C) (see Figure 5-9). R1 = 20.5 kΩ R2 = 3.83 kΩ Step 2. Set minimum fan speed VMIN = 1.8V. Limit the divider current to 100 µA from which R5 = 33 kΩ and R6 = 18 kΩ. Step 3. Design the output circuit. Maximum fan motor current = 250 mA. Q1 beta is chosen at 50 from which R7 = 800 Ω . FIGURE 5-9: Design Example. FAULT SENSE NTC 10 kΩ @ 25˚C 20.5 kΩ 3.83 kΩ 33 kΩ 800Ω 18 kΩR8 10 kΩ GND Fan Shutdown (Optional) +12V +5V +5V +5V VDDVIN VMIN VOUT RSENSE 2.2Ω CSENSE 0.1 µF 1µF CF TC642 Fan CB 0.01 µF CB 0.01 µF +CB 1 µF 8 4 Fan/ Thermal Fault

DS21444C-page 16  2002 Microchip Technology Inc.

5.8 TC642 as a Microcontroller

In a system containing a microcontroller or other host intelligence, the TC642 can be effectively managed as a CPU peripheral. Routine fan control functions can be performed by the TC642 without processor intervention. The microcontroller receives temperature data from one or more points throughout the system. It calculates a fan operating speed based on an algorithm specifically designed for the application at hand. The processor controls fan speed using complementary port bits I/O1 through I/O3. Resistors R 1 through R 6 (5% tolerance) form a crude 3-bit DAC that translates the 3-bit code from the processor's outputs into a 1.6V DC control sig- nal. A monolithic DAC or digital pot may be used instead of the circuit shown in Figure 5-10. With V MIN set to 1.8V, the TC642 has a minimum operating speed of approximately 40% of full rated speed when the processor's output code is 000[B]. Output codes 001[B] to 111[B] operate the fan from roughly 40% to 100% of full speed. An open-drain output from the processor (I/O0) can be used to reset the TC642 following detection of a fault condition. The FAULT output can be connected to the processor's interrupt input, or to an I/O pin, for polled operation. FIGURE 5-10: TC642 as a Microcontroller Peripheral. TC642 VIN CF VMIN GND VDD VOUT FAULT SENSE (Optional) (MSB) 110 kΩ 240 kΩ 360 kΩ (LSB) 1.5 kΩ +5V 1 kΩ 18 kΩ 33 kΩ +5V 18 kΩ CB .01 µF 1 µF CB .01 µF Fan +12V +5V CB 1 µF 800Ω +5V R10 10 kΩ 0.1 µF 2N2222A R11 2.2Ω 4 5 (RESET) CMOS Microcontroller +5V Analog or Digital Temperature Data from one or more Sensors I/O0 I/O1 I/O2 I/O3 INTGND CMOS Outputs Open-drain Outputs

 2002 Microchip Technology Inc. DS21444C-page 17 TC642

6.0 PACKAGING INFORMATION

6.1 Package Marking Information

8-Lead PDIP (300 mil) Example: 8-Lead SOIC (150 mil) Example: XXXXXXXX YYWW NNN TC642CPA 025 0215 TC642COA 0215 025 8-Lead MSOP Example: XXXXXX YWWNNN TC642E 215025 Legend: XX...X Customer specific information* YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.

DS21444C-page 18  2002 Microchip Technology Inc. 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) B A L p α E eB β c n D Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 88 Pitch p .100 2.54 Base to Seating Plane A1 .015 0.38 Mold Draft Angle Top α 51 01 5 51 01 5 Mold Draft Angle Bottom β 51 01 5 51 01 5 * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed JEDEC Equivalent: MS-001 Drawing No. C04-018 .010” (0.254mm) per side. § Significant Characteristic

 2002 Microchip Technology Inc. DS21444C-page 19 TC642 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) Foot Angle f 048048 1512015120βMold Draft Angle Bottom 1512015120αMold Draft Angle Top 1.27.050pPitch 88nNumber of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES*Units D n p B E h Lβ c 45× f α A * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 § Significant Characteristic

DS21444C-page 20  2002 Microchip Technology Inc. 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) p A D L c Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not .037.035FFootprint (Reference) exceed. 010" (0.254mm) per side. Notes: Drawing No. C04-111 *Controlling Parameter Mold Draft Angle Top Mold Draft Angle Bottom Foot Angle Lead Width Lead Thickness β α c B φ .004 .010 .006 .012 (F) β Dimension Limits Overall Height Molded Package Thickness Molded Package Width Overall Length Foot Length Standoff § Overall Width Number of Pins Pitch A L D E .016 .114 .114 .022 .118 .118 .002 .030 .193 .034 MIN p n Units .026 NOM INCHES 1.000.950.90.039 0.15 0.30 .008 .016 0.10 0.25 0.20 0.40 MILLIMETERS* 0.65 0.86 3.00 3.00 0.55 4.90 .044 .122 .028 .122 .038 .006 0.40 2.90 2.90 0.05 0.76 MINMAX NOM 1.18 0.70 3.10 3.10 0.15 0.97 MAX α E B n 1 φ § Significant Characteristic

 2002 Microchip Technology Inc. DS21444C-page 21 TC642

6.2 Taping Form

Component Taping Orientation for 8-Pin SOIC (Narrow) Devices Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 8-Pin SOIC (N) 12 mm 8 mm 2500 13 in Carrier Tape, Number of Components Per Reel and Reel Size Standard Reel Component Orientation for 713 Suffix Device PIN 1 User Direction of Feed P W Component Taping Orientation for 8-Pin MSOP Devices Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 8-Pin MSOP 12 mm 8 mm 2500 13 in Carrier Tape, Number of Components Per Reel and Reel Size PIN 1 User Direction of Feed Standard Reel Component Orientation for 713 Suffix Device W P

DS21444C-page 22  2002 Microchip Technology Inc. NOTES:

 2002 Microchip Technology Inc. DS21444C-page23 TC642 SYSTEMS INFORMATION AND UPGRADE HOT LINE The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products. Plus, this line provides information on how customers can receive the most current upgrade kits.The Hot Line Numbers are: 1-800-755-2345 for U.S. and most of Canada, and 1-480-792-7302 for the rest of the world. ON-LINE SUPPORT Microchip provides on-line support on the Microchip World Wide Web site. The web site is used by Microchip as a means to make files and information easily available to customers. T o view the site, the user must have access to the Internet and a web browser, such as Netscape ® or Microsoft ® Internet Explorer. Files are also available for FTP download from our FTP site. Connecting to the Microchip Internet Web Site The Microchip web site is available at the following URL: www.microchip.com The file transfer site is available by using an FTP ser- vice to connect to: ftp://ftp.microchip.com The web site and file transfer site provide a variety of services. Users may download files for the latest Development T ools, Data Sheets, Application Notes, User's Guides, Articles and Sample Programs. A vari- ety of Microchip specific business information is also available, including listings of Microchip sales offices, distributors and factory representatives. Other data available for consideration is:

• Latest Microchip Press Releases
• T echnical Support Section with Frequently Asked Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to Microchip Products
• Conferences for products, Development Systems, technical information and more
• Listing of seminars and events 092002

DS21444C-page24  2002 Microchip Technology Inc. READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod- uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? To : T echnical Publications Manager RE: Reader Response From: Name Company Address City / State / ZIP / Country Application (optional): Would you like a reply? Y N Device: Literature Number: Questions: DS21444CTC642

 2002 Microchip Technology Inc. DS21444C-page25 TC642 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. T o determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales office 2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 3. The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. PART NO. X /XX PackageTemperature Range Device Device: TC642: PWM Fan Speed Controller w/ Fault Detection Temperature Range: C = 0 °C to +70°C V= 0 °C to +85°C E= - 4 0 °C to +85°C Package: PA = Plastic DIP (300 mil Body), 8-lead * OA = Plastic SOIC, (150 mil Body), 8-lead UA = Plastic Micro Small Outline (MSOP), 8-lead ** * PDIP is only offered in the C and V temp ranges ** MSOP is only available in the V and E temp ranges Examples: a) TC642COA: PWM Fan Speed Controller w/ Fault Detection, SOIC package. b) TC642COA713: PWM Fan Speed Controller w/ Fault Detection, SOIC package, Tape and Reel. c) TC642CPA: PWM Fan Speed Controller w/ Fault Detection, PDIP package. d) TC642EUA: PWM Fan Speed Controller w/ Fault Detection, MSOP package.

DS21444C-page 26  2002 Microchip Technology Inc. NOTES:

 2002 Microchip Technology Inc. DS21444C - page 27 Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical com- ponents in life support systems is not authorized except with express written approval by Microchip. No licenses are con- veyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, K EELOQ, MPLAB, PIC, PICmicro, PICSTART and PRO MATE are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, micro ID, MXDEV, MXLAB, PICMASTER, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. dsPIC, dsPICDEM.net, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and T otal Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro ® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified.

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