TC551001BPL-85L

TC551001BPL_V02 TOSHIBA | Alldatasheet

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TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT INTEGRATED CIRCUIT 7551001 BPL /BFL/BFTL/BTRL- 70L 7C551001 BPL/BFL/ BFTL/BTRL- 85L TOSHIBA 551001 BPL/BFL/BFTL/BTRL- 10L TECHNICAL DATA SILICON GATE CMOS 131,072-WORD BY 8-BIT STATIC RAM

DESCRIPTION

The TC551001BPL/BFL/BFTL/BTRL is a 1,048,576-bit static random access memory (SRAM) organized as 131,072 words by 8 bits. Fabricated using Toshiba’s CMOS Silicon gate process technology, this device operates from a single 5 V t 10% power supply. Advanced circuit technology provides both high speed and low power at an operating current of 5 mA/MHz (typ) and a minimum cycle time of 70 ns. It is automatically placed in low-power mode at 2 A standby current (typ) when chip enable (CE1) is asserted high or (CE2) is asserted low. There are three control inputs. CE1 and CE2 are used to select the device and for data retention control, and output enable (OE) provides fast memory access. This device is well suited to various microprocessor system applications where high speed, low power and battery backup are required. The TC551001BPL/BFL/ BFTL/BTRL is available in a standard plastic 32-pin dual-in-line package (DIP), plastic 32-pin small-outline package (SOP) and normal and reverse pinout plastic 32-pin thin-small-outline package (TSOP).

FEATURES

© Low-power dissipation @ Access Times (maximum): Operating: 27.5 mW/MHz (typical) © Standby current of 4 A (maximum) at Ta = 25°C [Access Time | 70ns_| @5ns__| 1005 | # Single power supply voltage of V+ 10% [cet access Tne | Tons [Snes 1005 | ® Power down features using CEI and CE2. [CE2 Access Time | 70ns__ [| 85ns__ | 100ns__ | © Data retention supply voltage of 2 to 5.5 V LOE Access Time | 35ns_ | 45s 50ns_ | © Direct TTL compatibility for all inputs and Packages; DIP32-P-600 (BPL) (Weight: 4.45 g typ) outputs SOP32-P-525 (BFL) (Weight: 1.04 g typ) TSOP32-P-0820(BFTL) (Weight: 0.34 g typ) TSOP32-P-0820A (BTRL)(Weight: 0.34 g typ) PIN ASSIGNMENT (TOP VIEW) © 32 PIN DIP & SOP © 32 PIN TSOP ne 3210) Voo (Normal pinout) (Reverse pinout) aie 2 310) ais INT TTT A143 3010 cE2 16 1 1 16 aida 290 Rw ards 2800 a13 abe 2700 as asQ7 2600 ag Aa4s 250 ait 4309 240 OF A210 2300 aio arqi 2210 CET ao 12 2100 vos voi) 13 200 vo7 vo2Q 14 191) 06 vo3C15 180) vos 17 ad 32 17 Gnol] 16 17) voa NOOO HNN PIN NAMES [rene TT? [3 [Ts [er [e [soln al ala] sya [in Name [Ar Ao [As [Aral |ce2 [Ars |Voo| NC [Ave] Ave] Ara] Ar [Ac | As [Ac] | Pino. [17] 18] 19] 20] 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 [30] 31 | 32] [pin Name] 3 [2] As [40 |v] v02|vo3}enp[vo4]vos|vo6[vo7]vo8|ce Taro] OF} | GND [Ground © The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TC551001BPL-L—1 TOSHIBA CORPORATION for any Infringements of intelectual property or other righ of the thied partes which may result from is we ~ "No cen 's granted by implication or otherwise under ony inelectcal property or other rights of TOSHIBA CORORATION others to) 1996 - 09 - 02 @ These TOSHHA products are intended for se in general commercial applications (efice equipment, communication equipment, measuring ‘Sure ckraondnary nigh ay andr rele, and n'Squpment which may ioe Ie twrestening ofa aplston, Wes Pat TOSHIBA CORPORATION ‘ot limited to such uses a8 atoms energy contol alane of spaceship instrumentation, arate signals, medal Instrumentation, combustion Control, all types of sefety dovces, ete TOSMIBA cannot aecept and hereby dacaims laity for any damage ahlen may occu Ia cave the ‘TOSHIBA products are used in such equipment oc applications without prior consultation sith TOSHIBA

INTEGRATED CIRCUIT TC551001 BPL/BFL/BFTL/BTRL-70L

7551001 BPL/ BFL/BFTL/BTRL- 85L

TOSHIBA 7C551001 BPL /BFL/BFTL/BTRL- 10L TECHNICAL DATA BLOCK DIAGRAM CE age tid Lo Ng Von Be 2 lye {le MEMORY CELL <—o GND Alo 18.| |Be |/85 ARRAY AiZo—] <2] 851188 || 1024 x 128 x 8 Al6° PY a m_aifs or re ee cS St] <=] « DECODER mt ‘ ° HT 138 e COLUMN ADDRESS 4 byte] R R vos ° ae ra a | AOATA2 A3 AAAS AG OE o pe | ewe TE] Cio D ce CE2 o-f>0 OPERATION MODE [eed [re] on | a ee Pwie ew to a ee Standby Pox a igh z@ Tos Note: x = don'tcare. H = logichigh. L = logic low. ABSOLUTE MAXIMUM RATINGS |e | Power Disipation =| tomes Tw * = 3.0 when measured at a pulse width of 50 ns ** SOP TC551001BPL-L—2 1996 - 09-02 TOSHIBA CORPORATION

INTEGRATED CIRCUIT 7551001 BPL/ BFL/BFTL/BTRL-70L TC551001 BPL/BFL/BFTL/BTRL- 85L TOSHIBA 7C551001 BPL/BFL/BFTL/BTRL- 10L TECHNICAL DATA DC RECOMMENDED OPERATING CONDITIONS (Ta = 0° to 70°C) [soe [ mem ef oe | Data Retention Supply Voltage Pozo | = | ss | * — 3.0 Vwhen measured at a pulse width of 50 ns DC CHARACTERISTICS (Ta = 0° to 70°C, Vpp = 5V + 10%) SYMBOL PARAMETER TEST CONDITION ] wan | ave | ona | UNIT Te [rent este rent [Vee ove ve SS Output High Curent [Von = 24 [-10 | = | - | ma | [in [output tow current [vusoav | wo | = | | ma | \\ Output Leakage Current | CE! = Vit OF CE? = Vit or RW = Vis or +10 | pa ‘0 is 9 OE = Vin, Vout = OV to Vpp ce v cunWeUn jon | - | - | | lope: and RW = Vin, Teycle othe np fs] - | - |» | ws Other Inputs = V; Operating Current Other Inputs = ViVi CET = 0.2V and CE2 = Vpp - 0.2V \\ RW = Von - 0.2V, Tovel mA lppo2 lout = OmA cycle Other Inputs = Vpp - 0.2V/0.2V 1 ys CEI = Vin oF CE2 = Vi [= | - [2 | ma | lops2__| Standby Current CEI = Vpp - 0.2 V or CE2 = 0.2V| Ta = 25°C [ - | 2 [4 | (note) Vop = 2.0 to 5.5V Ta=oto7oc] - | - | 30 | a Note: In standby mode with CET 2 Vpp — 0.2 V, these limits are assured for the condition CE2 2 Vpp — 0.2 V or CE2 5 0.2V. CAPACITANCE (Ta = 25°C, f = 1 MHz) [cw | input capacitance vm=cno Tt [cour Lourput capacitance | vour= en 10 Note: This parameter is periodically sampled and is not 100% tested TC551001BPL-L—3 1996 - 09 - 02 TOSHIBA CORPORATION

INTEGRATED CIRCUIT | session ga /get/em at TOSHIBA 7551001 BPL/BFL/BFTL/BTRL- 10L TECHNICAL DATA AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = 0° to 70°C, Vpp = 5V + 10%) READ CYCLE SYMBOL PARAMETER UNIT [min Tmax | min [ max | min [ Max | [ee [redecetme SC—C—sS TP | | [tcc | Adee ace Tine | | | | [cor | Gin erate CEN Aces Tine || fs [ese [ Ship erate (C2) Aces Tine [| [fs [toe [output eatie aces times | [tor | chip erable tow to Ouputaaive | | - | | - | 0 | =| | toce | over erable tow to Ouput save fs | = [5 [| - [5 | - | [oo | Gp erable High © ouput ine? | - | | - pe fp ps | [tooo [Output Eoble High to Output Wgh?@ | - | [| - [a [| - | 35 | [ton [output data Hold time —=—SC~d | - | wo | - | o | - WRITE CYCLE syMaot PARAMETER unit [min | max | min [max | min] max | [we [wieadetm Cid Po mT [tw | write Puse wah Si | | wo] | | [tov | Gin erable to end twee dw PP [ts [Ades seuptine SSS oP [on [ Wie tecovey tine SSS pe [room | RW tow w Ovipitighz SSCs Sd PP | [tonw | RW HBA OupitACve | 3 | - | s |- | s | [ts [oat seuptine S| = os | [to [batatoutine Sir | - Pe | - fe | AC TEST CONDITIONS Output load: 100 pF + one TTL gate Input pulse level: 0.6 V, 2.4 V Timing measurements: 1.5 V Reference level: 1.5 V tr, tr: 5 ns TC551001BPL-L—4 1996 - 09 - 02 TOSHIBA CORPORATION

INTEGRATED CIRCUIT | _resstoo1 gpt/art ger. era. 7 TOSHIBA TEee1001 BPL/BEL/ BETL/BTRL. 10L TECHNICAL DATA TIMING DIAGRAMS tre . elt === WRITE CYCLE 1 (R/W CONTROLLED) (See Note 4)

INTEGRATED CIRCUIT | ressro0ygpt/art/grn./ rm. 70L TOSHIBA TEee1001 BPL/BEL/ BETL/BTRL. 10L TECHNICAL DATA WRITE CYCLE 2 (GE1 CONTROLLED) (See Note 4) Ow YW Note 5) TDN mama OI (ce Note 5) Yi WRITE CYCLE 3 (CE2 CONTROLLED) (See Note 4)

INTEGRATED CIRCUIT 7551001 BPL/BFL/BFTL/BTRL- 70L 7C551001 BPL/BFL/ BFTL/BTRL- 85L TOSHIBA 7551001 BPL/BFL/BFTL/BTRL- 10L TECHNICAL DATA Note: (1) R/W remains HIGH for the read cycle. (2) If CEI goes LOW (or CE2 goes HIGH) coincident with or after R/W goes LOW, the outputs will remain at high impedance, (3) If CEI goes HIGH (or CE2 goes LOW) coincident with or before R/W goes HIGH, the outputs will remain at high impedance. (4) If OE is HIGH during the write cycle, the outputs will remain at high impedance. (5) Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be applied. DATA RETENTION CHARACTERISTICS (Ta = 0° to 70°C) ce a los standby Caren mesov[ -~ | - [ome J, Peewv| = [= ie | Gia nom ennae tee |e | - | - | = | Pe mwmytne P| * 3 pA(max) atTa = 0° to 40°C CEI CONTROLLED DATA RETENTION MODE ‘See Note 1) Vop, Vop DATA RETENTION MODE 45y Sasa aaa ha cocc- a Vin aa a Yop = 02 i. CEI DR te ND TC551001BPL-L—7 1996 - 09 - 02 TOSHIBA CORPORATION

INTEGRATED CIRCUIT 7551001 BPL/BFL/BFTL/BTRL- 70L 7C551001 BPL/BFL/ BFTL/BTRL- 85L TOSHIBA 7551001 BPL/BFL/BFTL/BTRL- 10L TECHNICAL DATA CE2 CONTROLLED DATA RETENTION MODE (See Note 3) Yoo Vpp DATA RETENTION MODE - a ny oo ce Yor r « MW K YMA GND: — alll lO — Note: (1) In CEI controlled data retention mode, minimum standby current mode is entered when CE2 = 0.2 V or CE2 = Vpp — 0.2 V. (2) When CE1 is operating at the Vin level (2.2 V), the operation current is given by Ipps1 during the transition of Vpp from 4.5 to 2.4 V. (3) In CE2 controlled data retention mode, minimum standby current mode is entered when CE2 = 0.2V. TC551001BPL-L—8 1996 - 09 - 02 TOSHIBA CORPORATION

INTEGRATED CIRCUT | rump ensarnere 2 TOSHIBA 7C551001 BPL /BFL/BFTL/BTRL- 10L TECHNICAL DATA PACKAGE DIMENSIONS (DIP32-P-600) Units in mm bh 32 7 T poo g | . a & 1 16 —f 42.5 max 42.0+0.2 3 bay fs Fj WOOO es Shen E Fy _ 4 ay 2 1] 1.9510 14404 || 05201 pom Weight: 4.45 g (typ) TC551001BPLL—9 1996-09-02 TOSHIBA CORPORATION

INTEGRATED CIRCUIT | rexsgyan nara TOSHIBA 7C551001 BPL /BFL/BFTL/BTRL- 10L TECHNICAL DATA PACKAGE DIMENSIONS (SOP32-P-525) Units in mm 32 17 OhGOOdeanageeged HAAARHAA ARH HHHHH a | al 2 = g = el] = ‘WAAR AHAEREHEAGHEE GOUT EBEGBESE q 6 1 16 21.1MAX . 20.640.2 | a7 3 3) COA ral 8 can) il $ = — S 0.820.2 Weight: 1.04 g (typ) TC551001BPL-L—10 1996-09-02 TOSHIBA CORPORATION

INTEGRATED CIRCUIT | session ga /get/em at TOSHIBA 7C551001 BPL /BFL/BFTL/BTRL- 10L TECHNICAL DATA PACKAGE DIMENSIONS (TSOP32-P-0820) Units in mm

1 Es 32 a oy

= BS ° eS = EB & 2 FS: — ° = a E < = 16 & — te 7 2 teste ia 1,040.1 0.10.05 aS 2 — SS S if é 0.5+0.1 Weight: 0.34 g (typ) TC551001BPL-L—11 1996 - 09 - 02 TOSHIBA CORPORATION

INTEGRATED CIRCUIT | sapere sernem 7 TOSHIBA 7C551001 BPL /BFL/BFTL/BTRL- 10L TECHNICAL DATA PACKAGE DIMENSIONS (TSOP32-P-0820A) Units in mm ey Es ta] 32 cy m1 & = = i oS = Ei = als |EE = EE 2) £] |2 5 oa i NO) | ee = =——— orm) |e s E S = ve — = | teaton z 1.040.4 0.1+0.05 ay ee bd f SX e ME 0.540.1 Weight: 0.34 g (typ) TC551001BPL-L— 12* 1996-09-02 TOSHIBA CORPORATION