TC54256 | DigiCamel IC Datasheet

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TC54256AP TOSHIBA | Alldatasheet

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Technical content

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DESCRIPTION

The TC54256AP/AF is a 32,768 word*8 bit one time programmable read only memory, and molded in a 28 pin plastic package. The TC54256AP/AF's access time is 200ns and has low power standby mode which reduces the power dissipation without increasing access time. The electrical characteristics and programming method are the same as ULV. EPROM TC57256AD's. Once programmed, the TC54256AP/AF cannot be erased because of using plastic DIP without transparent window. FEATURES] + Peripheral circuit: CMOS + Inputs and outputs TTL compatible Memory sell : N-MOS + Pin compatible with ROM TC53257P, TMM23256P, + Low power dissipation EPROM TMM27256D/AD, TC57256D/AD, One time PROM Active : 30mA/6.7MHz TM124256P/AP and TC54256P Standby: 100uA + Standard 28 pin DIP plastic package: TC54256AP - + Fast access time: 200ns + Plastic Flat Package : TCS4256AF el + Single 5V power supply a + Full static operation i + High speed programming mode BLOCK DIAGRAM] PIN CONNECTION] (TOP VIEW) "gr op Veo 9902 ons 4 05 O6 a veri 22b Vee ono alzq2 aPaie ea OUTPUT BUFFERS a7gs 26Dals nee sae 490 7 asgs 2sBas As 6} coum COLUMN 1/0 AG 23pall ASO DECODER CIRCUIT a3 Q7 2200E A4e azds aipa1o ye $ s q p a ade 20pce AT og ROW MEMORY CELL A010 ispov nao] F ARRAY oo Gir aspos oo & DECODER, 32,768xBbite

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oz das asfoa alae < onp ie 1sfio3 nie PIN_NAMES| MODE SELECTION aad FA ee 00007 lOutputs (inputs) (20) (2) |(28) }1+13,15 +19) | tf [Chip Enable Input Read Te ra Output Deselect | * | H |5V High Impedance [ OE [Output Enable Input Pesaran Sppiy Standby [a [+ | High Impedance | Standby| | ver [Package PY |[Progran [| | | vc | Voc Supply Voltage | [Program Inhibit [a | x | 6v [High Impedance | Active (+5V) Program Verify | * | 1 | pata our | [cw [eround J a orb

[smc [ede a [Power dissipation |S ee a READ OPERATION D.C. RECOMMENDED OPERATING CONDITIONS [seen [were | | | es [oe | [wir [Rene Beh voresge id 2) | eo a [ec [ee over Supty Woiceee | 49s [00 sas] * [ee [ee Power Supiy Voteane __|iee-0.é | veo_| Voor 0.€. and OPERATING CHARACTERISTICS (Tas-40~ 85°C, VCC=5V+5%) [seo | ramweren [est eowrvion | wen [ ns [woe [ wa | [ur [Favor corset (novice = “| = [si | oa | a Fesrrmsesones fee Ete * | Le ed ae ee [Yor [ovepoe tv Woieage _[igurzae | - | - pow |v | [eer [Pre cureene—————[erveneo-ev [= | = pao | om | [uo [ovenot teatane Corzent | Yoyir0-c¥aveg | = | = [a0 [oa | Be2

a A.C. CHARACTERISTICS (Ta=-40~ 85°C, Vec=5V5%, Vpp=Vcct0.6V) ‘Address Access Time CE-OE-Vq1, [ - | 200 | Output Data in Hold Time} CE=OE=Vvyy, [fo [ - | A.C. TEST CONDITIONS + Output Load : 1 TTL Gate and C,=100pF + Input Pulse Rise and Fall Times : 10ns Max. + Input Pulse Levels : 0.45V~2.4V + Timing Measurement Reference Level : Inputs 0.8V and 2.2V, Outputs 0.8V and 2.0V ee CAPACITANCE * (Ta=25°C, f=1MRz) * This parameter is periodically sampled and is not 100% tested. TIMING WAVEFORMS (READ) AO~AIe tout toE or | DF. tog cE ace =DFa B-3

TIMING WAVEFORMS (PROGRAM) (Wocs6V40.25V, Vpp=12.5V40.5V) Zas XPH, TAH. a ST Ueeeeeneeenesey RY xy cE a cor V) coat, OOOO scr | TOES, c a| —— ~ ee SS é Vop tes | | Note 1. Vc must be applied simultaneously or before Vpp and cut off simultaneously or after Vpp. 2. Removing the device from socket and setting the device in socket with Vpp=12.5V may cause permanent damage to the device. 3. The Vpp supply voltage is permitted up to 14V for program operation. So the voltage over 14V should not be applied to the Vpp terminal. When the switching pulse voltage is applied to the Vpp terminal, the overshoot voltage of its pulse should not be exceeded 14V. B-5

(OPERATION INFORMATION] The TC54256AP/AF's six operation modes are listed in the following table. Mode selection can be achieved by applying TIL level signal to all inputs. PIN NAMES (NUMBER) | CE | OF | VPP | Ycc 0007 ead Operation ctive (Ta=-40~ 85°C) Output Deselect [ * | 2 | sv High Impedance Standby je | * | High Impedance | Standby [Praran | | Perate (Ta=2525°C) Program Inhibit | 8 | # |a2.sv High Impedance | Active Note: #3 Vyq, Ls Vyp, *3 Vyzq or Vay JREAD_MODE) The 1C54256AP/AF has two control functions, The chip enable (CE) controls the operation power and should be used for device selection. The output enable (OE) controls the output buffers, independent of device selection. Assuming that CE=0E=Vy,, the output data is valid at the outputs after address access time from stabilizing of all addresses. The CE to output valid (tog) is equal to the address access time (tacc). Assuming that CE=Vz; and all addresses are valid, the output data is valid at the outputs after tog from the falling edge of OE. OUTPUT DESELECT MODE) Assiming that CE*Vyzq or OE=Vzp, the outputs will be in a high impedance state. So two or more TC54256AP/AF's can be connected together on a common bus line. When CE is decoded for device selection, all deselected devices are in low power standby mode. (STANDBY MODE} The TC54256AP/AF has a low power standby mode controlled by the CE signal. By applying a high level to the CE input, the TC54256AP/AF is placed in the standby mode which reduce the operating current to 100vA by applying MOS-high level (Vcc) and then the outputs are in a high impedance state, independent of the OE inputs. BS

Initially, when received by customers, all bits of the TC54256AP/AF are in the "1" state which is erased state. Therefore the program operation is to introduce "Q's" data into the desired bit locations by electrically programming. The TC54256AP/AF is in the programming mode when the Vpp input is at 12.5V and CE is at TTL-Low level under OE=Vry- The TC54256AP/AF can be programmed any location at anytime either individually, sequentially, or at random. PROGRAM VERIFY MODE The verify mode is to check that desired data is correctly programmed on the programmed bits. The verify is accomplished with DE at Vz, and CE at Vyy or VqzL- PROGRAM INHIBIT MODE Under the condition that the program voltage (+12.5V) is applied to Vpp terminal, a TTL high level CE input inhibits the TC54256AP/AF from being programmed. Programming of two or more TC5S4256AP/AF's in parallel with different data is easily accomplished. That is, all inputs except for CE and OE may be commonly connected, and a TTL Low-level program pulse is applied to the CE of the desired device only and TTL high level signal is applied to the other devices. HIGH SPEED PROGRAMMING MODE The program time can be greatly decreased by using this high speed programming mode. The device is set up in the high speed programming mode when the programming voltage (+12.5V) is applied to the Vpp terminal with Vcc=6V. The programming is achieved by applying a single TTL low level Ims pulse to the CE input after addresses and data are stable. Then the programmed data is verified by using Program Verify Mode. If the programmed data is not correct, another program pulse of ims is applied and then the programmed data is verified. This should be repeated until the program operates correctly (max. 25 times). After correctly programming the selected address, the additional program pulse with width of 3 times more than that needed for initial programming is applied. When programming has been completed, the data in all addresses should be verified with Voc=Vpp=5V. B-7

HIGH SPEED PROGRAM MODE FLOW CHART Os oe ADDRESS = OVERPROOGRAM 3X PULSES OF imsec NEXT ADDRESS OR ONE PULSE OF 3X msec DURATION DDRESS > XES Yoo = 5.0¥ READ NG OK BS

Electric signature mode allows to read out a code from TC54256AP/AF which identifies its manufacturer and device type. The programming equipment may read out manufacturer code and device code from 1C54256AP/AF by using this mode before program operation and automatically set program voltage (Vpp) and algorithm. Electric Signature mode is set up when 12V is applied to address line A9 and the rest of address lines is set to Vyz in read operation. Data output in this condition is manufacturer code. Device code is identified when address AO is set to Vzy. These two codes possess an odd parity with the parity bit of MSB (07). The following table shows electric signature of TC54256AP/AF. oa | a0 | 07 | 0 [os | 04 | 03 | 02 | om | 00 Se Psotacesre cow [2 [0 fo [2 [a | of o[e |x| foeaseeoe few fo belo fete fele la Notes: A9=12V+0.5V ALVAB, AlO~A14, CE, OE=Vzy, | B9

Unit: mm Nw 28 15 ale Apooenannoooe ss 4 re » +H | z a 37.0802 3% 0.25285 —fiue- aaa ES CE TY “14 bd * 1.g9TvP. 1at0s|| o5t01 (@] 20.25 @) Note: Package width and length do not include mold protrusion, allowable mold protrusion is 0.15mm. B-+10

‘Unit : mm 28 15 OANO AGOGO O Oe 5 HHHHHHHHAHHHEHA mono n Ai A o ape - co} 3 = ) 2] = E 2 OHH OOOH L HHH HHHHAHAH AHHH ~ : HUBROOOOCUOU do ne o % 0.15 283 3-8 is Thee, stiw ¢ yon | 1.0402 fe] 0.1 ] 0.1 Pos Note: Package width and length do not include mold protrusion, allowable mold protrusion is 0.15mm, B-11

Product Information

TC54256 specifications and overview.

Summary

32,768 WORD x 8 BIT CMOS ONE TIME PROGRAMMABLE READ ONLY MEMORY

Description

32,768 WORD x 8 BIT CMOS ONE TIME PROGRAMMABLE READ ONLY MEMORY

Source title TC54256 Datasheet(PDF) - Toshiba Semiconductor

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