TC5064BP TOSHIBA | Alldatasheet

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== TC5064BP TC5065BP C*MOS DIGITAL INTEGRATED CIRCUIT —— i] SILICON MONOLITHIC OO TC5064BP HEX HIGH VOLTAGE BUFFER WITH INHIBIT/NON INVERTING TYPE TC50658P__HEX HIGH VOLTAGE BUFFER WITH INHIBIT/INVERTING TYPE TCS064BP and TC5065BP contain six circuits of buffers having two common INHIBIT inputs (Ary, BIN). [As both have the output of open drain structure with high bleakdown voltage P-channel MOS FET (-50 volts.. ... Maximum Rating), these are suitable for driving fluorescent display tubes and for interfacing with high voltage MOS LSI's. 16 TC5064BP is non-inverting type and TC5065BP is 1 inverting type. DIP 16(SD16A-") ABSOLUTE MAXIMUM RATINGS DC Supply Voltage Vpp__| Vss-0.5~Vsst20 | V Input Voltage Vin | Vss-0.5 ~Vpp+0.5 v_ | PIN ASSIGNMENT Output Voltage Vout_| Ypp-50 ~Vpp+0.5 v_ OUT, OUTg OUTs OUT, OUTS OUTs| Vpp i 16 Storage Temperature Tote -65 ~150 °C Vgs i 8 Range es ne . Athi) Lead Temp. /Time Tsol 260°C + 10sec Bie 2p os) gf sa) al IN, INg INg INg INg IN LOGIC DIAGRAM yas ise ais ae Tesv64BP Yop — ‘TeS06SBP — DUT] O0Tg ITs TOT, DIT, OF ArN SIN is] 14) 13] 12] LW} Vpp i 16 Vssi8 | Arnis) Bini e 2 3 4 5 6 7 IN, INg INg INg Ip INg iy § the Jims J 1Ng Jans J 1, OUT, OUTy OUTs OUT, OUTS OUTS

36 TCSO6SBP vos TRUTH TABLE

Cepe pe] e| [pepe fe [we Te | [epee poe |e Ty b1W2 J INs § Ng § Ny 4 ING HZ; High Impedance OUT] OUTy TUTy OUT, OUT, OUTS #5 Dont care 540

TC5064BP, TCS065BP ———— RECOMMENDED OPRATING CONDITIONS (VSS=0v) Supply voltage | woo [Ts Pe a ELECTRICAL CHARACTERISTICS _(VsS=0v) CHARACTERISTIC | SYMBO TEST Wop =A" [ase ase comrrions [5 wan wl an ve war | High Level "tour '< aaa | > | 4-93) — | 495] 5.00 7.935] = 1 Output Voltage | YOR | years oe yas |10 | 9.95] - | 9.95|10-00] 9.95) - ov High Levle Vou=2V (Vpp-3v)} 5 |-9| - | - 8| -13 -6 Output Current Vou=7V (Vpp-3v)|10 | -12 | - | -10] -25 -8 our’ , roy eve a 7 Vit \\Vour=1-0v,9.0v}10 | - | 3.0 4.5 | 3.0 output OFF Tyee Wout = OV is[- | -3 -0.01| -3 =10 | a Current OFF Wvour = vpp-45v [15 | - | -10 -1__|-10 -20 = = =5 Input Current Tin Vin = 18V 18 [0.3 10-5] 0.3 1.0 | a Quiescent \\Yin-Vss, Vpp, { Ipp 10 | - | 8.0 0.010] 8.0 60 | nA Supply Current OUTPUTS OPEN 5 16.0 0.015| 16.0 120 * RL = 20 ka SWITCHING CHARACTERISTICS (Ta=25°C, Vss=0v, CL=50pF) 5 | - | 100 | 200 Output Rise Time tru | RL = 20 ka 10 - 50 | 100 | ns is 15 - | 4 | 80 | a | re) Output Fall Time tr | RL = 20 ka 10 - | 5.0 | 8.0 | us 15 - | 5.0 | 8.0 5 =| 200-]~s00 Coe belay TH tplH | Ry = 20 ka 10 | - | 100 | 250 | as Pagarzon Delay Tine 15 - 80 | 200 (HIGH-LOW) | 5 = z.0 | 4.0 Propagation Delay Time | tpHL | R, = 20 ka 10 - | 2.0 | 4.0 | ps ne PP Input Capacity CIN 5 7.5 | eF | 541

TC5064BP, TCSO65BP SWITCHING TIME TEST CIRCUIT AND WAVEFORM 20ns -20ng OE oor INPUT 50z \\s0% ? 7” 10% 0% CTL tT P.G on Yop 4 Lo our ourpur 30% 90% IN (our) (1C5064BP) Hf 30% 50% Vss RL cL ‘pLt tpHL ] i SOLA OUTPUT 90 | te (TC5065BP) hoz po tpHL = tpL 542

TC5064BP, TCSO65BP EXAMPLES OF APPLICABLE CIRCUITS. (1) Fluorescent Display Tube Driving Circuit Vpp=5V

9 Filament Power Supply 405V

B -o-- tee —_ee g —_ —, — fz ‘ily L! se Li LI LI (0S| “cud t| PMOS! or Do DL Da 0S) ist 4 _ a Fluorescent € Display Tube, E a

2 RS SRL: 20 ka ~ 100 kn

-EV (2) Interface between CMOS and PMOS Yop | VpD 7 cMos Vsg v i RL=20 k2~ 30k2 Vss1 Vss2 543