TC2320

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Document overview

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• PDF pages: 12

Technical content

Features

• Low Threshold
• Low On-resistance
• Low Input Capacitance
• Fast Switching Speeds
• Free from Secondary Breakdown
• Low Input and Output Leakage
• Independent, Electrically Isolated N-channel and P-chann el

Applications

• Medical Ultrasound Transmitters
• High-voltage Pulsers
• Amplifiers
• B u f f e r s
• Piezoelectric Transducer Drivers
• General Purpose Line Drivers
• Logic-level Interface General Description The TC2320 consists of a high-voltage, low-threshold N-chan nel and P-channel MOSFET in an 8-Lead SOIC package. This Enhancement -mode (normally-off) transistor uses an advanced vertical DMOS structure and a well-proven silicon gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Microchip’s vertical DMOS FETs are ideally suited to a wid e range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance and fast switching speeds are desired.Package Type 8-lead SOIC See Table 2-1 for pin information. (Top view) DP DP DN DN GP SP GN SN N-Channel and P-Channel Enhancement-Mode Dual MOSFET

DS20005708A-page 2  2017 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings† † Notic e: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. N-CHANNEL DC AND AC ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise noted, TA = TJ = +25°C. Parameter Sym. Min. Typ. Max. Unit Conditions DC PARAMETER (Note 1) Drain-to-source Breakdown Voltage BVDSS 200 — — V VGS = 0V, ID = 100 µA Gate Threshold Voltage VGS(th) 0.6 — 2 V VGS = VDS, ID = 1 mA Change in VGS(th) with Temperature ∆VGS(th) — — –4.5 mV/°C VGS = VDS, ID = 1 mA (Note 2) Gate Body Leakage Current IGSS — — 100 nA VGS = ±20V, VDS = 0V Zero-gate Voltage Drain Current IDSS — — 1 µA VGS = 0V, VDS = 100V — — 10 µA VGS = 0V, VDS = Maximum rating — — 1 mA VGS = 0V, TA = 125°C, VDS = 0.8 Maximum rating (Note 2) On-state Drain Current ID(ON) 0.6 — — A VGS = 4.5V, VDS = 25V 1.2 — — VGS = 10V, VDS = 25V Static Drain-to-Source On-state  Resistance RDS(ON) — — 8 Ω VGS = 4.5V, ID = 150 mA — — 7 VGS = 10V, ID = 1A Change in RDS(ON) with Temperature ∆RDS(ON) — — 1 %/°C VGS = 4.5V, ID = 150 mA (Note 2) AC PARAMETER (Note 2) Forward Transconductance GFS 150 — — mmho VDS = 25V, ID = 200 mA Input Capacitance CISS — — 110 pF VGS = 0V, VDS = 25V, f = 1 MHz Common Source Output Capacitance COSS — — 60 Reverse Transfer Capacitance CRSS — — 23 Turn-on Delay Time td(ON) — — 20 ns VDD = 25V, ID = 150 mA, RGEN = 25Ω Rise Time tr — — 15 Turn-off Delay Time td(OFF) — — 25 Fall Time tf — — 25 DIODE PARAMETER Diode Forward Voltage Drop VSD — — 1.8 V VGS = 0V, ISD = 200 mA (Note 1) Reverse Recovery Time trr — 300 — ns VGS = 0V, ISD = 200 mA (Note 2) Note 1: Unl ess otherwise stated, all DC parameters are 100% tested at +25°C. Pulse test: 300 µs pulse, 2% duty cycle. 2: S pecification is obtained by characterization and is not 100% tested.

P-CHANNEL DC AND AC ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise noted, TA = TJ = +25°C. Parameter Sym. Min. Typ. Max. Unit Conditions DC PARAMETER (Note 1) Drain-to-source Breakdown Voltage BVDSS –200 — — V VGS = 0V, ID = –2 mA Gate Threshold Voltage VGS(th) –1 — –2.4 V VGS = VDS, ID = –1 mA Change in VGS(th) with Temperature ∆VGS(th) — — 4.5 mV/°C VGS = VDS, ID = –1 mA (Note 2) Gate Body Leakage IGSS — — –100 nA VGS = ±20V, VDS = 0V Zero-gate Voltage Drain Current IDSS — — –10 µA VGS = 0V, VDS = Maximum rating — — –1 mA VGS = 0V, TA = 125°C,  VDS = 0.8 Maximum rating (Note 2) On-state Drain Current ID(ON) Static Drain-to-Source On-state Resist ance RDS(ON) — 10 15 Ω VGS = –4.5V, ID = –100 mA — 8 12 VGS = –10V, ID = –200 mA Change in RDS(ON) with Temperature ∆RDS(ON) — — 1.7 %/°C VGS = –10V, ID = –200 mA (Note 2) AC PARAMETER (Note 2) Forward Transconductance GFS 100 250 — mmho VDS = –25V, ID = –200 mA Input Capacitance CISS — 75 125 pF VGS = 0V,  VDS = –25V,  f = 1 MHz Common Source Output Capacitance COSS — 20 85 Reverse Transfer Capacitance CRSS — 10 35 Turn-on Delay Time td(ON) — — 10 ns VDD = –25V, ID = –0.75A, RGEN = 25Ω Rise Time tr — — 15 Turn-on Delay Time td(OFF) — — 20 Fall Time tf — — 15 DIODE PARAMETER Diode Forward Voltage Drop VSD — — –1.8 V VGS = 0V, ISD = –0.5A (Note 1) Reverse Recovery Time trr — 300 — ns VGS = 0V, ISD = –0.5A (Note 2) Note 1: Unl ess otherwise stated, all DC parameters are 100% tested at +25°C. Pulse test: 300 µs pulse, 2% duty cycle. 2: S pecification is obtained by characterization and is not 100% tested. TEMPERATURE SPECIFICATIONS Parameter Sym. Min. Typ. Max. Unit Conditions TEMPERATURE RANGE Operating Ambient Temperature T A –55 — +150 °C Storage Temperature TS –55 — +150 °C PACKAGE THERMAL RESISTANCE 8-lead SOIC  JA — 101 — °C/W Note 1  2017 Microchip Technology Inc. DS20005708A-page 3 TC2320 Note 1: 1 oz., four-layer, 3” x 4” PCB

DS20005708A-page 4  2017 Microchip Technology Inc.

2.0 PIN DESCRIPTION

Table 2-1 shows the description of pins in TC2320. Refer to Package Type for the location of pins. TABLE 2-1: PIN FUNCTION TABLE Pin Number Pin Name Description

1 SN Source N-channel

2 GN Gate N-channel

3 SP Source P-channel

4 GP Gate P-channel

5 DP Drain P-channel

6 DP Drain P-channel

7 DN Drain N-channel

8 DN Drain N-channel

 2017 Microchip Technology Inc. DS20005708A-page 5 TC2320

3.0 FUNCTIONAL DESCRIPTION

Figure 3-1 and Figure 3-2 illustrate the switching waveforms and test circuits for TC2320. VDD RL OUTPUT D.U.T. 10V INPUT VDD OUTPUT 10% 90% 90% 10% 90% 10% RGEN Input Pulse Generator tr tftd(ON) t(ON) td(OFF) t(OFF) FIGURE 3-1: N-channel Switching Waveforms and Test Circuit. VDD RL OUTPUT D.U.T. RGEN Input Pulse Generator INPUT -10V OUTPUT VDD tr tftd(ON) t(ON) 90% 10% 90% 10% 10% 90% td(OFF) t(OFF) FIGURE 3-2: P-channel Switching Waveforms and Test Circuit. TABLE 3-1: PRODUCT SUMMARY BVDSS/BVDGS (V) RDS(ON) (Maximum) (Ω) N-Channel P-Channel N-Channel P-Channel 200 –200 7 12

DS20005708A-page 6  2017 Microchip Technology Inc.

4.0 PACKAGING INFORMATION

4.1 Package Marking Information

Legend: XX...X Product Code or Customer-specific information  Y Year code (last digit of calendar year)  YY Year code (last 2 digits of calendar year)  WW Week code (week of January 1 is week ‘01’)  NNN Alphanumeric traceability code  Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part numbe r cannot be marked on one line, it will be carried over to the next line, t hus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. 8-lead SOIC Example NNN XXXXXXXX YYWWe3 896 TC2320TG 1737e3

Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.  2017 Microchip Technology Inc. DS20005708A-page 7 TC2320

DS20005708A-page 8  2017 Microchip Technology Inc. NOTES:

 2017 Microchip Technology Inc. DS20005708A-page 9 TC2320 APPENDIX A: REVISION HISTORY Revision A (June 2017)

• Converted Supertex Doc# DSFP- TC2320 to Microchip DS20005708A
• Changed packaging format
• Changed the packaging quantity of the 8-lead SOIC TG package from 2000/Reel to 3300/Reel
• Made minor text changes throughout the document

DS20005708A-page 10  2017 Microchip Technology Inc. PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Example: a) TC2320TG-G: N-Channel and P-Channel Enhancement-Mode Dual MOSFET,  8-lead SOIC, 3300/Reel PART NO. Device Device: TC2320 = N-Channel and P-Channel Enhancement-Mode Dual MOSFET Package: TG = 8-lead SOIC Environmental: G = Lead (Pb)-free/RoHS-compliant Package Media Type: (blank) = 3300/Reel for a TG Package XX Package - X - X Environmental Media Type Options

 2017 Microchip Technology Inc. DS20005708A-page 11 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application me ets with your specifications. MICROCHIP MAKES NO RE PRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY , PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting fr om such use. No licenses are conveyed, implicitly or ot herwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP , Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2017, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-1876-4 Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification cont ained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal meth ods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC ® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 ==

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