TBU-CA085-100-WH-Q

TBU-CA-Q BOURNS | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 7

Technical content

Features

n Superior circuit protection n Overcurrent and overvoltage protection n Blocks surges up to rated limits n High-speed performance n Small SMT package n Agency listing: n RoHS* and AEC-Q101 compliant**

Applications

n Protection modules and dongles n Process control equipment n Test and measurement equipment n General electronics General Information The TBU-CA-Q Series of Bourns® TBU® products are low capacitance single bidirectional high-speed protection components, constructed using MOSFET semiconductor technology, and designed to protect against faults caused by short circuits, AC power cross, induction and lightning surges. The TBU® high-speed protector placed in the system circuit will monitor the current with the MOSFET detection circuit triggering to provide an effective barrier behind which sensitive electronics will not be exposed to large voltages or currents during surge events up to the device’s specified maximum limits. The TBU ® device is provided in a halogen free***, surface mount DFN package and meets industry standard requirements such as RoHS and Pb Free solder reflow profiles. TBU® Device Line In/ Line Out Line Out/ Line In Additional Information Click these links for more information: PRODUCT SELECTOR TECHNICAL LIBRARY INVENTORY SAMPLES CONTACT Agency Listing

Description

UL File Number: E315805 * RoHS Directive 2015/863, Mar 31, 2015 and Annex. “Q” part number suffix for automotive and other applications requiring appropriate AEC-Q101 compliance. * Bourns considers a product to be “halogen free” if (a) the Bromine (Br) content is 900 ppm or less; (b) the Chlorine (Cl) content is 900 ppm or less; and (c) the total Bromine (Br) and Chlorine (Cl) content is 1500 ppm or less. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. WARNING Cancer and Reproductive Harm - www.P65Warnings.ca.gov Absolute Maximum Ratings (@ TA = 25 °C Unless Otherwise Noted) Symbol Parameter Part Number Value Unit Vimp Peak impulse voltage withstand with duration less than 10 ms TBU-CA025-xxx-WH-Q TBU-CA065-xxx-WH-Q TBU-CA085-xxx-WH-Q 250 650 850 V V rms Continuous A.C. RMS voltage TBU-CA025-xxx-WH-Q TBU-CA065-xxx-WH-Q TBU-CA085-xxx-WH-Q 100 300 425 V T op Operating temperature range -55 to +125 °C Tstg Storage temperature range -65 to +150 °C Tjmax Maximum junction temperature +125 °C ESD HBM ESD protection per IEC 61000-4-2 ±2 kV Environmental Characteristics Parameter Value Moisture Sensitivity Level 1 ESD Classification (HBM) 1A

TBU-CA-Q Series - TBU® High-Speed Protectors Electrical Characteristics (@ TA = 25 °C Unless Otherwise Noted) Symbol Parameter Part Number Min. Typ. Max. Unit Itrigger Current required for the device to go from operating state to protected state TBU-CAxxx-050-WH-Q TBU-CAxxx-100-WH-Q TBU-CAxxx-300-WH-Q TBU-CAxxx-500-WH-Q 100 300 500 150 450 750 100 200 600 1000 mA Rdevice Series resistance of the TBU® device Vimp = 250 V Itrigger (min.) = 50 mA Vimp = 650 V Itrigger (min.) = 50 mA Vimp = 650 V Itrigger (min.) = 100 mA Vimp = 650 V Itrigger (min.) = 300 mA Vimp = 850 V Itrigger (min.) = 100 mA Vimp = 850 V Itrigger (min.) = 500 mA TBU-CA025-050-WH-Q TBU-CA065-050-WH-Q TBU-CA065-100-WH-Q TBU-CA065-300-WH-Q TBU-CA085-100-WH-Q TBU-CA085-500-WH-Q 13.3 17.7 11.5 7.6 15.2 10.7 15.3 20.3 13.2 8.8 17.4 12.2 Ω tblock Time for the device to go from normal operating state to protected state 1 µs IQ Current through the triggered TBU® device with 50 Vdc circuit voltage 0.25 0.50 1.00 mA Vreset Voltage below which the triggered TBU® device will transition to normal operating state 12 16 20 V Rth(j-l) Junction to package pads - FR4 using recommended pad layout 129 °C/W Rth(j-l) Junction to package pads - FR4 using heat sink on board (6 cm2) (1 in2) 40 °C/W Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. Reference Application The TBU® devices are general use protectors used in a wide variety of applications. The maximum voltage rating of the TBU® device should never be exceeded. Where necessary, an OVP should be employed to limit the maximum voltage. A cost- effective protection solution combines Bourns® TBU® protection devices with a pair of Bourns® MOVs. For bandwidth sensitive applications, a Bourns® GDT may be substituted for the MOV. Equip. OVP OVP Line Line TBU® Device TBU® Device Line In / Line Out Line Out / Line In Line Out / Line In Line In / Line Out Basic TBU Operation The TBU® device, constructed using MOSFET semiconductor technology, placed in the system circuit will monitor the current with the MOSFET detection circuit triggering to provide an effective barrier behind which sensitive electronics are not exposed to large voltages or currents during surge events up to the device’s specified maximum limits. The TBU® device operates in approximately 1 μs - once line current exceeds the TBU® device’s trigger current Itrigger. When operated, the TBU® device will limit the current to less than the Itrigger value within the tblock duration. If voltage above Vreset is continuously sustained, the TBU® device will subsequently reduce the current to a quiescent current level within a period of time that is dependent upon the applied voltage. After the surge, the TBU® device resets when the voltage across the TBU® device falls to the Vreset level. The TBU® device will automatically reset on lines which have no DC bias or have DC bias below Vreset (such as unpowered signal lines). If the line has a normal DC bias above Vreset, the voltage across the TBU® device may not fall below Vreset after the surge. In such cases, special care needs to be taken to ensure that the TBU® device will reset, with software monitoring as one method used to accomplish this. Bourns application engineers can provide further assistance.

TBU-CA-Q Series - TBU® High-Speed Protectors Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. Performance Graphs Typical V-I Characteristics CURRENT (100 mA/div) VOLTAGE (5 V/div) ITRIP VRESET Typical Trigger Current vs. Temperature 2.0 1.6 1.8 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 -35 -15 52 54 56 5 85 105 125 Junction Temperature (°C) Normalized Trigger Current 2.0 1.6 1.8 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 -35 -15 52 54 56 5 85 105 125 Junction Temperature (°C) Normalized Resistance Junction Temperature (°C) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 40 60 80 100 120 140 Total Max. Power (W) with JESD51-3 with JESD51-7 Power Derating Curve 2.0 1.6 1.8 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 -35 -15 52 54 56 5 85 105 125 Junction Temperature (°C) Normalized Trigger Current 2.0 1.6 1.8 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 -35 -15 52 54 56 5 85 105 125 Junction Temperature (°C) Normalized Resistance Junction Temperature (°C) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 40 60 80 100 120 140 Total Max. Power (W) with JESD51-3 with JESD51-7 Typical Resistance vs. Temperature 2.0 1.6 1.8 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 -35 -15 52 54 56 5 85 105 125 Junction Temperature (°C) Normalized Trigger Current 2.0 1.6 1.8 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 -35 -15 52 54 56 5 85 105 125 Junction Temperature (°C) Normalized Resistance Junction Temperature (°C) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 40 60 80 100 120 140 Total Max. Power (W) with JESD51-3 with JESD51-7

TBU-CA-Q Series - TBU® High-Speed Protectors Product Dimensions Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. PIN 1 & BACKSIDE CHAMFER 4.00 ± 0.10 (.157 ± .004) 0.00 - 0.05 (.000 - .002) 6.50 ± 0.10 (.256 ± .004) 0.30 (.012) 3.40 (.134) 0.30 (.012) 1.85 (.073) 0.70 (.028) 0.70 (.028) 0.80 (.031)1.85 (.073) C PIN 10.25 (.010) 3.55 (.140) 0.70 (.028) 0.80 (.031) 1.85 (.073) 1.85 (.073) 3.55 (.140) 3 2 1 A = A1 =SEATING PLANE 0.80 - 1.00 (.031 - .039) XXXXX YWWLL DIMENSIONS: MM (INCHES) Pad # Pin Out

1 Line In/Out

3 Line Out/In

TBU® High-Speed Protectors have a 100 % matte-tin termination finish. For improved thermal dissipation, the recommended layout uses PCB copper areas which extend beyond the exposed solder pad. The exposed solder pads should be defined by a solder mask which matches the pad layout of the TBU® device in size and spacing. For best performance, Bourns recommends that solder pads be the same dimension as the TBU® pads, but if smaller solder pads are used, they should be centered on the TBU® package terminal pads and not be more than 0.10-0.12 mm (0.004-0.005 in.) smaller in overall width or length. Solder pad areas should not be larger than the TBU® pad sizes to ensure adequate clearance is maintained. The recommended stencil thickness 0.025 mm (0.0010 in.) less than the solder pad size. Extended copper areas beyond the solder pad significantly improve the junction to ambient thermal resistance, resulting in operation at lower junction temperatures with a corresponding benefit of reliability. All pads should be soldered to the PCB, including pads marked as NC or NU but no electrical connection should be made to these pads. For minimum parasitic capacitance, Bourns recommends that ground or power signals not be routed beneath any pad. PIN 1 & BACKSIDE CHAMFER 4.00 ± 0.10 (.157 ± .004) 0.00 - 0.05 (.000 - .002) 6.50 ± 0.10 (.256 ± .004) 0.30 (.012) 3.40 (.134) 0.30 (.012) 1.85 (.073) 0.70 (.028) 0.70 (.028) 0.80 (.031)1.85 (.073) C PIN 10.25 (.010) 3.55 (.140) 0.70 (.028) 0.80 (.031) 1.85 (.073) 1.85 (.073) 3.55 (.140) 3 2 1 A = A1 =SEATING PLANE 0.80 - 1.00 (.031 - .039) XXXXX YWWLL Dark grey areas show added PCB copper area for better thermal resistance.

TBU-CA-Q Series - TBU® High-Speed Protectors Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. Reflow Profile Profile Feature Pb-Free Assembly Average Ramp-Up Rate (Tsmax to Tp) 3 °C/sec. max. Preheat - Temperature Min. (Tsmin) - Temperature Max. (Tsmax) - Time (tsmin to tsmax) 150 °C 200 °C 60-180 sec. Time maintained above: - Temperature (TL) - Time (tL) 217 °C 60-150 sec. Peak/Classification Temperature (Tp) 260 °C Time within 5 °C of Actual Peak Temp. (tp) 20-40 sec. Ramp-Down Rate 6 °C/sec. max. Time 25 °C to Peak Temperature 8 min. max. 32 1 3.55 (.140) 0.70 (.028) 1.15 (.045) 2.625 (.103) PIN 1 TOP VIEW SIDE VIEW BOTTOM VIEW C A1 SEATING PLANE B DA H H K K F D J J E XXXXX YWWLL How to Order TBU - CA xxx - yyy - WH - Q TBU® Product Series CA = Bi-Series Impulse Voltage Rating 025 = 250 V 065 = 650 V 085 = 850 V Trigger Current 050 = 50 mA 100 = 100 mA 300 = 300 mA 500 = 500 mA Hold to Trip Ratio Suffix W = Hold to Trip Ratio = 2 Package Suffix H = DFN Package AEC-Q101 Suffix Q = AEC-Q101 Compliant Typical Part Marking PIN 1 MANUFACTURER’S TRADEMARK

5 DIGIT PRODUCT CODE:

• 1ST ALPHA CHARACTER INDICATES PRODUCT FAMILY: A = TBU-CA SERIES
• 2ND & 3RD DIGITS INDICATE IMPULSE VOLTAGE.
• 4TH & 5TH DIGITS INDICATE TRIGGER CURRENT. UNDERSCORE DENOTES AEC-Q101 COMPLIANCY. MANUFACTURING DATE CODE:
• 1ST DIGIT INDICATES THE YEAR.
• 2ND & 3RD DIGITS INDICATE THE WEEK NUMBER.
• 4TH & 5TH DIGITS INDICATE LOT CODE. XXXXX YWWLL

TBU-CA-Q Series - TBU® High-Speed Protectors Packaging Specifications B A D N G (MEASURED AT HUB) USER DIRECTION OF FEED The type of corner on carrier will vary at different assembly sites. C XXXXX YWWLL t D P2 P E W F R EMBOSSMENT QUANTITY: 3000 PIECES PER REEL A B C D G N 326 (12.835) 330 (13.002) 1.5 (.059) 2.5 (.098) 12.8 (.504) 13.5 (.531) 20.2 (.795) — 16.5 (.650) 102 (4.016) A0 B0 D D1 E F 4.3 (.169) 4.5 (.177) 6.7 (.264) 6.9 (.272) 1.5 (.059) 1.6 (.063) 1.5 (.059) — 1.65 (.065) 1.85 (.073) 7.4 (.291) 7.6 (.299) K0 P P0 P2 R t 1.0 (.039) 1.2 (.047) 7.9 (.311) 8.1 (.319) 3.9 (.159) 4.1 (.161) 1.9 (.075) 2.1 (.083) (0) 0.5 (.020) 0.25 (.010) 0.35 (.014) W Min. Max. 15.7 (.618) 16.3 (.642) DIMENSIONS: MM (INCHES) “TBU” is a registered trademark of Bourns, Inc. in the United States and other countries. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. REV. 03/23 Asia-Pacific: Tel: +886-2 2562-4117 • Email: asiacus@bourns.com EMEA: Tel: +36 88 885 877 • Email: eurocus@bourns.com The Americas: Tel: +1-951 781-5500 • Email: americus@bourns.com www.bourns.com

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