TBA331 STMICROELECTRONICS | Alldatasheet

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S G S-THOMSON OVE D | 79292357 001130? O I i nn 67C 17091 =D W¥3-25 he BASE vss | LINEAR INTEGRATED CIRCUITS GENERAL PURPOSE TRANSISTOR ARRAY The TBA 331 is an array of 5 monolithic NPN transistors in a 14-lead dual in-line plastic package. Two transistors are internally connected to form a differential amplifier. The transistors of the TBA 331 are well suited to low noise general purpose and to a wide variety of applications in tow power systems in the DC through VHF range. They may be used as discrete compo- nents in conventional circuits; in addition, they provide the very significant inherent integrated circuit advantages of close electrical and thermal matching. ABSOLUTE MAXIMUM RATINGS Each Total transistor package Veso _Collector-base voltage (Ie = 0) 20 - Vv Vero Collector-emitter voltage (13 = 0) 15 - Vv Vess+ Collector-substrate voltage 20 - Vv Veso Emitter-base voltage (Ic = 0) 5 - v le Collector current 50 — mA Prot Total power dissipation at Tam < 55°C 300 = 750 mW . Tig, T; Storage and junction temperature -40to 150 °C Top Operating temperature Oto 85 °C * The collector of each transistor of the TBA 331 is isolated from the substrate by an integrated diode, The substrate (pin 13) must be connected to the most negative point in the external circuit to main- tain isolation between transistors and to provide for normal transistor action. ORDERING NUMBER: TBA 331 MECHANICAL DATA Dimensions in mm : _ . ; a yeveyaysyeyeyencie, () : . ous, - a poe : 6/82 2970 B-i 432

$6 S- a S-THOMSON OVE pf 7929237 oorsana 2 i. 67¢ 17002, oT YB-Qy : (RRA ~ . V Py TBA331 SCHEMATIC DIAGRAM 241 5 & 8 i 14 Qt a2} a3 a4 as 3 6 7 9 10 12 13 S-3763 substrate THERMAL DATA exch | Total Rin j-amp Thermal resistance junction-ambient max [eer] 126°C/W ELECTRICAL CHARACTERISTICS (Tanp = 25°C unless otherwise specified) eee i | a current (le = 0) Ves = 10V current (Iq = 0) Vee = 10V current lc = 1mA Vee = 3V

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S G S-THOMSON O7E D | 2929237 0011309 4 | ae i 170t _ ~ veo j TC 17003, OT -YB~Q SOAS TBARS, wad ELECTRICAL CHARACTERISTICS (continued) [rn |v Ya i om Veeo Collector-base voltage (Ie = 0) v Veo Collector-omitter voltage (Ie = 0) v Vess collector-substrate voltage {loss ~ 0) le = 10HA v Vce (at) _—_Colllector-emitter ssturation voltage Ig = 1mA Ie = 10mA v Vepo Emitter-base voltage (Ic = 0) v Vee. Base-emitter voltage fe = 1mA Vee = 3V 0.716 v le = 10mA Vee = 3V 08 v Wge1-Vecal_ Input offset voltage lo = 1mA Vee = 3V mv \\Vees-Veeq! Input offset voltage Ig = 1 mA Vee = 3V mv \\Vpeq-Vees! Input offset voltage Io = 1mA Vee = 3V mv Waes-Vacal Input offset voltage lo = 1mA Vee = 3V mv AVee Base-emitter za voltage Io = 1maA ar temperature Vee = 3V mvc coefficient WVec1-Vecel Input offset a voltage lo = 1mA aT temperature Vee = 3V ave coefficient

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SG S-THOMSON O7E D 7929237 oovazo oo " e7c i704 «ote SZ~as Aare oo. i PAAR tease || wont ELECTRICAL CHARACTERISTICS (continued) Prem | mcm in on a i a a Voe= 3V otk, Mees 3 | a0 ro] | — | frequency lg = 3mA Voe= 3V Voe= 3V f = 1KHz Ry = 1ka Voe= 3V f = 1kHz transfer ratio Io = 1mA Voe= 3V f = 1kHz transfer ratio lo = 1mA Voe= 3V f = 1kHz admittance Ic = 1mA Vee = 3V f = 1kHz admittance le = 1mA Vee=3V f= 1MHz 0340.04 . transadmittance Io = 1mA Vee" 3V f = 1MHz ms transadmittance lo = 1mA Voe= 3V f = 1MHz 435

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__ *S G S-THOMSON O?E D | 7929237 OO1LIL1 2 | ( —. eae uy {4 Ne 67c 17095 oOT-43-Aay SBS CTBASSE iv wv a + | - a | a ELECTRICAL CHARACTERISTICS (continued) a ec Yoo Output admittance lo = 1mA Vee=3V f = 1MHz 0,001+)0.03 Cepo Emitter-base capacitance Io =0 Veg= 3V Coe Collector-base_ capacitance le = 0 Vea= 3V Coss Collector-sustrate capacitance Ig = 0 Ness" 3V Fig. 1 - Collector cutoff Fig. 2 - DC current gain vs. Fig. 3 - Input voltage and current vs ambient tempera- emitter current. input offset voltage vs. emit- ture ' ter current sys oS SEE Se ee SCOOT neon) Yee toe EEE EEE CEH ECP ss - EAR Peel EF see EE © bE LELIVCEL] om» FEI EH EHH 8 CEE Cer FEEEEEEERE eee EHH He ES Seti : EEEEE Ce ked/ ELL we EEF rN, Eerie THAT EERE EEEEY-AFEEEE EHH errteceyealliy §— o« ttt CCTM Era * ~ EEELEERAEEEEH . SHH etme. “CECH SeUEnney Zaneoee Er merry EH EHH FTP EERAREE= FEE ERS CE EEE EEE » EEEELACEL EEE) 6 « GTP E HH EEE HHH Bees SHEE HH Smet rarer eet t we EEE EEEEEEEEEE =, EXEEHII- EPH EEHTT, 4, EXCH FEI Fert, Fig. 4 - Input characteristic Fig. 5 - Input offset voltage Fig. 6 - Input offset current for each transistor vs, ambient temperature for matched transistor pair. eC ee CECE ieee feo FE SSP ew CCerreer errr ee COCO COCE PEE ieee ae tt ECEEREEE EEE PELE EEE y PEEEEELEE EEE EH EH THA ESECASRERSEEELEEELEH HEEEEEEEEEEEEEEEEEE = LL Mes TTT TT COCOONS EEE COCO eee 1] COCCCCreP NESE etrtt meem TO reer . CEP EEEEEEEEEEENSS EERE 1 Tha o PEEPS) ae EERE CTI Cert EEEEEEEEEEEEEEE ETH HEEEEEEEEEEEEEEEEEE Bea a oe PEEEEEEEEEFEEEEEEEEH, EEEEECECEEeEEEEEEEEH CCAM en EEE 6 8 & © tt ar ee 436 2974 c-O1