TB6642FTG

TB6642FG TOSHIBA | Alldatasheet

Document overview

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Technical content

Features

• Power supply voltage : 50 V (max)
• Output current : 4.5 A (max)
• Direct PWM control
• CW/CCW/Short Brake/Stop modes
• Overcurrent shutdown circuit (ISD)
• Overcurrent detection threshold control
• Overcurrent detection time control
• Overvoltage shutdown circuit (VSD)
• Thermal shutdown circuit (TSD)
• Undervoltage lockout circuit (UVLO)
• Dead time for preventing shoot-through current
• Selectable release of TSD,ISD TB6642FG:Weight: 0.5 g (typ.) TB6642FTG:Weight: 0.07 g (typ.) P-VQFN32-0505-0.50-002

Block Diagram (application circuit example) The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. IN1 OUT1 OUT2 SGND

5 V regulator

ISD detection ISD detection Predriver Motor IN2 PWM ALERT Level Time Control RSGND

Pin Functions:TB6642FG Pin No. Pin Name Functional Description

1 ALERT Error detection output pin

2 OSC Capacitor pin for controlling release of ISD,TSD

3 IN1 Control signal input pin 1

4 SGND Small signal ground pin

5 IN2 Control signal input pin 2

6 N.C. No-connect

7 OUT1 Output pin 1

8 RSGND Power ground pin/

Detection resistor pin for PWM constant-current control 9 N.C. No-connect

10 OUT2 Output pin 2

11 N.C. No-connect

12 VM Power supply voltage pin

13 VISD Resistor pin for overcurrent detection threshold control

14 TISD Resistor pin for overcurrent detection time control

15 PWM PWM input pin

16 N.C. No-connect ― FIN Pin-fin heat sink (Note 1) Note 1: Since the pin-fin is provided for discharging heat, the thermal design must be considered on the PCB designing. (The fin is installed on the second surface of the chip and electrified; therefore it must be insulated or earthed to the ground.) Note 2: ESD test is not conducted on N.C.pins. Pin Assignment (top view):TB6642FG N.C. ALERT N.C. PWM FIN RSGND N.C. VM IN2 IN1 OUT2 TISD OUT1 SGND OSC VISD 16 15 14 13 12 11 10 9 N.C. FIN 1 2 3 4 5 6 7 8

Pin Functions:TB6642FTG Pin No. Pin Name Functional Description

1 OUT1 Output pin 1

2 OUT1 Output pin 1

3 N.C. No-connect

4 RSGND Power ground pin/

Detection resistor pin for PWM constant-current control

5 RSGND Power ground pin/

Detection resistor pin for PWM constant-current control 6 N.C. No-connect

7 OUT2 Output pin 2

8 OUT2 Output pin 2

9 N.C. No-connect 10 N.C. No-connect

11 VM Power supply voltage pin

13 N.C. No-connect 14 N.C. No-connect

15 VISD Resistor pin for overcurrent detection threshold control

16 N.C. No-connect

17 TISD Resistor pin for overcurrent detection time control

18 PWM PWM input pin

19 N.C. No-connect 20 N.C. No-connect 21 N.C. No-connect

22 ALERT Error detection output pin

23 OSC Capacitor pin for controlling oscillation frequency for the PWM

24 IN1 Control signal input pin 1

25 N.C. No-connect

26 SGND Small signal ground pin

27 SGND Small signal ground pin

28 N.C. No-connect 29 N.C. No-connect 30 N.C. No-connect

31 IN2 Control signal input pin 2

32 N.C. No-connect Note 1: Design the pattern in consideration of the heat design because the back side has the role of heat radiation. (The back side should be connected to GND because it is connected to the back of the chip electrically.) Note 2: Though each OUT1, RSGND, OUT2, VM, and SGND has two pins, short out these two pins at the external IC respectively. Note 3: ESD test is not conducted on N.C.pins.

Pin Assignment (top view):TB6642FTG IN2 VM OUT1 OUT1 RSGND RSGND OUT2 OUT2 VM VISD SGND ALERT PWM TISD OSC IN1 SGND NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC

Absolute Maximum Ratings (Note) (Ta = 25°C) Characteristics Symbol Rating Unit Power supply voltage VM 50 V Output voltage VO 50 (Note 1) V Output current 1 IO peak1 4.5 (Note 2) A Output current 2 IO peak2 4.0 (Note 3) A Input voltage VIN −0.3 to 5.5 V ALERT pin output voltage VALERT 5.5 V ALERT pin output current IALERT 5 mA Power dissipation (TB6642FG) PD1 0.89 (Note 4) W Power dissipation (TB6642FTG) PD2 3 (Note 5) W Operating temperature Topr −40 to 85 °C Storage temperature Tstg −55 to 150 °C Note: The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating (s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. Please use the TB6642FG/FTG within the specified operating ranges. Note 1: OUT1, OUT2 Note 2: The absolute maximum output current rating of 4.5 A must be kept for OUT1 and OUT2 when VM ≤ 36 V. Note 3: The absolute maximum output current rating of 4.0 A must be kept for OUT1 and OUT2 when VM >36 V. Note 4: IC only Note 5: On the PCB (Four layer board is based on JEDEC standard.) Operating Ranges Characteristics Symbol Rating Unit Supply voltage VMopr 10 to 45 V PWM frequency fPWM Up to 100 kHz Output current IO (Ave.) Up to 1.5 (Note 6) (given as a guide) A Note 6: The average output current shall be increased or decreased depending on usage conditions such as ambient temperature and IC mounting method). Use the average output current so that the junction temperature of 150°C (Tj) and the absolute maximum output current rating of 4.5 A or 4.0 A are not exceeded.

Electrical Characteristics (unless otherwise specified, Ta = 25°C, VM = 24 V) Characteristics Symbol Test Condition Min Typ. Max Unit Power supply current ICC1 Stop mode ― 3 8 mA ICC2 CW/CCW mode ― 3 8 ICC3 Short Brake mode ― 3 8 Control circuit IN1 pin, IN2 pin, PWM pin Input voltage VINH 2 ― 5.5 V VINL 0 ― 0.8 Hysteresis voltage VIN (HYS) ― 0.4 ― Input current IINH VIN = 5 V ― 50 75 μA IINL VIN = 0 V ― ― 5 PWM frequency fPWM Duty: 50 % ― 100 ― kHz PWM minimum pulse width fPWM (TW) (given as a guide only) 1 ― ― μs OUT1 pin, OUT2 pin Output ON resistance RON (U + L) IO = 3 A ― 0.55 0.9 Ω Output leakage current IL (U) VM = 50 V, VOUT = 0 V −2 ― ― μA IL (L) VM = VOUT = 50 V ― ― 2 Diode forward voltage VF (U) IO = 3 A ― 1.3 1.7 V ALERT pin Output fall time voltage V AL (LO) IALERT = 1 mA ― ― 0.4 V Output leakage current I AL (LE) VALERT = 5.5 V ― ― 2 μA OSC charge/discharge current IOSC 4.5 9 13.5 μA

Thermal Performance Characteristics PD – Ta Ambient Temperature T a (°C) Power dissipation P D (W) (1) (2) 25 50 75 100 125 150 0.5 1.0 1.5 (1) On the PCB Cu: more than 50%: Rth (j-a) = 89.3°C /W, PD = 1.4 W when Ta = 25°C (2) IC only: Rth (j-a) = 140°C/W, PD = 0.89 W when Ta = 25°C. Thermal resistance Thermal Resistance (rth) – Pulse Width (t) Input width IC only On the PCB Cu: more than 50%) Input Pulse (1) 25 50 75 100 125 150 1.0 2.0 3.0 (1) On the PCB (Four layer board is based on JEDEC standard.) Rth (j-a) = 41.3°C/W, PD = 3 W when Ta = 25°C ・TB6642FTG PD – Ta ・TB6642FG Power dissipation P D (W) Ambient Temperature T a (°C)

The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. Pin name (Pin No./TB6642FG) I/O Signal I/O Internal Circuit IN1 (3) IN2 (5) Digital input L: 0.8 V (max) H: 2 V (min) PWM (15) Digital input L: 0.8 V (max) H: 2 V (min) ALERT (1) Open-drain output An externally attached pull-up resistor enalbes the High output. H (High-impedance): Abnormal operation (When the UVLO, TSD, VSD and/or ISD is activated) L: Normal operation OSC (2) The pin connects a capacitor for controlling release of ISD, TSD VISD (13) The pin connects a resistor controlling overcurrent detection threshold. TISD (14) The pin connects a resistor controlling overcurrent detection time. PWM 100 kΩ (typ.) IN1 (IN2) 10 kΩ (typ.) 100 kΩ (typ.) ALERT OSC VISD TISD

Pin name (Pin No./TB6642FG) I/O Signal I/O Internal Circuit OUT1 (7) OUT2 (10) RSGND (8) Utmost care must be taken for designing the pin-arrangement pattern because a large current flows through these pins. Functional Description The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. Timing charts may be simplified for explanatory purposes. 1. Input/Output Functions Input Output IN1 IN2 PWM OUT1 OUT2 Mode H H H L L Short brake L L L L H H L H CW/CCW L L L Short brake H L H H L CCW/CW L L L Short brake L L H OFF (Hi-Z) Stop (a release of TSD and/or ISD) L 2. Protective Operation Alert Output (ALERT) The ALERT pin behaves as an open-drain output and provides a high-impedance state on output being pulled up by a resistor externally wired. The output is Low when the TB6642FG/FTG performs a normal operation (in which state the operational mode is selectable through the IN1 pin and IN2 pin among CW, CCW, Short Brake and Stop modes.). In any other cases (in which state the thermal shutdown circuit (TSD), overcurrent shutdown circuit (ISD), overvoltage shutdown circuit (VSD) and/or undervoltage lockout (UVLO) is activated), the output is High. Driving both the IN1 pin and IN2 pin Low allows a release of the shutdown operations; the TB6642FG/FTG resumes the normal operations. OUT1(OUT2) VM RSGND

1. Undervoltage Lockout Circuit (UVLO) The TB6642FG/FTG incorporates an undervoltage lockout circuit. When the supply voltage drops under 8 V (typ.), all the outputs are turned off (Hi-Z). The UVLO circuit has a hysteresis of 0.7 V (typ.); the TB6642FG/FTG resumes the normal operation at 8.7 V (typ.). 4. Overvoltage Shutdown Circuit (VSD) The TB6642FG/FTG incorporates an overvoltage shutdown circuit. If the supply voltage exceeds 53 V (typ.), all the outputs are turned off (Hi-Z). The VSD circuit has a hysteresis of 3 V (typ.); the TB6642FG/FTG resumes the normal operation at 50 V (typ.). Note: The VSD circuit is activated if the absolute maximum voltage rating is violated. Note that the circuit is provided as an auxiliary only and does not necessarily provide the IC with a perfect protection from any kind of damages. 8.7 V (typ.) VM voltage UVLO internal signal H L 8.0 V (typ.) UVLO operation ALERT output H L OUT1, OUT2 H L Normal operation OFF (Hi-Z) UVLO operation Normal operation 53 V (typ.) VM voltage VSD internal signal H L 50 V (typ.) VSD operation VSD operation ALERT output H L OUT1, OUT2 H L Normal operation OFF (Hi-Z) Normal operation

1. Thermal Shutdown Circuit (TSD) The TB6642FG/FTG incorporates a thermal shutdown circuit. If the junction temperature (Tj) exceeds 170°C (typ.), all the outputs are turned off (Hi-Z). Stop time is determined by oscillation frequency of OSC capacitor. Example of formula: OSC frequency: fosc = 8/ (Cosc [F] × 106 ) [Hz] (typ.) Stop time: toff = 5.17/ fosc [s] (typ.) OSC terminal should be connected to the GND in order not to recover the operation automatically after thermal shut down. Driving both the IN1 pin and IN2 pin Low allows a release of the shutdown operation; the TB6642FG/FTG resumes the normal operation. 170°C (typ.) Junction temperature (Tj) TSD internal signal H L TSD operation <OSC: Connecting to the capacitor> Stop time setting signal OUT1, OUT2 H L Normal operation OFF (Hi-Z) Normal operation H L ALERT output H (Hi-Z) L toff:OSC set value OSC

Note: The TSD circuit is activated if the absolute maximum junction temperature rating (Tj) of 150°C is violated. Note that the circuit is provided as an auxiliary only and does not necessarily provide the IC with a perfect protection from any kind of damages. 170°C (typ.) Chip temperature junction temperature (Tj) Internal TSD signal H L TSD operation OSC:GND ALERT output H L IN1, IN2 H L OUT1, OUT2 H L More than 1 μs (typ.) Normal operation OFF (Hi-Z) Normal operation

1. Overcurrent Shutdown Circuit (ISD) The TB6642FG/FTG incorporates overcurrent shutdown (ISD) circuits monitoring the current that flows through each of all the four output power transistors. The detection time threshold is programmable through the VISD pin with a pull-up resistor. If the overcurrent flowing through any one of the ISD circuit flows beyond the detected time threshold, all the outputs are turned off (Hi-Z). The detection time threshold is controllable through the external resistor of the TISD pin. The operation recovers after stop time (toff). Stop time is determined by oscillation frequency of OSC capacitor. Example of formula: OSC frequency: fosc = 8/ (Cosc [F] × 106 ) [Hz] (typ.) Stop time: toff = 5.17/ fosc [s] (typ.) OSC terminal should be open in order not to recover the operation automatically after over current shut down. Driving both the IN1 pin and IN2 pin Low allows a release of the shutdown operations; the TB6642FG/FTG resumes the normal operation.

• Detection current threshold of the external resistor, R1, of the VISD pin 10 kΩ: 6.3 A (typ.) 20 kΩ: 4.2A (typ.) 30 kΩ: 3.1 A (typ.)
• Detection time threshold of the external resistor, R2, of the TISD pin 10 kΩ: 1.6 μs (typ.) 20 kΩ: 2.8 μs (typ.) 100 kΩ: 12.4 μs (typ.) VISD pin TISD pin IC

Note: The ISD circuit is activated if the absolute maximum current rating is violated. Note that the circuit is provided as an auxiliary only and does not necessarily provide the IC with a perfect protection from damages due to overcurrent caused by power fault, ground fault, load-short and the like. ISD internal signal H L ALERT output H (Hi-Z) L H L OUT1, OUT2 <OSC: Connecting to the capacitor> VISD setting value 0 ton: TISD set value Output current Normal operation OFF (Hi-Z) Normal operation ton: TISD set value toff:OSC set value toff:OSC set value OSC Stop time setting signal Internal ISD signal H L ALERT output H L IN1, IN2 H L OUT1, OUT2 OSC:GND Predefined VISD value ton: Predefined TISD value Output current More than 1 μs (typ.) Normal operation OFF (Hi-Z) Normal operation

1. Direct PWM Control The motor rotation speed is controllable by the PWM input sent through the PWM pin. It is also possible to control the motor rotation speed by sending in the PWM signal through not the PWM pin but the IN1 and IN2 pins. When the motor drive is controlled by the PWM input, the TB6642FG/FTG repeats operating in Normal Operation mode and Short Brake mode alternately. For preventing the shoot-through current in the output circuit caused by the upper and lower power transistors being turned on simultaneously, the dead time is internally generated at the time the upper and lower power transistors switches between on and off. This eliminates the need of inserting Off time externally; thus the PWM control with synchronous rectification is enabled. Note that inserting Off time externally is not required on operation mode changes between CW and CCW, and CW (CCW) and Short Brake, again, because of the dead time generated internally. PWM ON VM M GND OUT1 VM M GND PWM OFF OUT1 VM M GND PWM ON OUT1 VM M GND PWM ON → OFF t2 = 200 ns (typ.) OUT1 VM M GND PWM OFF → ON t4 = 500 ns (typ.) OUT1 RSGND VM Output voltage waveform (OUT1)

1. Output Circuit The switching characteristics of the output transistors of the OUT1 and OUT2 pins are as shown below: Characteristic Value Unit tpLH 650 (typ.) ns tpHL 450 (typ.) tr 90 (typ.) tf 130 (typ.) Output voltage (OUT1, OUT2) 90% 10% 50% tpLH tr 50% tpHL 90% 10% tf PWM input (IN1, IN2)

Weight: 0.5 g (typ.)

P-VQFN32-0505-0.50-002 Unit: mm Weight: 0.07 g (typ.)

1. Block Diagrams Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. Equivalent Circuits The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. Timing Charts Timing charts may be simplified for explanatory purposes. 4. Application Circuits The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. Test Circuits Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. IC Usage Considerations Notes on Handling of ICs (1) The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. (2) Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. (3) If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. (4) Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time.

Points to Remember on Handling of ICs (1) Over Current Protection Circuit Over current protection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all circumstances. If the Over current protection circuits operate against the over current, clear the over current status immediately. Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the over current protection circuit to not operate properly or IC breakdown before operation. In addition, depending on the method of use and usage conditions, if over current continues to flow for a long time after operation, the IC may generate heat resulting in breakdown. (2) Thermal Shutdown Circuit Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits operate against the over temperature, clear the heat generation status immediately. Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the thermal shutdown circuit to not operate properly or IC breakdown before operation. (3) Heat Radiation Design In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (T j) at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation with peripheral components. (4) Back-EMF When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design.

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