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TB6500AH TOSHIBA | Alldatasheet

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TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC

2 PHASE BIPOLAR STEPPER + FULL BRIDGE DRIVER

The TB6500AH is Stepping Motor Driver IC incorporates Dual Bipolar Stepping Motor Drivers. DC Motor Driver and Serial to Parallel signal conversion > circuit (12bit Serial to Parallel shift Resistor with Latch) a a O- which control the 3 output drivers states by means of Y = input serial signal trains. RD —— Wl iI \\ yee FEATURES yee @ Package : HZIP25-P All cmos ‘ible input HZIP25-P-1.27 e compatible in 7 ompatible inpu Weight : 9.869 (Typ.) @ 2 Bipolar Stepping Motors and 1 Full Bridge Motor are controlled by input serial signal trains. @ Output current up to 0.8A (for Stepper) and 0.6A (for DC Motor) @ PWM chopper type Stepping Motor Drivers. @ Wide range of operating supply voltage : V)y=0~27V > Vec=4.5~5.5V @ Built-in thermal shut down, power supply monitor circuit. 961001EBA2 @ TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fall due| to theit inherent electrical sensitivity and vulnerability to physical stress. i i the responsibilty of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified ‘operating rangot as tot forth in the mott recent products pecificatione. Alzo, plese keep in mind the precautions and conditions tot forth in tho TOSHIBA’ Semiconductor Reliability Handbook g Ihe Products described in this document are subject to foreign exchange and foreign trade control laws Zhe [information contained herein 's presented only as a guide for ‘the applications, of our products. No responsiblity is assumed by, TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. @ the information contained herein is subject to change without notice 1997-07-01 1/17

(2) ® © () 2 YY m tf 82 9 pe poe Ciao Le) [oo ee oan popes | Hee aa. {i> aly, ME ry ours |e i> OuTE Hp vecce om ORE) PG Capacitance connect to each power supply terminal is required to change to optimum value for noise elimination and also required to connect directly to each power supply terminal (Vcc, Vi) and the corresponding GND terminal (see Table 1) for stable operations. Table 1 POWER SUPPLY Pin® Pin® (Vm-apcp) Pin® Pind9 — (Viv-e) Heat Fin is connect to GND terminal with Low Impedance. 1997-07-01 2/17

PIN FUNCTION PIN CONNECTION | PIN No. | SYMBOL FUNCTIONAL DESCRIPTION {oP View) co [1 [6 [Power GND terminal cf D channel current detective terminal outro 3 ; 3 | OUT-D Output D channel re, OUT-D Output D channel strose—o illati i «lL Internal oscillation frequency setting sw ;, terminal oural—fo | 6 [STROBE [STROBE signal input terminal ouraL_f10 ; ry ; NFACV 411 ; 8 [sin | Serial signal input terminal pc __413 | 9 [OUT-A Output A channel ours bes | 10 |OUT-A Output A channel ours _fi6 | 11 [NFA __[A channel current detective terminal oure 7 Power voltage supply terminal for WREGE ha

12 VM-ABCD ritag y vw-el_]19

motor driver Vec(=—_]20 | 13 [PG _[ Power GND terminal i i oun | 14 [NFB __[B channel current detective terminal our.cae3 | 15 [OUT-B Output B terminal ourcL__]a OUT-B Output B terminal ure Pe OUT-E Output E terminal External reference voltage input | ie | VREG-E terminal Power voltage supply terminal for

19 VM-E motor driver

INPUT SERIAL PULSE TRAIN AND POWER OUTPUT STATES SERIAL INPUT SIGNAL TRAIN CONTROL OPERATION a a 1 per [ez [oe Te | ptf t [ ~ [© [stop | Di 1 © motor contro

2 E1 Pout H fT t [ Hw [ecw/cw

Stepping motor 2 chapping nue 3 Vref-CD | rate control (Vref CD) Vref =0.85V (Typ.) (at “H” mode) Stepping motor 1 chapping Veot = 0.65V ; oe fo | Vref-AB | rate control (Vref AB) ref =0.65V (Typ.) (at mode) | 5s |e INPUT OUTPUT | move | Pos | om | Stepping motor 2 control pai {az a tia | (Out ¢, D) Pu tT TT stor | os | ct | Cow GW ro | #2 | ee B1, B28, B | 1 | oe | Stepping motor 1 control C1, C23¢, C are all the same. Poe | at INPUT SERIAL PULSE TRAIN TIMING CHART ‘STROBE | OOO OOOO OOD GN 1997-07-01 4/17

OUTPUT STAGE 1, 2 1/2 CIRCUIT @inrasco r —> p> 4 [3 LP oT Le @iate 2) | WO, @ Lop | fezs*ecal | (Ed R Per L A o) 20 I NFA, 8, C,D PG FUNCTION (Comp. + >Comp.-) (Note 1) [At] a2 _Jourajoutal Mobe | ccw/ cw PH TH [co fT co {stop (Note 1) In case of Comp.+<Comp.-, Upper side power transistor turned off. (Note 2) Free wheeling diode connects between output A terminal and GND is required for stable operating. And also recommend to connect free wheeling diodes other output terminals for reliable operations. 1997-07-01 5/17

| vee LI ee i LN rt on ree J Ree i fp _ i ourt nee > K . Cos ALT | GND FUNCTION INPUT OUTPUT | move | | £1 | ineE2 [OUTE[OUTE| a pou} wf ty [ccwecw | Note) : | II high acti BREAK (Note) : Inputs are all high active type INPUT STAGE (CK, S-IN, STROBE terminal) OSC STAGE (OSC terminal) Vec @ vec comparator s kQ ot ‘osc = 2 @)sc 21.4-Cosc ose se (Cosc “F) I MAXIMUM RATINGS (Ta = 25°C) CHARACTERISTIC SYMBOL RATING UNIT Supply Voltage (Motor) Supply Voltage (Control) Input Voltage ouput curent ga TS oe Operating Temperature -40~85 Storage Temperature = 55~150 (Note) Tc=85°C 1997-07-01 6/17

RECOMMENDED OPERATING CONDITION (Ta = - 20~75°C) CHARACTERISTIC. SYMBOL TEST CONDITION | min. | ve. | Max. | UNIT Supply Vohage (Contra) [Vcc | SCS | | 8] input Voltage [wwf SSOP — fcc | AB L— fT 07] lout —_| OUT [= |= Toe] C= b= 110] Clock Fi “ MH Clock Pulse Width ey a ed ee Data Set Up Time [isuck-sin | | 250, — | — | [ 250; — | — | Data Hold Time [theK-sin_| L250, — | — | PWM Oscillation Frequency | fpwm | Sid 20 | — | 100 | eee |

ELECTRICAL CHARACTERISTICS

Output stage (Ta=25°C, Vcc =5V, Vim =24V) TEST. CHARACTERISTIC SYMBOL | CIR- TEST CONDITION TYP. | MAX. | UNIT CUIT Operation Power Supply Voltage Vm (opr) 27) V 2B : L— [227 27] co_| VsaTu-1 flour=o5a [OMY [T2025] AB louT=0.7A [= [15] 20] VSATLA Output NE [713] Saturation Voltage [£2 ; flouT=0.5A | — | 13] 1.8 Vv V lour=0.5A tov b=) 22) 271 SATU-2 louT=0.3A M_ [= J 207 25] ’ [— [15] 20] E | Msati2 Igur=03a fOuPuEPG F247] ; a a a E-ch Output Voltage VOE 1 #2 =03A VREG-E = 15V = Vv Reference Voltage Vrecewpry) 1] SSTSCSCSC~*d CSCO — | Output Leak curren HOH | > lycaaov [= [= 7 sl, AB [— | t6[ 20] Clamp Diode © 3 LRLOZA: Output AP [= [2] 18] y Forward Voltage = [ — | 15] 1.9] le e#— IF=05A, Output E Daf 17] 1997-07-01 7/17

Small signal stage (Ta =25°C, Vcc =5V, Vi = 24V) TEST CHARACTERISTIC SYMBOL |CIR- TEST CONDITION TYP. | MAX. | UNIT: CUIT CK, ST, S-IN: Open 'ce1 CK: 1MHz, DATA: 1/2fcLK 'cc2 Output ON 30 CK: 1MHz, DATA: 1/2fcLK mA leca Output OFF 30} 50 Output open, Input serial Quiescent Current signal (ar Bt, C1, D1 =) 40 IM-ABCD Output ON \\42, 82, C2, D2="H" Output open Output OFF HA cw, CCW, BREAK ‘ ‘ 12 A \\ Output ON, Output open |= | 5] [mal M-E Output open A Output OFF u Vi vn P| — [SS Input Voltage 5 |CK, S-IN, ST “iv Soa] = | 5] Input Current | incH) | 5 A p Vinu=0.4V [=3[ = 7 3|" Tj = -40~125°C rio | one [ore] | Chopping Voltage Level RNF=3.30 Vv vc] faba [own [| or] Vref Level Differential _ Voltage AVchop Vref (H) - Vref (L) 0.2 Vv Reset Voltage Vcr ee 2 eo 0 et es ee [= [=| *I,, Max. PWM Frequency [200 — [= | Thermal Shut Down TSD (ON) 1, Thermal Shut Down TSD (OFF) ! °C Differential Temperature TSD (ON) - TSD (OFF) [ — [| 10] — | 1997-07-01 8/17

AC characteristics (Ta = 25°C, Vcc = 5V) TEST CHARACTERISTIC SYMBOL |ciR- TEST CONDITION Typ. | MAX. | UNIT cult #STROBE [=~ |=] 15] Min. Clock Pulse Width Ck 7 |— | — | tsuCK-SIN ee 0) ee | Data Set Up Time Data Hold Up Time thCK-SIN ee El poo = = | CK-OUT [— | 2] — | Output Propagation Time LH 7 |strope-our |RL=402 |= | 2{ = | us c=15pF | — [2] = | Vec:R-OUT [=| 2] — | Max. Clock Rise Time Se Max. Clock Fall Time tfMAX [—|[—] 1] Output Rise Time 7 |RL=400 [=| 1] — | s Output Fall Time cL 150F Ss ' RL = 1002 ce Se EGE 1997-07-01 9/17

TEST CIRCUIT 1. VsaTU-1-2, VSATL-1-2 (OROROR®) " oi 4 ® @ am (12) NI lal ip ® = Br || la BY © © | | ext oe ¢ Pealc iS 2 ¢ Petre ny | (*1) Set output transistor active with input mode select. (*2) Calibrate output current becomes 0.5A (or 0.7A) with this resistor. (*3) Calibrate output current becomes 0.3A (or 0.5A) with this resistor. TEST CIRCUIT 2 IoL-H, loL-L INPUT (#1) ‘ ze Q_ @ © Gd ol —“*s o,! ue TB6SO0AH 4 ° ® gy fS---—2 30v [S| | @—y id ® ° | r | 30v <q P i-70 © ae (*1) All “L” level S-IN signal, normal CK and STROBE signals are required to measure. 1997-07-01 10/17

TEST CIRCUIT 3 Ve-U-2, VF-L1-2 ; Q @® © —b @] d—-—3 iz 2! tessooan | L y ooo @ '®) ] | = GI © 3G ©) (Note) Not to take a GND with any non-connecting pins. TEST CIRCUIT 4 = I¢c4.2.3, I: ABCD-E, fpwoL-H INPUT Q_ @ © Gd ® @ [> ; z ey 9) 1 @® S © g g TB6500AH o @ >) La 5 © (> ® | b 4 = uw Frequency Countor 1997-07-01 11/17

TEST CIRCUIT 5 TINH TNL: VINH: VINH: VINL: VccR P re aT Ts g [> a + 2 Yq bTP @) '®) eg TB6500AH e @ [> = 5 @ g z @ b— | e) o_ oR VIN level (Note 1) Apply signals to CK, S-IN, and STROBE at the levels shown in the diagram and check function. Power supply monitor level (Note 2) Change the power supply voltage and check the output operation. TEST CIRCUIT 6 Vref, VrefL, 4Vref INPUTNote " x OROROR®) . E--@ g f T* 4“ 1 6 es fo 3 go reesooan [2 q Pa te Vd 5 © g (>

8 G © g ©

(Note 1) Hold the state (2 phase excitation mode) and measure. 1997-07-01 12/17

TEST CIRCUIT 7 (Calibrate Iq to 0.6A by R1, 0.5A by R2) OROROR®) c yp WY 7G fi) : <ld TB6500AH | _% BPS ree <9 Bl os oH b> | eee | @ 7-1. Set the STROBE terminal to high level and compare the output with the data in the waveform shown in Fig.7-1. @ 7-2. Check that the output is latched in the waveform as shown in Fig.7-2. @ 7-3. Check the CK or STROBE, and the output delay time in the waveform as shown in Fig.7-3. @ 7-4. Change the Vcc voltage, and check the delay with the output in the waveform as show in Fig.7-4. 1997-07-01 13/17

AC ELECTRICAL CHARACTERISTICS 7-1: CK-S-IN cK 50%: CK CK 50% “fl S77 90%. 90% sn 50% 50% 50%. 10%. | . os 7-2: STROBE-CK 90% STROBE 90% LS é\\. 7-3 : STROBE (CK)-OUT STROBE 50%] 50% one 50% 50% (ck) (tek) (tek) “ le a ee eT Ln : 1997-07-01 14717

7-4: Vecr-OUT ov tvcer 3.8) 3.8V NT vu . Riw, ° When measuring the upper transistor, set the external load resistor between the output and GND, then measure at the output terminal. When measuring the lower transistor, set the external load resistor between the output and Vm then measure at the output terminal. Pp - Ta TRANSIENT THERMAL RESISTANCE D $ (SINGLE PULSE) © INFINITE HEAT FIN 0 8 Cee Ay tar ew RhG-a=1S°CW 2 so Oy > Reh (j-a)=25°C/W a = rH peer COUN CT Tl e Leet tT TT ttt | ORR ® rN g Fatt i pet NE era g 2 Lo Sit £ x» boss be FRY g 3 Se Se ie OnAt Gm ROTI € PAR ee ee G 2 = \\ FF SSS See ae SSS eesti eee ett Ee A 2 ose 2 LEP ir? rest iN eg ee [jet Ty tt PsN 3 COT ET ETT NY BF FS 10 3050 100 00 tatoT tx 0 25 50 75 100125 150 r AMBIENT TEMPERATURE Ta (°C) PULSE WIDTH t (s) 1997-07-01 15/17

Me a) ® VM-ABCD_ S3 + <o |. a — . © ie tl pee ” S6 Gy ® oure MOTOR 2| by uso_\\ BE vuenaco fours \\ I pa [me [p-oures 2c @ y = VME i ows (Note 1) Care should be taken not to have a common impedance with output current pass of each motor (NF A, NF B for MOTOR 1, NF C, MOTOR 2 and PG for DC MOTOR) and any other signal lines. And recommended to take one point GND with each output current pass and corresponding PG terminal. (see table 1 of BLOCK Diagram) (Note 2) Utmost care is necessary in the design of the output line, Vjy and GND line since IC may be destroyed due to short-circuit between outputs, air contamination fault, or fault by improper grounding. 1997-07-01 16/17

HZIP25-P-1.27 Unit : mm 040.3 30.020.2 i a a —_ 5 LF Khe 3° = i eer 1y | i) S i 1 2 fl Ht | Fd H | 3 il 2.575TYP 2.76TyP 0.551041 eae] 1.010.1 | 36.5MAX 36.0102 1 25 Weight : 9.86g (Typ.) 1997-07-01 17/17

Product Information

TB6500 specifications and overview.

Summary

2 PHASE BIPOLAR STEPPER + FULL BRIDGE DRIVER

Description

2 PHASE BIPOLAR STEPPER + FULL BRIDGE DRIVER

Source title TB6500 Datasheet(PDF) - Toshiba Semiconductor

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