TB62726AFG

TB62726ANG TOSHIBA | Alldatasheet

Document overview

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Technical content

Features

• Output current capability and number of outputs: 90 mA × 16 outputs
• Constant current range: 2 to 90 mA
• Application output voltage: 0.7 V (output current 2 to 80 mA)

0.4 V (output current 2 to 40 mA)

• For anode-common LEDs
• Input signal voltage level: 3.3-V and 5-V CMOS level (Schmitt trigger input)
• Power supply voltage range VDD = 3.0 to 5.5 V
• Maximum output terminal voltage: 17 V
• Serial and parallel data transfer rate: 20 MHz (max, cascade connection)
• Operating temperature range Topr = −40 to 85°C
• Package: Type ANG: SDIP24-P-300-1.78 Type AFG: SSOP24-P-300-1.00B
• Current accuracy (All output ON) Current Accuracy Output Voltage Between Bits Between ICs Output Current > = 0.4 V ±15% 2 to 5 mA > = 0.7 V ±4% ±12% 5 to 80 mA TB62726ANG TB62726AFG Weight SDIP24-P-300-1.78: 1.22 g (typ.) SSOP24-P-300-1.00B: 0.32 g (typ.)

Pin Assignment (top view) Warnings: Short-circuiting an output terminal to GND or to the power supply terminal may broken the device. Please take care when wiring the output terminals, the power supply terminal and the GND terminals. Block Diagram Truth Table CLOCK LATCH ENABLE SERIAL-IN OUT0 … OUT7 … OUT15 SERIAL-OUT H L Dn Dn … Dn − 7 … Dn − 15 Dn − 15 L L Dn + 1 No change Dn − 14 H L Dn + 2 Dn + 2 … Dn − 5 … Dn − 13 Dn − 13 X L Dn + 3 Dn + 2 … Dn − 5 … Dn − 13 Dn − 13 X H Dn + 3 OFF Dn − 13 Note 1: OUT0 to OUT15 = On when Dn = H; OUT0 to OUT15 = Off when Dn = L. In order to ensure that the level of the power supply voltage is correct, an external resistor must be connected between R-EXT and GND. GND SERIAL-IN LATCH CLOCK OUT0 OUT1 OUT2 OUT3 VDD R-EXT SERIAL-OUT ENABLE OUT15 OUT14 OUT13 OUT12 OUT4 OUT5 OUT6 OUT7 OUT11 OUT10 OUT9 OUT8 SERIAL-IN LATCH OUT0 R-EXT ENABLE I-REG Q ST D Q ST D D Q C K Q ST D D Q C K D Q C K CLOCK OUT1 OUT15 SERIAL-OUT

Warning: Latch circuit is leveled-latch circuit. Be careful because it is not triggered-latch circuit. Note 2: The latches circuit holds data by pulling the LATCH terminal Low. And, when LATCH terminal is a High level, latch circuit doesn’t hold data, and it passes from the input to the output. When ENABLE terminal is a Low level, output terminal OUT0 to OUT15 respond to the data, and on and off does. And, when ENABLE terminal is a High level, it offs with the output terminal regardless of the data. SERIAL-IN LATCH CLOCK OUT0 OUT1 OUT3 SERIAL-OUT ENABLE OUT15

3.3 V/5 V

n = 0 1 2 3 4 5 6 8

Pin No. Pin Name Function

1 GND GND terminal for control logic

2 SERIAL-IN Input terminal for serial data for data shift register

3 CLOCK Input terminal for clock for data shift on rising edge

4 LATCH

Input terminal for data strobe When the LATCH input is driven High, data is not latched. When it is pulled Low, data is latched. 5 to 20 OUT0 to OUT15 Constant-current output terminals

21 ENABLE

Input terminal for output enable. All outputs ( OUT0 to OUT15 ) are turned off, when the ENABLE terminal is driven High. And are turned on, when the terminal is driven Low.

22 SERIAL-OUT Output terminal for seri al data input on SERIAL-IN terminal

23 R-EXT Input terminal used to connect an external resistor. This regulated the output current. 24 V DD 3.3-V/5-V supply voltage terminal Equivalent Circuits for Inputs and Outputs 1. ENABLE terminal 2. LATCH terminal 3. CLOCK, SERIAL-IN terminal 4. SERIAL-OUT terminal 5. OUT0 to OUT15 terminals VDD ENABLE GND R (UP) VDD LATCH GND R (DOWN) CLOCK, SERIAL-IN VDD GND VDD GND Internal data SERIAL-OUT Parasitic Diode OUT0 to OUT15 GND

Absolute Maximum Ratings (Topr = 25°C) Characteristics Symbol Rating Unit Supply voltage V DD 6 V Input voltage V IN −0.2 to VDD + 0.2 V Output current I OUT +90 mA/ch Output voltage V OUT −0.2 to 17 V ANG-type (when not mounted) 1.25 ANG-type (on PCB) Pd1 1.78 AFG-type (when not mounted) 0.83 Power dissipation (Note 3) AFG-type (on PCB) Pd2 1.00 W ANG-type (when not mounted) 104 ANG-type (on PCB) Rth (j-a) 1 AFG-type (when not mounted) 140 Thermal resistance (Note 3) AFG-type (on PCB) Rth (j-a) 2 120 °C/W Operating temperature T opr −40 to 85 °C Storage temperature T stg −55 to 150 °C Note 3: ANG-Type: Powers dissipation is derated by 14.28 mW/°C if device is mounted on PCB and ambient temperature is above 25°C. AFG-Type: Powers dissipation is derated by 6.67 mW/°C if device is mounted on PCB and ambient temperature is above 25°C. With device mounted on glass-epoxy PCB of less than 40% Cu and of dimensions 50 mm × 50 mm × 1.6 mm. Recommended Operating Conditions (Topr = −40°C to 85°C unless otherwise specified) Characteristics Symbol Conditions Min Typ. Max Unit Supply voltage V DD ⎯ 3 ⎯ 5.5 V Output voltage V OUT ⎯ ⎯ 0.7 4 V IOUT Each DC 1 circuit 2 ⎯ 80 mA/ch IOH SERIAL-OUT ⎯ ⎯ −1 Output current IOL SERIAL-OUT ⎯ ⎯ 1 mA VIH 0.7 × VDD ⎯ VDD + 0.15 Input voltage VIL −0.15 ⎯ 0.3 × VDD V Clock frequency f CLK ⎯ ⎯ 20 MHz LATCH pulse width t wLAT Cascade connected 50 ⎯ ⎯ ns CLOCK pulse width t wCLK ⎯ 25 ⎯ ⎯ ns Upper IOUT = 20 mA 2000 ⎯ ⎯ ENABLE pulse width (Note 4) twENA Lower IOUT = 20 mA 3000 ⎯ ⎯ ns Set-up time for CLOCK terminal t SETUP1 10 ⎯ ⎯ ns Hold time for CLOCK terminal t HOLD 10 ⎯ ⎯ ns Set-up time for LATCH terminal t SETUP2 50 ⎯ ⎯ ns Note 4: When the pulse of the Low level is inputted to the ENABLE terminal held in the High level.

Electrical Characteristics (Topr = 25°C, VDD = 3.0 V to 5.5 V unless otherwise specified) Characteristics Symbol Conditions Min Typ. Max Unit Supply voltage V DD Normal operation 3.0 ⎯ 5.5 V IOUT1 VOUT = 0.4 V, VDD = 3.3 V 31.96 36.20 40.54 IOUT2 VOUT = 0.4 V, VDD = 5 V REXT = 490 Ω 31. 59 35.90 40.20 IOUT3 VOUT = 0.7 V, VDD = 3.3 V 63.63 72.30 80.97 Output current IOUT4 VOUT = 0.7 V, VDD = 5 V REXT = 250 Ω 62.75 71.30 79.95 mA ∆IOUT1 VOUT ≥ 0.4 V, All outputs ON REXT = 490 Ω Output current error between bits ∆IOUT2 VOUT ≥ 0.4 V, All outputs ON REXT = 250 Ω ⎯ ±1 ±4 % Output leakage current input voltage I OZ V OUT = 15.0 V ⎯ ⎯ 1 µA ⎯ 0.7 VDD ⎯ V DD Input voltage V IN ⎯ GND ⎯ 0.3 VDD V IOL = 1.0 mA, VDD = 3.3 V ⎯ ⎯ 0.3 VOL IOL = 1.0 mA, VDD = 5 V ⎯ ⎯ 0.3 IOH = − 1.0 mA, VDD = 3.3 V 3 ⎯ ⎯ SOUT terminal voltage VOH IOH = 1.0 mA, VDD = 5 V 4.7 ⎯ ⎯ V Output current Supply voltage Regulation %/VDD When V DD is changed 3 V to 5.5 V ⎯ −1 −5 % Pull-up resistor R (Up) ENABLE terminal Pull-down resistor R (Down) LATCH terminal 115 230 460 k Ω IDD (OFF) 1 VOUT = 15.0 V R EXT = OPEN ⎯ 0.1 0.5 IDD (OFF) 2 VOUT = 15.0 V, All outputs OFF REXT = 490 Ω 1 3.5 5 IDD (OFF) 3 VOUT = 15.0 V, All outputs OFF REXT = 250 Ω 4 6 9 VOUT = 0.7 V, All outputs ON REXT = 490 Ω ⎯ 9 15 IDD (ON) 1 Same as the above, Topr = −40°C ⎯ ⎯ 20 VOUT = 0.7 V, All outputs ON REXT = 250 Ω ⎯ 18 25 Supply current IDD (ON) 2 Same as the above, Topr = −40°C ⎯ ⎯ 40 mA

Switching Characteristics (Topr = 25°C unless otherwise specifed) Characteristics Symbol Conditions Min Typ. Max Unit tpLH1 CLK- OUTn , LATCH = “H”, ENABLE = “L” ⎯ 150 300 tpLH2 LATCH - OUTn , ENABLE = “L” ⎯ 140 300 tpLH3 ENABLE - OUTn , LATCH = “H” ⎯ 140 300 tpLH CLK-SERIAL OUT 3 6 ⎯ tpHL1 CLK- OUTn , LATCH = “H”, ENABLE = “L” ⎯ 170 340 tpHL2 LATCH - OUTn , ENABLE = “L” ⎯ 170 340 tpHL3 ENABLE - OUTn , LATCH = “H” ⎯ 170 340 Propagation delay tpLH CLK-SERIAL OUT 4 7 ⎯ ns Output rise time t or 10 to 90% of voltage waveform 40 85 150 ns Output fall time t of 90 to 10% of voltage waveform 40 70 150 ns Maximum CLOCK rise time t r ⎯ ⎯ 5 µs Maximum CLOCK fall time t f When not on PCB (Note 5) ⎯ ⎯ 5 µs Conditions: (Refer to test circuit.) Topr = 25°C, VDD = VIH = 3.3 V and 5 V, VOUT = 0.7 V, VIL = 0 V, REXT = 490 Ω, VL = 3.0 V, RL = 60 Ω, CL = 10.5 pF Note 5: If the device is connected in a cascade and t r/tf for the waveform is large, it may not be possible to achieve the timing required for data transfer. Please consider the timings carefully. Test Circuit Logic input waveform VDD = VIH = 3.3 V VIL = 0 V tr = tf = 10 ns (10% to 90%) GND SERIAL-IN LATCH CLOCK OUT0 VDD R-EXT SERIAL-OUT ENABLE OUT15 Function generator IOL VIH, VIL Iref CL VL RL CL IDD

1. CLOCK, SERIAL-IN, SERIAL-OUT 2. CLOCK, SERIAL-IN, LATCH, ENABLE, OUTn 3. OUTn tHOLD tpLH/tpHL twCLK 50%50% 50% 50% tSETUP1 SERIAL-IN CLOCK SERIAL-OUT 50% twENA 50% tSETUP2 SERIAL-IN CLOCK 50% 50% 50% 50%tSETUP3 tpHL1/LH1 tpHL2/LH2 tpHL3/LH3 twLAT ENABLE LATCH OUTn 50% tof 10% 90% 10% 90% tor OUTn OFF ON

Output Current – Duty (LEDS turn-on rate) Output Current – REXT Resistor 100 1000 10000 Topr = 25°C VCE = 0.7 V 5000 500 Theoretical value: IOUT = (1.15 (V) ÷ R-EXT (Ω)) × 14.9 DUTY – Turn On Rate (%) IOUT (mA) DUTY – Turn On Rate (%) IOUT – DUTY On PCB IOUT (mA) IOUT – DUTY On PCB DUTY – Turn On Rate (%) IOUT (mA) IOUT – DUTY On PCB Ambient temperature Ta (°C) Pd – Topr Power dissipation P D (W/IC) REXT ( Ω) IOUT (mA) IOUT – REXT 100 0 20 40 60 80 100 TB62726AFG TB62726ANG Topr = 25°C VDD = 3.3 V to 5.0 V VCE = 1.0 V Tj = 120°C (max) 100 0 20 40 60 80 100 TB62726AFG TB62726ANG Topr = 55°C VDD = 3.3 V to 5.0 V VCE = 1.0 V Tj = 120°C (max) 100 0 20 40 60 80 100 TB62726AFG TB62726ANG Topr = 85°C VDD = 3.3 V to 5.0 V VCE = 1.0 V Tj = 120°C (max) 0 20 40 60 80 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 NG (On PCB) FG (On PCB)

Application Circuit (example 1): The general composition in static lighting of LED. More than VLED (V) ≥ Vf (total max) + 0.7 is recommended with the following application circuit with the LED power supply VLED. r1: The setup resistance for the setup of output current of every IC. r2: The variable resistance for the brightness control of every LED module. 16-bit SIPO, Latches and Constant-sink-current drivers TB62726ANG/AFG 16-bit SIPO, Latches and Constant-sink-current drivers TB62726ANG/AFG SERIAL-IN ENABLE LATCH CLOCK C.U. SERIAL-IN CLOC K SCAN r1 = 100 Ω (min) VLED SERIAL-OUTSERIAL-OUT r1 = 100 Ω (min)r2 Example) TD62M8600F: 8-bit multi-chip PNP transistor array, which is not used in static lighting system. ENABLE LATCH O0 O1 O2 O0 O1 O2O13 O14 O15 O13 O14 O15

Application Circuit (example 2): When the condition of VLED is VLED > 17 V The unnecessary voltage is one effective technique as to making the voltage descend with the zenor diode. 16-bit SIPO, Latches and Constant-sink-current drivers TB62726ANG/AFG 16-bit SIPO, Latches and Constant-sink-current drivers TB62726ANG/AFG SERIAL-IN CLOCK C.U. SERIAL-IN CLOCK SCAN r1 = 100 Ω (min) VLED > 17 V SERIAL-OUTSERIAL-OUT r1 = 100 Ω (min) r2 Example) TD62M8600F: 8-bit multi-chip PNP transistor array, which is not used in static lighting system. ENABLE LATCH ENABLE LATCH O0 O1 O2 O0 O1 O2O13 O14 O15 O13 O14 O15

Application Circuit (example 3): When the condition of VLED is Vf +0.7 < VLED < 17 V VOUT = VLED-Vf = 0.7 to 1.0 V is the most suitable for VOUT. Surplus VOUT causes an IC fever and the useless consumption electric power. It is the one way of being effective to build in the r3 in this problem. r3 can make a calculation to the formula r3 Ω = surplus VOUT/IOUT. Though the resistance parts increase, the fixed constant current performance is kept 16-bit SIPO, Latches and Constant-sink-current drivers TB62726ANG/AFG 16-bit SIPO, Latches and Constant-sink-current drivers TB62726ANG/AFG SERIAL-IN CLOCK C.U. SERIAL-IN CLOC K SCAN r1 = 100 Ω (min) VLED = 15 V SERIAL-OUTSERIAL-OUT r1 = 100 Ω (min)r2 Example) TD62M8600F: 8-bit multi-chip PNP transistor array, which is not used in static lighting system. r3 r3 ENABLE LATCH LATCH O0 O1 O2 O0 O1 O2O13 O14 O15 O13 O14 O15

• Operation may become unstable due to the electromagnetic interference caused by the wiring and other phenomena. To counter this, it is recommended that the IC be situated as close as possible to the LED module. If overvoltage is caused by inductance between the LED and the output terminals, both the LED and the terminals may suffer damage as a result.
• There is only one GND terminal on this device when the inductance in the GND line and the resistor are large, the device may malfunction due to the GND noise when output switchings by the circuit board pattern and wiring. To achieve stable operation, it is necessary to connect a resistor between the REXT terminal and the GND line. Fluctuation in the output waveform is likely to occur when the GND line is unstable or when a capacitor (of more than 50 pF) is used. Therefore, take care when designing the circuit board pattern layout and the wiring from the controller.
• This application circuit is a reference example and is not guaranteed to work in all conditions. Be sure to check the operation of your circuits.
• This device does not include protection circuits for overvoltage, overcurrent or overtemperature. If protection is necessary, it must be incorporated into the control circuitry.
• The device is likely to be destroyed if a short-circuit occurs between either of the power supply pins and any of the output terminals when designing circuits, pay special attention to the positions of the output terminals and the power supply terminals (V DD and VLED), and to the design of the GND line.

Weight: 1.22 g (typ.)

Weight: 0.32 g (typ.)

1. Block Diagrams Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. Equivalent Circuits The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. Timing Charts Timing charts may be simplified for explanatory purposes. 4. Application Circuits The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. Test Circuits Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. IC Usage Considerations Notes on Handling of ICs (1) The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. (2) Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. (3) If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. (4) Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time.

(5) Carefully select external components (such as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and regulator. If there is a large amount of leakage current such as input or negative feedback condenser, the IC output DC voltage will increase. If this output voltage is connected to a speaker with low input withstand voltage, overcurrent or IC failure can cause smoke or ignition. (The over current can cause smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge Tied Load (BTL) connection type IC that inputs output DC voltage to a speaker directly.

Points to Remember on Handling of ICs (1) Heat Radiation Design In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (Tj) at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation with peripheral components. (2) Back-EMF When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design.

About solderability, following conditions were confirmed

• Solderability (1) Use of Sn-37Pb solder Bath
• solder bath temperature = 230°C
• dipping time = 5 seconds
• the number of times = once
• use of R-type flux (2) Use of Sn-3.0Ag-0.5Cu solder Bath
• solder bath temperature = 245°C
• dipping time = 5 seconds
• the number of times = once
• use of R-type flux RESTRICTIONS ON PRODUCT USE 060116EBA
• The information contained herein is subject to change without notice. 021023_D
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. 021023_A
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. 021023_B
• The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_Q
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. 021023_C
• The products described in this document are subject to the foreign exchange and foreign trade laws. 021023_E