TB31202 TOSHIBA | Alldatasheet
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TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC PLL FREQUENCY SYNTHESIZER
FEATURES
@ One packaging two systems prescaler and PLL for receiver and transmitter @ Low operating power supply voltage : Vcc = 2.0~5.5V (Temperature= - 10°C : Vec = 1.9~5.5V) @ Low current consumption :I¢c =8mA (Typ.) q q yy Nt © Input frequency : f1N = 200~520MHz TAS S © High input sensitivity : VIN =93~107dB nV TW Ose @ Charge pump is constant current type, and is able to change output current by serial data @ Reference oscillation circuit is adopted circuit of bipolar, SSOP16-P-225-0.65B so getting the stable X'tal oscillation circuit Weight : 0.07g (Typ.) e@ Available standby control for receiver and transmitter independent of each other @ The very small package : SSOP16pin (0.65mm pitch) BLOCK DIAGRAM veo ©) t i f = f PHASE ce) (eel) > BUFFER
1 PROGRAMMABLE
Tee} 1 ae eel | fm] T [| cK DATA STB a re ee ae ee a ret 4 veo ©) Vee fo) MoD 2610016802 malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA. products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. 1997-03-25 1/14
PIN FUNCTION (The values of resistor and capacitor are typical.) ein | NRE FUNCTION INTERNAL EQUIVALENT CIRCUIT 7 vec 1 | fin = na 48 1000 ° Input terminal of RF oscillation signal. (9) fine 6 GND | 2 | Vcc __|Terminal of power supply. 15 | Vcc __|Pin2 and pin 15 are cannected in IC. Pi . Wy Yec Output terminal of charge pump. oO) Charge pump is constant current output circuit, and Grn) output current is varied by input serial data. ® ‘ _ = GND | 4 | GND [Terminal of GND. Pin 4 and pin 13 are cannected in IC. . . - 2000 5 Lb Output terminal of lock detection. It is the open drain output. ff Switchover terminal for constant of loop filter. 200 | sw It is the open drain output. When don’t switch constant of loop filter, available ry general output. Fs [ek [Input terminal of dock yw . 3 P>o DATA |input terminal of serial data. | /"PUt the serial data 3 for controlling IC. |e | ste | Input terminal of strobe signal. Output terminal of buffer amplifier. J The signal of local oscillation is output through the FT ne buffer amplifier. 1002 P @ XouT | Output terminal of local oscillation signal. [owe] olla Input terminal of local oscillation signal. © 10 XIN In case of external input, connecting it to this ® Oo) terminal. 961001EBA2" @ The products described in this document are subject to foreign exchange and foreign trade control laws. © ‘The information contained herein is presented only as a guide, for the applications, of our products. No_ responsibilty is assumed by, TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others @ The information contained herein is subject to change without notice 9997-03-25 21
DESCRIPTION OF FUNCTION AND OPERATION 1. Entry of serial data © Serial data used to control the IC is input through three terminals, CK, DATA and STB. ® During the rise of a clock pulse, data is fed to the shift register in the IC in order from the LSB. @® Upon the reception of all data, the strobe signal (STB) is made “H”. @ After the reception of a strobe signal (STB) of the “H” level, the data stored in the shift register is transferred to the latch in the block selected by the group code, whereby the IC is controlled. @ The three terminal, CK, DATA and STB, contains Schmitt trigger circuits to prevent the data errors by noise, etc. O Serial data group and group code @ The IC has control divided into four groups so that they may be controlled independent of one another. Each group is identified by a 2bit group code attached at the data end. CODE ITEM Number of divisions by CH1 programmable divider (fjn1) | 01 [Number of divisions by CH2 programmable divider (fin2) Number of divisions by reference divider (Xin) | 00 [Optional control O Serial data input timing Blus 202ys 202s « i—__ cara STB Bo2ys 1997-03-25 3/14
- Programmable dividers (CH1, CH2) @ These programmable dividers are composed of a 5bit swallow counter (5bit programmable divider), a 12bit programmable counter, and a two-modulars prescaler providing 64 and 66 divisions. © The strategy of a swallow counter is used to set high reference frequency. @ Sending certain data to the swallow counter and the programmable counter allows the setting of any of 2048 to 262142 divisions (multiple of two). @ The programmable counter and swallow counter are set by each channel. Each channel is specified by a group code. LSB ¢= [AOTAT[AD[AS [Ad] DO[D1 [D2] D3 [D4] D5] De] D7 [Da] DSTO] |] eS a A Swallow counter : A Programmable counter : N Group code CH1 : “10” CH2 : “01” A=A0+A1X2' 4" +A4x 24 N : Value of N counter N=D0+D1x2' 40+ +D11x2"! A: Value of A counter Number of divisions =2 (32N +A) 2048S Number of divisions 262142 (EX) A Signal of 380MHz is entered into fjy1, being divided into 12.5MHz step. (Reference frequency is 6.25kHz) 380 x 10° + (12.5 x 10? + 2) = 60800 60800 =2 (32N+A) “N=950, A=0 3. Reference divider @ This block generates the reference frequency for the PLL. @ The reference divider is composed of a 12bit reference divider and a half fixed divider. @ Sending certain data to the reference divider allows the setting of any of 16 to 8190 divisions (multiple of two). LSB = [0 | 01 [ b2 | 3 [04 | 5 [06 | 07 [ bs | D9 [O10] O11] 1 J 7 | | Lt Reference divider Group code D=D0+D1x2'4---D10x2'°+D11x2"! Number of divisions = 2D
165 Number of divisions= 8190
(EX) With a 21.25MHz X’tal oscillator connected, being divided into 12.5kHz step. (Reference frequency is 6.25kHz) 21.25 x 10° + (12.5 x 10° + 2) = 3400 3400 =2D “-D=1700 1997-03-25 4/14
- Optional control @ The optional control below is available. @® Test mode (Usually set up T=“0"). ® Control and polarity control of the charge pump output current for each channel. @ Output terminal for Lock detector. @® Standby control of each channel and reference divider. © Control of filter switch. LSB CH1 CH2 = [Ler [err er2 [01 [rr cra [sez [ser TOT OATS] | _Y uu Uu US LI LHI LI WLW Test Charge pump CHI Charge pump Reference Lock Filter Group polarity standby output current divider detector _—_ switch code standby T : Bit for test mode cP : Switchover bit for charge pump output polarity CP1, 2 : Switchover bit for charge pump output current SB1, 2 : Standby control bit for CH1, CH2 SBR : Standby control bit for reference divider LD1, 2 : Control bit for lock detector output SW _ : Control bit for filter switch © Description of options including their control @ Test mode (T) Bit “T” is for test mode. In other than the test mode, set this bit at “0”. ® Control of charge pump output current (CP1, CP2) This IC uses a constant current output type charge pump circuit. Output current is varied by controlling “CP1” and “CP2”. CHARGE PUMP OUTPUT CURRENT CONTROL BIT CHARGE PUMP , . . a. OUTPUT CURRENT High speed lock up is possible by switching charge pump output current. fo [0 100.0 | Po 200 a a ZI E800uA (Note) ooh em resistor isn't needed. Ori rr tod LS 1997-03-25 5/14
Charge pump output polarity (CP) Bit “CP” can be reversed charge pump output polarity. CHARGE PUMP OUTPUT POLARITY OUTPUT POLARITY [1 [Reverse | @ Lock detector output When phase comparator detects phase difference, LD terminal (pin 5) outputs “L”. When phase comparator locks, LD terminal outputs “H”. On standby, outputs “H”. LD terminal output is controlled by “SB1", “SB2", “LD1” and “LD2”. CONTROL BIT LOCK DETECTOR | ser] s2_ J tor tb2 | OUTPUT STATE poo f o ft a CH1 only detect Logical multiply (AND) of cH cH |= a
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| 1 | 0 [cHi only detect | sei, sp bit CHI only detect | *P0Ut $B1, $82 bit poo fo ft [° : Normal operation [0 | _1 [ene only detect | 1 : Standby pa foo fk CH? only detect poo foo ft poo fo a fH ee ee 1997-03-25 6/14
Reference counter output J Channel counter output l aT). i H Lock detector output 1 J (LD) H L L-~ At this point T<2/fx fy, : Xin operating frequency (LOCAL OSC) T : The time difference of the pulse between reference counter output and channel counter output. Number of divisions by reference divider R= 0) fx B=2/fy, (s) When the situation that T is less than 2/fy| (T<2/fyj) continues more than three cycles of reference counter output, lock detector outputs “H”. @® Standby control (SB1, $B2, SBR) Standby control by three bits (SB1, SB2, SBR). Bits “SB1” and “SB2” do standby control of CH1, CH2. Bit “SBR” does standby control of reference divider. CONTROL BIT STATE | sei sez SBR cH1 OT CH2 REF po fo TT ON TON TON terlocking [oon | or | on] | mode pt fo f+ {orf [ on [on | [oor for [on fet ON mode 1997-03-25 7/14
© Filter switch control (SW) Control of SW terminal by bit “SW”. This terminal is for switching constant of loop filter. Output type of this terminal is open drain output. Switching the register of loop filter by this terminal with switching charge pump output current, high mode and normal mode can operate PLL by ideal braking factor. When constant of loop filter don’t change switch, available general output. FILTER SWITCH CONTROL a 5. Reference frequency oscillation circuit and buffer amplifier This IC has a stable oscillation circuit composed of bipolar. In case of inputting the external reference frequency directly, use Xjy terminal (pin 11). For the common use of X’tal of the reference frequency oscillation circuit for the PLL and X’tal of local oscillation to 2’nd MIX, output terminal of local oscillation signal with buffer amplifier (pin 9) may be used. This terminal (pin 9) is provied with a buffer amplifier. 1997-03-25 8/14
MAXIMUM RATINGS (Ta = 25°C CHARACTERISTIC SYMBOL RATING UNIT Power Supply Vohage | vec | 6 | v_| [Power Dissipation | Pp | 560 | mW | Operating Temperature -30~85 Storage Temperature —55~150 ELECTRICAL CHARACTERISTIC (Unless otherwise specified, Vcc =2.2V, Ta = 25°C) TEST CHARACTERISTIC SYMBOL | CIR- TEST CONDITION TYP. | MAX. | UNIT CUIT Operating Power Vv [_[Ta= - 30~85°C [ 20] 22] 55] cc = — 10~85" v Supply Voltage [| |ta==1o~asc TT 22] 55 | Operating Current CH1 =CH2 = 300MHz, [current Consumption | Iecq | [At standby mode L— [eo a fin Operating fin1 [| Vin =93dB nV [| 200 | — | 520 | MHz Frequency [| fa | [Vina=93dBev | 200 | — | 520 | i [ Vina [| fis = 200~520MHz | 93 | — | 107 | fin inp SENN [Viana = 2005202 [93 | = [107 | SPAN Xin Operating _ “a Frequency fx Vx =0.5Vp-p, Sin-wave 5 | 21.25 25 | MHz Xin Input Voltage | Vx | fy = 21.252 Input Voltage — Vv Vv CK input Frequeng | fc | [ee Sid | — | 1 pe | igpt | |°CP 750, "CPI"=O, Vep= tv] — fz i0o] — | Charge Pump Output | Icp2 | ‘|[*cP1"=0, “cP2"=1, Vcp=t.1v| — [#200] — |, Current [lcp3 [| “ePt=1, “CP2"=0, Vep= tiv] — [400] — | “ Charge Pump OFF Leak _ + Current CPOFF Standby mode, Vcp=1.1V £1.00 | vA SW Terminal ON essonee | fw | |smow | = | me = | LD Terminal ON este | | [teow = | me = SW Terminal OFF Leak LD Terminal OFF Leak LD, LD #1 A eenene OFM | wore | pore T= | = [otf | 1997-03-25 9/14
REFERENCE DATA (Typ.) REFERENCE] CURRENT poON TNT NT 80m PONT sons ma | pos NON ma post ST ONT 800A J a : Normal operation Pos ts or ea} 5: Srandby state TEST CIRCUIT S Et st ® o—@ O— O—-© Oo—® aul) ® a g ® Serial data ~ ec] = s6 | ‘eT 9997-03-25 10/14
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SSOP 16-P-225-0.65B Unit : mm 16 9 ' qy 38 all = 9 € g| & ki 3] 3 aS 4 8 0.23TYP 0.22+0.1 10.130) 5.5MAX 5.040.2 Nx 2 e ¢ a2 = = <8 2 bal | 0.45+0.2 (—) Weight : 0.07g (Typ.) 1997-03-25 14/14