TB2173FTG

TB2173FTG TOSHIBA | Alldatasheet

Document overview

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Technical content

Features

• Accepts headphone amplifier inputs from two sources
• Selectable headphone amplifier output: Output coupling or OCL
• Incorporates beep circuit
• Incorporates power switch (controlled using port or command)
• Supports power muting (controlled using port or command)
• Features with single source only (tuner mode):
• Electronic volume Provides logic reset feature
• Low-frequency boost (with AGC)
• Two port expansion circuits
• Operating supply voltage range: Ta = 25°C V DD (opr) = 1.8 to 4.5 V V CC1 (opr) = 1.8 to 4.5 V V CC2 (opr) = 0.9 to 4.5 V Note: Use the device with V CC1 greater than or equal to VCC2.
• Handle the product with great care because its surge resistance is low.
• Ensure that the product is mounted correctly. Otherwise, the product or connected equipment may get damaged or degrade. Weight: 0.05 g (typ.) Product indication: B2173G

Block Diagram (OCL Type) Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purpose. 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 C-SW C-Cup GND IN2 A VOL OUT A PRE IN A PRE IN B VOL OUT B IN2B IN1A IN1B PRE GND MODE TC MUTE TC BEEP IN BEEP VCC1 BIAS IN OUT ADJ RF BIAS OUT BIAS BIAS OUT LPF1 BST NF LPF2 RL RL BEEP OUTA OUTA OUTC PW GND OUTB BEEP OUTB VCC2 BST TC AGC DET AGC IN BST OUT BST AGCP2 PRE NFA PORT VDD STB DATA CK RESET PW SW MUTE SW VOL, SW, PORT CONT MODE SW VOL VOL ATT ATT VDD ON ON MCU Music IN VDD OCL Tuner IN BIAS OUT BIAS OU T PRE NFB

Pin voltages: Typical quiescent pin voltages in test circuit, VDD = VCC1 = 2.1 V, VCC2 = 1.2 V, Ta = 25°C The equivalent circuit diagrams are intended as an aid for describing circuits; they may be shown in abbreviated or simplified format. Pin No. and Name Function Internal Equivalent Circuit Pin Voltage (V)

1 BEEP

6 BEEP

Beep signal output ⎯

20 BEEP IN Beep signal input

2 OUT A

5 OUT B

Power amplifier output 0.6

4 PW GND Power drive stage ground 0

7 V CC2 Power drive stage V CC 1.2

11 BST OUT Boost amplifier output

0.6 VCC1 15 kΩ 10 kΩ 10 kΩ 10 kΩ 30 kΩ 10 kΩ 10 kΩ 15 kΩ PWA BST2 PWB BIAS OUT BIAS OUT BIAS OUT VCC2 7

Pin No. and Name Function Internal Equivalent Circuit Pin Voltage (V) 3 OUT C Center amplifier output 0.6

33 C-SW

V DD : OCL GND : Output coupling 0.6

8 BST TC Pin for reducing boost

9 AGC DET Boost AGC detection

10 AGC IN

The level of the input signal to the BST amplifier is varied according to the input level at this pin. Input impedance: 37 kΩ (typ.) 0.6 BIAS OUT 32 kΩ 5 kΩ VCC1 10 kΩ to BST SW VCC1 to BST Amp. VCC2 PW GND BIAS OUT

Pin No. and Name Function Internal Equivalent Circuit Pin Voltage (V)

12 LPF2

Cutoff frequency setting 2 for low-frequency boost 0.6

13 BST NF Boost amplifier NF

0.6

14 LPF1

Cutoff frequency setting 1 for low-frequency boost 0.6

28 PRE IN B

29 PRE IN A

Tuner mode: Power amplifier input 0.6

41 PRE NF A

42 PRE NF B

Tuner mode: Power amplifier NF 0.6 12 kΩ 13 12 BIAS OUT 20 kΩ 2 kΩ 60 kΩ BIAS OUT 20 kΩ 16 kΩ 50 kΩ BIAS OUT to PWA 20 kΩ BIAS OUT 20 kΩ 16 kΩ 50 kΩ BIAS OUT 5 kΩ to PWB 20 kΩ 5 kΩ 10 pF 500 Ω 500 Ω 10 pF

Pin No. and Name Function Internal Equivalent Circuit Pin Voltage (V)

15 BIAS

OUT Bias circuit output 0.6 16 RF Ripple filter pin 1.1

17 OUT ADJ

Output DC voltage adjustment The output bias voltage is set to an optimum value according to the voltage applied to VCC2. 0.6 18 BIAS IN Bias circuit input 0.6

19 V CC1 VCC other 2 than VDD and

2.1

21 MUTE TC Mute smoothing ⎯

34 MUTE

amplifier. When controlling MUTE SW using a port, specify "0" in a command. In that case, the IC operates as follows according to the port state: High: Mute ON Low: Mute OFF When controlling MUTE SW using a command, drive the port low.

22 MODE TC Pin for reducing mode change

23 PRE GND Ground for circuits other than

logic and power drive stage ⎯ 0 94 kΩ 124 kΩ 30 kΩ VCC2 VCC1 19 17 VCC1 to BUS 50 kΩ 24 kΩ to BUS VCC1 100 kΩ

Pin No. and Name Function Internal Equivalent Circuit Pin Voltage (V)

24 IN 1B

25 IN 1A

Input pin with GV = 8dB 0.6

26 IN 2B

31 IN 2A

The input signal is supplied to the power amplifier through the electronic volume circuit and preamplifier.

27 VOL

30 VOL

IN2 electronic volume output

32 GND Logic ground ⎯ 0

35 PW SW

IC ON/OFF switch. The switch does not, however, control the electronic volume circuit. When controlling PW SW using a port, specify "1" in a command. In that case, the IC operates as follows according to the port state: High: IC ON Low: IC OFF When controlling PW SW using a command, drive the port high.

36 RESET

This pin resets the bus data. High: No reset Low: Reset 2.1

40 V DD Logic power supply

2.1 t o ADD OUT 25 VCC1 10 kΩ 1 kΩ BIAS OUT 20 kΩ BIAS OUT 2 kΩ to BUS 31 30 20 kΩ 50 kΩ 200 Ω VDD

Pin No. and Name Function Internal Equivalent Circuit Pin Voltage (V)

37 CK Clock input ⎯

38 DATA Data input ⎯

39 STB Strobe input

200 Ω VDD VDD 41 to BUS

1. Serial Data Specification (initial data is not set.) Characteristics Symbol Min Typ. Max Unit Clock frequency fck ⎯ ⎯ 1.0 MHz High-level pulse width twcH 500 ⎯ ⎯ nSec Low-level pulse width twcL 500 ⎯ ⎯ nSec Data setup time ts 100 ⎯ ⎯ nSec Data hold time th 100 ⎯ ⎯ nSec STB setup time tp 150 ⎯ ⎯ nSec STB pulse width twl1 0.80 ⎯ ⎯ µSec (1) Ach/Bch control data: 2 bits (Ach, Bch) Ach Bch Operation 0 0 No volume data set 1 0 Volume data set for Ach only 0 1 Volume data set for Bch only 1 1 Volume data sets for both channels CK DATA1 DATA2 STB Ach Bch D1 D2 D3 D4 D5 D6 AD MODE BST PW SW MUTE P1 P2 NONE NONE AD th ts tp twl twcH twcL l/fck

(2) Volume data: 6 bits (D1 to D6) Volume Value D1 D2 D3 D4 D5 D6 Volume Value D1 D2 D3 D4 D5 D6 1 −0.1dB 0 0 0 0 0 0 33 −34.3 0 0 0 0 0 1 2 −2.1 1 0 0 0 0 0 34 −34.7 1 0 0 0 0 1 3 −4.0 0 1 0 0 0 0 35 −35.1 0 1 0 0 0 1 4 −5.5 1 1 0 0 0 0 36 −35.5 1 1 0 0 0 1 5 −6.9 0 0 1 0 0 0 37 −36.0 0 0 1 0 0 1 6 −8.2 1 0 1 0 0 0 38 −36.5 1 0 1 0 0 1 7 −9.6 0 1 1 0 0 0 39 −37.0 0 1 1 0 0 1 8 −10.9 1 1 1 0 0 0 40 −37.6 1 1 1 0 0 1 9 −12.3 0 0 0 1 0 0 41 −38.2 0 0 0 1 0 1 10 −13.6 1 0 0 1 0 0 42 −38.9 1 0 0 1 0 1 11 −14.9 0 1 0 1 0 0 43 −39.6 0 1 0 1 0 1 12 −16.3 1 1 0 1 0 0 44 −40.4 1 1 0 1 0 1 13 −17.6 0 0 1 1 0 0 45 −41.5 0 0 1 1 0 1 14 −19.0 1 0 1 1 0 0 46 −42.7 1 0 1 1 0 1 15 −20.3 0 1 1 1 0 0 47 −43.3 0 1 1 1 0 1 16 −22.1 1 1 1 1 0 0 48 −43.9 1 1 1 1 0 1 17 −23.7 0 0 0 0 1 0 49 −44.7 0 0 0 0 1 1 18 −25.1 1 0 0 0 1 0 50 −45.3 1 0 0 0 1 1 19 −26.6 0 1 0 0 1 0 51 −46.1 0 1 0 0 1 1 20 −27.9 1 1 0 0 1 0 52 −46.9 1 1 0 0 1 1 21 −28.5 0 0 1 0 1 0 53 −47.7 0 0 1 0 1 1 22 −29.1 1 0 1 0 1 0 54 −48.7 1 0 1 0 1 1 23 −29.3 0 1 1 0 1 0 55 −49.9 0 1 1 0 1 1 24 −29.8 1 1 1 0 1 0 56 −51.1 1 1 1 0 1 1 25 −30.5 0 0 0 1 1 0 57 −52.5 0 0 0 1 1 1 26 −30.8 1 0 0 1 1 0 58 −54.4 1 0 0 1 1 1 27 −31.3 0 1 0 1 1 0 59 −56.1 0 1 0 1 1 1 28 −31.7 1 1 0 1 1 0 60 −57.8 1 1 0 1 1 1 29 −32.2 0 0 1 1 1 0 61 −60.0 0 0 1 1 1 1 30 −32.8 1 0 1 1 1 0 62 −63.5 1 0 1 1 1 1 31 −33.2 0 1 1 1 1 0 63 −68.9 0 1 1 1 1 1 32 −33.9 1 1 1 1 1 0 64 −90.0 1 1 1 1 1 1 (3) Identification data: 1 bit (AD) AD Operation

0 Recognized as DATA1

1 Recognized as DATA2

(4) MODE SW data: 1 bit (MODE) MODE Operation 0 Outputs the input signal components for IN2 (tuner mode). 1 Outputs the input signal components for IN1 (music mode).

(5) BST SW data: 1 bit (BST) BST Operation

0 Boost OFF

1 Boost ON

(6) PW SW: 1 bit (PW SW) PW SW can be controlled using either a command or port, with the following truth table: Port Command Operation 0 (OFF) 0 (OFF) 0 (IC OFF) 0 (OFF) 1 (ON) 0 (IC OFF) 1 (ON) 0 (OFF) 0 (IC OFF) 1 (ON) 1 (ON) 1 (IC ON) (7) MUTE SW: 1 bit (MUTE) MUTE SW can be controlled using either a command or port, with the following truth table: Port Command Operation 0 (OFF) 0 (OFF) 0 (MUTE OFF) 0 (OFF) 1 (ON) 1 (MUTE ON) 1 (ON) 0 (OFF) 1 (MUTE ON) 1 (ON) 1 (ON) 1 (MUTE ON) (8) Power expansion: 1 bit (P1/P2) P1/P2 Operation

0 Port Low

1 Port High

(9) NONE An invalid bit (10) Strobe data (STB) STB Operation

0 No data write

1 Data write

(11) Initial command upon command reset DATA1 Ach Bch D1 D2 D3 D4 D5 D6 AD Initial value 1 1 1 1 1 1 1 1 0 DATA2 MODE BST PW SW MUTE P1 P2 Invalid Invalid AD Initial value 0 0 0 1 1 0 Bit 9 specifies the address. The initial address selected upon a reset is DATA1. Command data is maintained over a power cycle.

1. IC Settings According to Supply Voltage (1) Connecting power supplies The TB2173FTG supports an end product that uses either one or two batteries. Connect the power supply pins according to the number of batteries, as follows: Microcontroller power supply Battery power supply Single battery V DD, VCC1 V CC2 Two batteries V DD V CC1, VCC2 Note: Use the device with V CC1 greater than or equal to VCC2. (2) Handling the OUT ADJ pin (pin 17) When using a single battery: Jumper OUT ADJ (pin 17) and BIAS IN (pin 18). When using two batteries: Leave OUT ADJ (pin 17) open. Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit VDD DC supply voltage VCC 5.0 V VDD Operating supply voltage VCC 4.5 V Power block output current I O 100 mA (Note 1) 350 Power dissipation P D (Note 2) 1200 mW Operating temperature T opr −25 to 75 °C Storage temperature T stg −55 to 150 °C Note 1: IC alone: When the IC is used at 25°C or higher, reduce 2.8 mW per 1°C. Note 2: When mounted on Toshiba standard board: When the IC is used at 25°C or higher, reduce 9.6 mW per 1°C. The absolute maximum ratings of a semiconductor device are a set of specified parameter values which must not be exceeded during operation, even for an instant. Exposure to conditions beyond those listed above may cause permanent damage to the device or affect device reliability, which could increase potential risks of personal injury due to IC blowup and/or burning. The equipment manufacturer should design so that no absolute maximum rating value is exceeded with respect to current, voltage, power dissipation, temperature, etc. Ensuring that the parameter values remain within these specified ranges during device operation will help to ensure that the integrity of the device is not compromised.

Electrical Characteristics

(VDD = VCC1 = 2.1 V, VCC2 = 1.2 V, Rg = 600 Ω, RL = 16 Ω, f = 1 kHz, OCL mode, Ta = 25°C, SW3: b, SW4: a, unless otherwise specified) Music mode Input: IN1, Output: OUT, SW1: a Tuner mode Input: PRE IN, Output: OUT, SW2: a Electronic volume Input: IN2, Output: VOL OUT Characteristics Symbol Test Condition Min Typ. Max Unit ICCQ1 Standby (V DD), SW4: b ⎯ ⎯ 5 µA ICCQ2 Standby (V CC1, VCC2) ⎯ ⎯ 5 µA ICCQ3 Mute ON: Music mode (VCC1), SW3: a ⎯ 0.6 1.0 mA ICCQ4 Mute ON: Music mode (VCC2), SW3: a ⎯ 0.3 0.6 mA ICCQ5 Mute ON: Music mode (VCC1), SW3: a ⎯ 0.6 1.0 mA ICCQ6 Mute ON: Music mode (VCC2), SW3: a ⎯ 0.3 0.6 mA ICCQ7 No signal: Music mode (V CC1) ⎯ 0.9 1.4 mA ICCQ8 No signal: Music mode (V CC2) ⎯ 0.7 1.4 mA ICCQ9 No signal: Music mode (V CC1) ⎯ 0.9 1.4 mA Quiescent current ICCQ10 No signal: Music mode (V CC2) ⎯ 0.8 1.6 mA ICCD1 0.1 mW ∗2ch/16 Ω (VCC1) ⎯ 1.0 ⎯ mA Driving current ICCD2 0.1 mW ∗2ch/16 Ω (VCC2) ⎯ 4.5 ⎯ mA Voltage gain G V1 V o = −20dBV 6.5 8 9.5 dB Channel balance CB1 V o = −20dBV −1.5 0 +1.5 dB Output power P o1 THD = 10% 7 9.5 ⎯ mW Total harmonics distortion THD1 P o = 1 mW ⎯ 0.2 0.5 % Output noise voltage V no1 R g = 600 Ω, IHF-A, SW1: b ⎯ −98 −92 dBV Interchannel crosstalk CT1 V o = −20dBV −32 −38 ⎯ dB Intermode crosstalk CT2 V o = −20dBV, monitor: music −45 −51 ⎯ dB RR1 f r = 100Hz, Vr = −20dBV, injected to VCC1 −70 −85 ⎯ dB Ripple rejection ratio RR2 f r = 100Hz, Vr = −20dBV, injected to VCC2 −60 −75 ⎯ dB Music mode Mute attenuation ATT1 V o = −20dBV, SW3: b → a −100 −120 ⎯ dB Voltage gain G V2 V o = −20dBV 22.5 24 25.5 dB Channel balance CB2 V o = −20dBV −1.5 0 +1.5 dB Output power P o2 THD = 10% 7 9.5 ⎯ mW Total harmonics distortion THD2 P o = 1 mW ⎯ 0.2 0.5 % Output noise voltage V no2 R g = 600 Ω, IHF-A, SW2: b ⎯ −90 −84 dBV Interchannel crosstalk CT3 V o = −20dBV −27 −33 ⎯ dB Intermode crosstalk CT4 V o = −20dBV, monitor: tuner −39 −45 ⎯ dB RR3 f r = 100 Hz, Vr = −20dBV, injected to VCC1 −58 −73 ⎯ dB Ripple rejection ratio RR4 f r = 100 Hz, Vr = −20dBV, injected to VCC2 −43 −58 ⎯ dB Mute attenuation ATT2 V o = −20dBV −95 −115 ⎯ dB BST1 f = 100 Hz, Vo = −20dBV 1.5 4.5 7.5 dB BST2 f = 100 Hz, Vo = −30dBV 8.5 11.5 14.5 dB Tuner mode Boost BST3 f = 100 Hz, Vo = −50dBV 9.5 12.5 15.5 dB

Characteristics Symbol Test Condition Min Typ. Max Unit Maximum input level V im THD = 1% 250 320 ⎯ mVrms Attenuation error ∆ ATT V o = −10dBV −3.0 0 +3.0 dB Channel balance CB3 V o = −10dBV −1.5 0 +1.5 dB Electronic volume Maximum attenuation ATT V o = −10dBV −80 −90 ⎯ dB Bus operating frequency f opr ⎯ ⎯ 1 MHz High level V IH CK, DATA, STB, and RESET input pins VDD × 0.75 ⎯ VDD V Input voltage Low level V IL CK, DATA, STB, and RESET input pins 0 ⎯ VDD × 0.25 V Input leakage current I LI V IH: VDD, VIL: 0 V ⎯ ⎯ ±1 µA IOL V OL: 0.3 V 1.0 ⎯ ⎯ mA Logic Port expansion driving current IOH V OH: VDD-0.3 V −1.0 ⎯ ⎯ mA Beep output level V BEEP SW3 : a −55 −50 −45 dBV PW SW pin ON voltage V35 (ON) VDD × 0.8 ⎯ VDD V PW SW pin OFF voltage V35 (OFF) 0 ⎯ VDD × 0.2 V MUTE SW pin ON voltage V34(ON) VDD × 0.8 ⎯ VDD V MUTE SW pin OFF voltage V34 (OFF) 0 ⎯ VDD × 0.2 V

33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 C-SW GND IN2 A VOL OUTA PRE INA PRE INB VOL OUTB IN2B IN1A IN1B PRE GND MODE TC MUTE TC BEEP VCC1 BIAS IN OUT ADJ RF BIAS OUT LPF1 BST NF LPF2 BEEP OUTA OUT A OUTC PW GND OUT B BEEP OUT B VCC2 BST TC AGC DET AGC IN BST OUT PRE NFA VDD STB DATA CK RESET PW SW MUTE SW PRE NF B VDD MCU BIAS OUT BIAS OUT 10 µF 4.7 µF 4.7 µF RL RL VDD (a) (b) 10 µF 1 µF 0.47 µF 1 µF BIAS OUT 1 µF 0.47 µF 0.47 µF 0.47 µF 0.47 µF 1 µF 1 µF 1 µF Rg = 620 Ω 50 kΩ 50 kΩ Rg = 620 Ω 620 Ω Rg = 620 Ω 620 Ω 0.22 µF 0.22 µF 10 µF SW1a (b) (a)(a) Rg = 620 Ω (b) SW1b 620 Ω Rg = 620 Ω 620 Ω SW2a (b) (a)(a)Rg = 620 Ω (b) SW2b SW3 (a) (b) SW4 0.47 µF 0.22 µF 10 µF 4.7 µF 2.2 µF 2.2 µF TB2173FTG

Example Application Circuit 1 (1.5-V OCL) 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 C-SW GND IN2 A VOL OUTA PRE INA PRE INB VOL OUTB IN2B IN1A IN1B PRE GND MODE TC MUTE TC BEEP VCC1 BIAS IN OUT ADJ RF BIAS OUT LPF1 BST NF LPF2 BEEP OUTA OUT A OUTC PW GND OUT B BEEP OUT B VCC2 BST TC AGC DET AGC IN BST OUT PRE NFA VDD STB DATA CK RESET PW SW MUTE SW PRE NF B VDD MCU BIAS OUT BIAS OUT 10 µF 4.7 µF 4.7 µF RL RL VDD 10 µF 1 µF 0.47 µF 1 µF BIAS OUT 0.22 µF 0.22 µF 10 µF 0.47 µF 0.22 µF 10 µF 4.7 µF 2.2 µF 2.2 µF TB2173FTG Music INTuner IN 0.47 µF 0.47 µF 1 µF 1 µF 1 µF 1 µF

Example Application Circuit 2 (3-V output coupling, without low-frequency boost) 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 C-SW GND IN2 A VOL OUTA PRE INA PRE INB VOL OUTB IN2B IN1A IN1B PRE GND MODE TC MUTE TC BEEP VCC1 BIAS IN OUT ADJ RF BIAS OUT LPF1 BST NF LPF2 BEEP OUTA OUT A OUTC PW GND OUT B BEEP OUT B VCC2 BST TC AGC DET AGC IN BST OUT PRE NFA VDD STB DATA CK RESET PW SW MUTE SW PRE NF B MCU BIAS OUT BIAS OUT 10 µF 4.7 µF 4.7 µF VDD 10 µF BIAS OUT 10 µF 0.47 µF 0.22 µF 10 µF 4.7 µF 2.2 µF TB2173FTG Music INTuner IN 0.47 µF 0.47 µF 1 µF 1 µF 1 µF 1 µF BIAS OUT 220 µF RL 220 µF RL

Weight: 0.05 g (typ.)

RESTRICTIONS ON PRODUCT USE 060116EBA

• The information contained herein is subject to change without notice. 021023_D
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizi ng TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handli ng Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. 021023_A
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. 021023_B
• The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_Q
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. 021023_C
• The products described in this document are subject to the foreign exchange and foreign trade laws. 021023_E About solderability, following conditions were confirmed
• Solderability (1) Use of Sn-37Pb solder Bath
• solder bath temperature = 230°C
• dipping time = 5 seconds
• the number of times = once
• use of R-type flux (2) Use of Sn-3.0Ag-0.5Cu solder Bath
• solder bath temperature = 245°C
• dipping time = 5 seconds
• the number of times = once
• use of R-type flux