TA8552AFN TOSHIBA | Alldatasheet
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TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC The TA8552AFN is PLL DATA SYNCHRONIZER for Digital Audio Tape (DAT) strteamer, Digital Data Storage (DDS).
FEATURES
@ The TA8552AFN incorporates edge detector, data SN Vo =x —< eee synchronizer, and latch for data separator. as Ww > Also the TA8552AFN is available to correspond to x1, x2 . and x3 of data transfer rates by adjusting external devices. The dat, hronizer i lable t d to +7% SSOP30-P-300-0.65 e r je data synchronizer is avalable to correspon 0 t/h Weight : 0.179 (Typ.) variation of data transfer rate. @ By employing full differential signal processing in PLL loop, the TA8552AFN eliminates the influence of external . PIN CONNECTOION noise. Fast & stable locking is realized by switching between TOP VIEW the frequency detective mode and the phase detective nc H1C 308 cos mode. rvcor M2 29MM coa . ly vol asy Vy acno2 M3 28MM acnot @ Operating power supply voltage range : 4.5V to 5.5' evco: 4 a7 Mh rce2 @ Small package ; SSOP30-P-300-0.65 Rvcoz BS 26M RCPI cvco2 6 25 AVCCI aver 7 24 veTsen Handle with care to prevent devices from deterioration by twont Me 23 TsTCLK static electricity. Twonz WS 22 overs xtmonz 10 21 par vimo M1 20 pack MODESEL 12 19 DGND3 tstcpme 13 18M tstseL2 ro Wt 17 WE ReFcLK xro M15 16MM TsTseut 980508EBA2 © TOSHIBA is continually working to improve the quality and the reliability of its products, Nevertheless, semiconductor devices in general can malfunction or fail due, to theit inherent electrical sensitivity and vulnerability to physica stress itis the responsibilty of the buyer, when utlizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. @ The products described in this document are subject to foreign exchange and foreign trade laws. @ The information contained herein is presented only as a guide for the applications ‘of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. @ The information contained herein is subject to change without notice 1998-06-15 1/15
O O—-O—O rercux C) )> Frequency Detector Detect COA RoC) © Edge feo] ress xno © | Detecter O CoB : 7 LL IL PBCK PBDT TSTCLK TSTSEL1 RvCO1 RVCO2 CVvCO1 CVCO2 TSTSEL2 7998-06-15 2/15
| PIN No. | PIN NAME FUNCTION IN/OUT NC Terminal (open at normal use) — 2 RVCO1 VCO adjusting terminal. Connect an external resistor (RyCO1) between Vcc. AGND2 Analog ground for VCO. [ — | VCO adjusting terminal. Connect a capacitor (Cyco) between this cvco1 . . pin and pin6. 5 Rvco2 VCO adjusting terminal. Connect an external resistor (RyCO2) between Vcc. VCO adjusting terminal. Connect a capacitor (Cyco) between this cvco2 . : pin and pin4. AVCC2 analog power supply voltage for VCO. | — | | 8 —_[TMON1 NC terminal (Open at normal use) | — | [9 [TMON2 [NC terminal (Open at normal use) — | 10 _[XTMON2_[NC terminal (Open at normal use) | — | " Vv TILo Input terminal for TTL Voh (high voltage level of pin20, and = pin21 output) limitting. Input terminal for switching the Normal mode and the Serching . 12 MODESEL mode. (H : Normal mode, L ; Serching mode) Lin TSTCPMP [NC terminal. (Open at normal use.) | — | . ECL-in or | fro Input terminal of Data (Normal phase) Input terminal of Data (Reverse phase). XRD (This terminal is active when TSTSEL1=L and TSTSEL2 =H. (ECL-in) Otherelse, short with Vcc.) TSTSEL1 Input terminal for Test Mode selecting. (Refer the chapter of “Test Mode”) Reference clock input of frequency synchronizer. TSTSEL2 Input terminal for Test Mode selecting. (Refer the chapter of “Test Mode”) | 19 |DGND3__[ Digital ground for TTL output — PBCK Output terminal of Data Latch Clock. } 21 | PBDT Output terminal of Data Latch. Digital power supply voltage for TTL output. | — | Input terminal of x1/2 vco test clock. Input terminal for switching the frequency detective mode and the phase detective mode. . DETSEL (L : the frequency detective mode TTL-in H: the phase detective mode.) Analog power supply voltage. [ — | 1998-06-15 3/15
[rv [wane] crow «| 26 RCP1 Adjusting terminal of Charge pump at normal mode. Connect an external resistor (Rep1) between GND. 7 RCP2 Adjusting terminal of Charge pump at normal mode. Connect an external resistor (Rep2) between GND. [28 [AGNDT [Analog ground — Connecting terminal of loop filter. Connect an external loop filter COA woe . between this pin and 30pin. Connecting terminal of loop filter. Connect an external loop filter COB oe : between this pin and 29pin. ABSOLUTE MAXIMUM RATING (Ta = 27°C) PARAMETER SYMBOL RATING UNIT Supply Voltage AVEE Input Voltage -0.3~Vcc +0.3 Output Voltage -0.3~Vcec +0.3 Storage Temperature -55~150 RECOMMENDED OPERATING CONDITION PARAMETER SYMBOL CONDITION | mn. | tye. | max. | UNIT Supply Voltage Lave [Si SS Operation Temperature | Tor | +i -s | - |] | POWER SUPPLY (Unless otherwise specified, Ta=27°C, Vcc =5.0V) PARAMETER SYMBOL CONDITION | mn. | tye. | max. | UNIT TSTSEL1 =H, TSTSEL2 =L myoom — [ ace eee | | Lele 1998-06-15 4/15
ELECTRICAL CHARACTERISTIC (Unless otherwise specified, Ta =27°C, Vcc = 5.0V) TEST PARAMETER SYMBOL TEST CONDITION fn. | ve. max UNIT CUIT High Level . . Low Level “ - High Level A . Low Level ° . High Level - ; Vec Input Voltage (2) VIHE | - | ECL input pins -10 Vv Low Level - . Vec Input Voltage (2) VILE | - | ECL input pins |- | - | -1.5 v High Level . . Low Level . . oe Ed High Level Vv TTL output pins VTITLO VTITLO v output Voltage (1) OH loH = 400A ~0.2 +0.2 Low Level TTL output pins Output Voltage (1) Vou | - | lol =4mA 1.0 v . . TTL output pins 1.5V to 3.5V coe [vor [lense mmrerers | — [Ts . TTL output pins 3.5V to 1.5V Input Voltage Range to VTTLO terminal vTTLo 27 3.3 v *1 ; Design guaranteed value. CHARGE PUMP (Unless otherwise specified, Ta=27°C, Vcc =5.0V) TEST PARAMETER SYMBOL CONDITION ran | ve, [as UNIT CUIT Range of Output [= [atnormal mode [sof —-|[—]|, current setting cP [| — [At serching mode 2) — | — | so0| “ Accuracy of Output | | — At normal mode | 6 | — | +6] Current Setting acu [ — [At serching mode [ -s| — | +8] Between COA pin and COB *1 ; Output current is set by an external resistor (Rcp1), as following ; 2x 1.3/Rep1 = (Output current at normal mode). *2 ; Output current is set by external resisters (Rcp1, Rep2), as following ; 2x 1.3/Rep1+8X1.3/Rep2= (Output current at search mode). (Note) The above values are all at open loop. 1998-06-15 5/15
VCO (Unless otherwise specified, Ta =27°C, Vcc = 5.0V) TEST PARAMETER SYMBOL CONDITION fa | re. fax UNIT CUIT Rvco1 =3.75kO. Input Voltage of VCO Ryco2 = 1.21kQ (v(COB-COA)) Yvco Cyco = 39pF ay] O25 v fyco = 28.224MHz Rycoi = 3.75kO. Upper Limitation of f Ryco2 = 1.21kQ 29.5 VCO Frequency max Cyco = 39pF bal : V (COB-COA) = 0.6V Rvco1 =3-75kQ. Lower Limitation of fon Ryco2 = 1.21k0 VCO Frequency min Cvco = 39pF *4 V (COB-COA) =-0.6V Rvco1=3-75kQ. Ryco2 = 1.21kO Control Gain (F/V) Gyco Cvco = 39pF *4 7.7 MHz/ Voltage (COB-COA) Excursion 0.3V to -0.3V - - PBCK pin *1; Cyco inclides the package capacitance. *2 ; Design guaranteed value. (Note) The above values are all at open loop, measured at the PBCK pin CLOSED LOOP (Unless otherwise specified, Ta =27°C, Vcc =5.0V) TEST [_ranameren [seman [SR°/ —_conomon | an | 0, [ra | ur CUIT VCO Jitter in Closed tit2n In search mode lock to REFCLK Loop J VCO Jitter in Closed tit2s In normal mode lock to RD ns Loop u Values of external parts are (Ryco1=3.75kQ, Ryco2=1.21kQ, Cyco =39pF (Including storage capacitor), Rcp1 =8.25k, Rcp2 =30.1k). 1998-06-15 6/15
The connection of input voltage and output frequency of VCO (measured at PBCK after the 1/2 frequency counter) is written as following ; =— -(lotl Vin >2V,
8 Cyco AV (lo + lofs) (Vin>2Vop)
f ; (10 Vins “2 sof) 2Vop>Vin> -2Vop) = (Oey OY a> vco. 8-Cyeg “AV Wop int > lofs op? Vin op) 1 | (Vin< -2Vop) 3-Cyco AV lofs in op: Where ; Cyco is an external capacitor between 4pin and 6pin, AV =0.35V, Vop =0.275V, Vin is the input voltage of VCO (differential), Iq =3 x 1.3/Ryco1, and lofs=2 Xx 1.3/Ryco2- fuco a 8Cyco AV 1 i = tlors ' i 1 i 1 1 H 1 i lors H H 8Cyeo AV i ' ' t I i VIN -2Vop 0 2Vop So, the gain of VCO is defined as following (at PBCK) ; 1 lo 8-Cyco AV. AVop 1998-06-15 7/15
And, Upper limitation f upper, and Lower limitation of VCO frequency f lower is defined as follows; fupper = (lo + lofs) /8Cyco 4V flower =lofs/8Cvco 4V 10 can be determined by selecting Ryco1, and | ofs can by Ryco2. So, you can independently determine the gain of VCO, upper limitation and lower limitation of VCO frequency by selecting Cvcor Rvcot, and Ryco2- [ Example] When, Cyco = 22.1pF, Ryco1 = 2-6kQ, Ryco2 = 2.6k0, in of 1.3/(2.6 x 10?) x3 Gain of VCO “3 x 22.1 x 10-7 x0.35 x4 x0.275 =22MHz/V Upper limitation 4 3/(2.6 x 10%) x3-+1.3/ (2.6 x 102) x2 8 x22.1 x10" "x 0.35 Lower limitation 1.3/(2.6 x 103) x2 of VCO frequency ; x22.1x10-"x035 = 16.2MHz f Gain; 22MHz/V 1 fi i 1 i fi fl 16.2MHz i H i i 1 i i i v -0.55V ° +0.55V 1998-06-15 8/15
FUNCTION DESCRIPTION : The angular frequency (wp) and dumping facter (f) are adjusted by external devices. The setting procedure is shown as following. The setting conditions to lock PLL inside a constant time ; © Data transfer rate : 28.224Mbps (f)y = 28.224MHz) @ The capturing signal of PLL : The rectangle wave of 14.112MHz (Data pattern is 101010...), The term of this data is continuous 180 bits. @ The capturing time of PLL: 1/(14.114 x 108) x 180 = 12.75 x 10-®s [ The transfer function of PLL] Phase Comparater Loop Filter vco 9 249) Ko/s ~ Cu 85 G2 Ry 1/2 Counter The transfer function (F (S)), the angular frequency (wp), and the dumping facter (£) of the above composition are defined as following (However C,2 is ignored as C,2<C,}) : K on =( cu )1/2 — RLCL1@n f= 2 [ Calculation of €] The dumping factor (f) is set to 0.7 as the most stable response characteristic. Besides wy t is assumed to set as 6. 1998-06-15 9/15
[ Calculation of wy) The capturing time of PLL is expected as above 11.5ys. Therefore (wy) is deternimated as the following : [ Calculation of Kg (VCO control gain) } Kg is determined as the following ; Kg = 40MHz/V = 251.3Mrad/V [ Calculation of K¢ (phase detector gain) ] K¢ is estimated as the following (The current of charge pump is set as +50A.) 1 1 2 2x The current of charge pump (Ichp) is set by an external resister (Rep1). connected with Rept (26pin). When “H” level voltage inputs to MODESEL (12pin), Ichp is set as the following : Ichp =2 x 1.3/R¢epy > Rcpy =2% 1.3/Ichp =2 x 1.3/50x 10-6 =52 x 10°90 Therefore, when Rcpq is 52kQ, Ichp is set as +50A [ Calculation of external devices of loop-filter ] Kg x Ky 3.98 x 10-6 x 251.3 x 10° Cyr= KAXKO _ 3.98% 107° 251.3% 10" _ 1800 10-"F 2an 2x (522 x 10%)? 2 2x0.7 ape ee La sx ttn CL1 wn 1800 x 10-2 x 522 x 10? CL =CL1/ 10 = 180pF 1998-06-15 10/15
MODESEL SWITCHING FUNCTION The TA8552AFN has a function to correspond with the high-speed serching mode of DAT streamer. In the searching mode, the data transfer rate will shift with small percentage error. The TA8552AFN is available to solve this problem by extending the lock-in-range (4w ). In the serching mode the current of charge pump will be increased to raise the phase detecter gain, then the lock-in-range (4@,) will extend. This function is selected by MODESEL (12pin). (H : normal mode/L : searching mode) [ Calculation of the charge pump’s current in the searching mode] The charge pump's current in the searching mode is estimated as the following (The shift rateX of data, transfer is assumed as X=7% in this example) ; fu x X x27 28.224 x 10x 0.07 x2 «3.14 RxKg 1.5x 103 x 251.3 x 10° When “L” level voltage inputs to MODESEL (12pin), the charge pump's current (Ichp) increases. In the normal mode, the charge pump’s current (Icp1) is set by an external resister (Rcp1). And in the searching mode, another current (lcp2). is set by an external resisiter (Rep2). adds to Icp1. This (Rep2) is the resister to be connected with RCP2 (27pin). The additional current (Icp2) is determined by the following : lep2 =8X 1.3/Rep2 Therefore, Rcp2 is estimated as the following : R 8x13 13.3 x 1070 P2330 x 10" -50x 10° MODESEL FUNCTION is summarized by the followings | move NORMAL HIGH-SPEED SEARCHING MODE MODE MODESEL (12pin) a Charge pump current Ichp lept lept + lep2 Setting definition [ 2x1.3/Rep1 | 2X 1.3/Rep1 +8X 1.3/Rep2 1998-06-15 11/15
4,704MHz, 360 pulse for x1-Speed 9.408MHz, 360 pulse for x2-Speed i 14.112MHz, 360 pulse for x3-Speed i i 1 synk-Byte ! DATA or | oz | 03 | va | 05 | vs | v7 | v8 ! 09 no —JrLE fF LF Le Locked by PLL Out of Edge Det ! 1998-06-15 12/15
(Note) TEST MONITOR OUTPUT TERMINAL se [11 fitinput rom am RO) SY PECK Opin) & PET @ipin) becomes disable ECL input from Tapin (RD) and Spin RO) | SY The internal PLL becomes disable, and the H H |TTL input from 14pin (RD) external clock from TSTCLK (23pin) becomes enable as input data signal. (Note) @ We commend the use of this IC under the comdition of ECL input from 14pin (RD) and 15pin (XRD) when (TSTSEL1, TSTSEL2) = (L, H) @ It is possible of the use of TTL input from 14pin (RD) when (TSTSEL1, TSTSEL2) = (L, L) 1998-06-15 13/15
When the data transfer rate is 28.224Mbps, the application diagram is shown below. S 1500pF a es Repo O.1ye asses Net Bacon (182 TC 133k Rycot vite ve «ec 27k RUCOT COA GND [3] GND 1500pF AGND2 ‘GND! [4] Fort al, or RCP2 Peay ats v Vee Fygoz cco raveer 27K Vee bq <_| Hi phase comparate mode Avcc2 DETSEL L/frequency comparate mode frsteux rons Ed 5) Ve rmon24t pvecs OUT OUT H/normal GND TSTCPMP TTL in 28.224MHz od Ta rsa poTILinmyp=-ECLin > Test set 1 Test set 2 1 i I Heo | aE XDATA in | | DATA in 1°! DATA in | t a ! 1998-06-15 14/15
SSOP30-P-300-0.65 Unit : mm 30 16 HABA ARAAARAeaG OORT aq; 9 wl oN HAHA ee aoe eHHe WOOOWMOOGOCO00d 1 i 15 0.3TYP 0.22+0.1 . ozo: prea 10.2MAX 9.7+0.2 N I NE st TOTP Ms irs) 8 3 als So 0.45+0.2 Weight : 0.17g (Typ.) TOO 99-06-15