TA8435 | DigiCamel IC Datasheet

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TA8435H TOSHIBA | Alldatasheet

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TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC PWM CHOPPER TYPE BIPOLAR STEPPING MOTOR DRIVER. The TA8435H is PWM chopper type sinusoidal micro step bipolar stepping motor driver. Sinusoidal micro step operation is accomplished only a _E clock signal inputting by means of built-in hard ware. — - S FEATURES Ce Ty) i Yorn ule! © 1 chip bipolar sinusoidal micro step stepping motor “Tw \\) uve driver. yee e it curren: 0 1.5A (AVE.) and 2.5A (PEAK). Output current up to 1.5A ( ) and 2.5A ( ) Hz1P25-P-1.27 @ PWM chopper type. Weight : 9.86 g (Typ.) @ Structured by high voltage Bi-CMOS process technology. @ Forward and reverse rotation are available. @ 2, 1-2, W1-2, 2W1-2 phase 1 or 2 clock drives are selectable. @ Package : HZIP25-P @ Input Pull-up Resistor equipped with RESET Terminal : R = 100kQ (Typ.) @ Output Monitor available with MO. Io (mo) = +2mA (MAX.) @ Reset and Enable are available with RESET and ENABLE. 980910EBA1 @ TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. Sire products described in this document are subject to the foreign exchange and foreign trade laws. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result, from its use. No license is granted by implication of otherwise under any. intellectual property or other rights of TOSHIBA CORPORATION or others. @ The information contained herein is subject to change without notice. 1999-08-05 1/25

Vee ™O VvMa ® ®) (2) A ua bs | $ 1 =e ne —— ‘a ue bs, ENABLE — @-3 RO RESET | RiveR cwrcew Gf Pecover fa {> k1 GS NFA : te 4 7 ma GRD ouTPuT —_ CURRENT ENABLE @P4> CONTROL ose (5 vue q — Cosc $B I pecover | BRIDGE © —— {2 ENABLE > DECODER TET] caver $8 ner In @-f> ™ Output reference value (VF) AN [| svi | |] cunnen cunt Ms 4 0.8v Typ, cuRRENT current |G) Coulee unarr conTRoL Ruee VNF oO (2) (@) SG PGA PG-B (Gignal GND) (Power GND A) (Power GND 8) Pull-up resistance : 100 kQ (Typ.) Pin®, @, ® : Non connection 1999-08-05 2/25

PIN CONNECTION (Top view) S-GND 1 Reset 2 ‘waste [43 osc [4 ewrcew [ds cx2 [6 ci (47 wif ds m2 _]9 REF IN 10 ‘wo (1 ne [12 Vee =] 13 ne (14 ve 15 gs 6 p-GnD-B [17 neg (J 18 est 9 ga 20 nea (421 p-cnp-a [____] 22 Py ee Fe) vma [24 nc [25 (Note) : NC : No connection 9999-08-05 3/25

Phe | svmsor [FUNCTIONAL Description | po Reet reser. SSSSSOSOSOSSSSSSCCCCCCSY [3 [ENABIE [UC ENABLE, HOF SSCSCSCSC—SY [4 [osc |chepping oscillation is determined by the external capacitor. | [5 | eW/CGW [Forward /Reverse switching terminal. | Ps [ck2 [clock input terminal SS [s_ [wi [Excitation control input ———SSSSSC—S [9 [m2 [xctation control input SiS P10 [REFN [Vp control input [ai [ WO [Monitor output ————SSC—~S [a [ "we [Wo connection SSS [15 [-vme [Output power supply terminal ————SSSCSC—*S pis [gs ouput gs SSS [18 Ng | B-ch output current detection terminal —————SSSS—=S OO 1'9799-08-05 4/25

~~ mnee. ° eet IP) > > {] Ty Se | Po | a 3 ‘ > eral wo A Yn NOISE CANCELER CIRCUIT Z <] Sa DECODER MAX output osc Vr = 0.8V i REF IN : “L" Level o} T) INPUT CIRCUIT @ CK1, CK2, CW/CCW, M1, @ RESET, ENABLE : Terminals @ OSC : Terminal < M2, REF IN: Terminals vos J 8° Vee — v v aig cc “T3 . g Ka 8 “ Q1 To ° R>o—d S— To Logic ° Rood >—> To Losic Va = Comparator GND- GND- ~ wtf) 100k of Pull-up Resister is equipped. Va = Wee - Wane 245V 1999-08-05 5/25

Sawtooth OSC circuit consists of Qy through Q4 and R1 through R4. Q2 is turned “off” when Vogc is less than the voltage of 2.5V + Vge Q2 approximately equal to 2.85 V. Vosc is increased by Cgsc charging through R1. Q3 and Qg are turned “on” when Vosc becomes 2.85 V (Higher level.) Lower level of V @ pin is equal to Vge Q2 + VsaT Qq4 approximately equal to 1.4V. Vosc is calculated by following equation. t Vosc = 5° (1 - exp (- Tocca) Joe © Assuming that Vosc = 1.4V (t = ty) and = 2.85V (t = tg) Cosc is external capacitance connected to pin® and R1 is on-chip 10 kQ resistor. Therefore, OSC frequency is calculated as follows. 1.4 ty = -Cosc RI €n (1 SO) eee eee 2) 2.85 tz = —Cosc RI €m (1 -S ) vere eeee erent ic) f 1 ! osc. = —— = 2-4 1.4 2.85 Cosc(R1- én (1 - > )-R1-€n(1 - >) = Sa5-Cosc (kHz) (Cosc : /F) 1999-08-05 6/25

ENABLE AND RESET FUNCTION AND MO SIGNAL lee alee = mee ee =) CE ‘a a a A OG ees a Fig.1 1-2 Phase drive mode (M1 : H, M2 : L) ENABLE Signal disables only Output Signal. Internal logic functions are proceeded by CK signal without regard to ENABLE signal. Therefore, Output Current is initiated from the proceeded timing point of internal logic circuit after release of disable mode. Fig.1 shows the ENABLE functions, when the system is selected in 1-2 Phase drive mode. wt ENABLE RESET +—— fp +++ ++— RESET =) PO} SEE ‘a a a SS | SO oy t t 2 %& 2 tt ty ts te ty tg Fig.2 1-2 Phase drive mode (M1 : H, M2 : L) Low level active of RESET Signal offs not only the Outputs but also stops internal CK functions and MO to low. Outputs are initiated from the initial point after release of RESET (High) as shown in Fig.2. MO (Monitor Output) Signals can be used as rotation and initial signal for stable rotation checking. 1999-08-05 7/25

MODE __|CURRENT| CURRENT. Pe PO Pa ey a fw few OS Z : High impedance Pop x]: Don't care ar | me] wtfstion_|

2 PHASE EXCITATION (M1 : L, M2 : L, CW MODE) 1-2 PHASE EXCITATION (M1 : H, M2 : L, CW MODE)

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W1-2 PHASE EXCITATION (M1 : L, M2 : H, CW MODE) wo wt | Ott itty yy GG TALE In 0 “TTT TETET TTT TET Ty yy ws tt | — [ TP TT ty tt yt . CEE TEE EE Ip 0 “TET YT TTT TT yyy Ty et to 1 2 B t4 5 6 v7 ts tg to ott t2 3 ta tts 6 ss TOSI oooommn—FSGE-OEOS VIS

2W1-2 PHASE EXCITATION (M1 : H, M2 : H, CW MODE) athe eae edad ate ote eT Op ne LeEE EP r errrrrr weet TTT TTT TTT TTT rrr rt PP Pe TT ott LET TTT TTT Tt eer te ee eee ee eT TT ot LET TTT ETT TT TTT ETT ETT ETT fe colLLETT ETT ET TTT TT TTT TT TT ET TE vottLET TT TT TT TT TT TT TTT TT TE EET TT este TTT TTT TTT TT rt te Peet Tet et EET TTT ET TTT ETT Pe eT Tet TT Pe et eg A A A A OO ey fg a (%) EEE EET ET * A GG BTEC EEE EEE eee eee na wit tT TTT TT Tt Trt rr re rt ree Pee ee ee oh LTT TTT TT TT TT TT PT TT TT ot TET TTT ETT TT TTT PT ETT ETT ET TTT oe col LETTE TTT TT EET TT ETT TET TT vol LTTE TTT TT TT TT ET ET ET TTT ET el 1 ee SE_-TTT TT TTT rr rT ttt tt rrr ee ee ee Pee TT a a a a a a ee -ofPP Pr pee eee to tr t2 t3 te ts te t7 tg to tro tr tra tr3 tra tts tre t17 tis tig t20 tai t22 t23 taa tas t26 t27 t28 t29 ta ta1 t32 TOOT 99-08-0525

ELECTRICAL CHARACTERISTICS (Ta = 25°C, Vcc = 5V, Vm = 24V) TEST CHARACTERISTIC SYMBOL | CIR- TEST CONDITION TYP. | MAX. | UNIT CUIT f Vec ese ow |v 1 |ENABLE, CK1, CK2 IN (L) RESET Input Hysteresis Voltage = | 600 | [mv] Mi, M2, REFIN, Vin =50V [| — | — | 100] nA | RESET, ENABLE, Vin = OV, Input Current 'IN-1() | 7 liNTERNAL PULL-UP RESISTOR 10 | 50 | 100 | HA UN-2(L SOURCE TYPE, Vin = 0V | — [| = | 100] na | Output Open, RESET : 4H, loca ENABLE : L 18 (2, 1-2 Phase excitation) Quiescent Current Vcc Output Open, RESET =: H, Terminal lec2 ENABLE : L (W1-2, 2W1-2 Phase excitation) Iec3 RESET : L, ENABLE : H [— [| 5] — ] f REF IN H — Set | a [|e | Reference 3 (Note) Vv Voltage Low vi REF IN L 0.5 9 NF (L) Output Open . ; ; B/A, Cosc = 0.0033 pF, _ 9 Output Differential AVo | - | Rnr = 0.8.0 10 % - VNNF (L)/ VNF (H) y VINE (H) ~ VINE (L) AVNE | - | Cose = 0.0033 uF, Ryp = 080] *° 70} % NF Terminal Current | Ip | — [SOURCE TYPE LD 70| — | Maximum OSC F kHz Frequency OSC (MAX.)| Minimum OSC OSC Frequency fosc__| = [tose = 0.0033 pF [35 [ae 62 ee | Minimum Clock Pulse Width ‘w(ck) 10 us Vout] — ion = 407A «dB | 8 | Vee | Output Voltage Vor(MO | ~ fion= 40a eno or | os] (Note) : 2 Phase excitation, Ruf = 0.7, Cosc = 0.0033 uF 1999-08-05 12/25

2 Phase Excitation

P= = J mf = | (Note) : Maximum current (@ = 0) : 100% 2W1-2¢ : 2W1, 2 phase excitation mode W1-2¢ : W1, 2 phase excitation mode 1-246 : 1, 2 phase excitation mode 1999-08-05 13/25

CHARACTERISTIC SYMBOL | CIR- TEST CONDITION TYP. |MAX.| UNIT cuIT IWiag]|WI2p [z=0_] [= [oo ae fawregl — | — | EET baa pee i NF = 0. VECTOR Cosc = 0.0033 uF % Current [awr2g — | — | T= 578] 08 “Ts05 [555 | 605 | ote) fawiag|wiag] — | T= 6/8 [35/40] 45 a0 = 1/8 2/8]: H Feed Back Voltage Step AVNF 40 = 3/8 — 4/8/0809 [53 | 93] 133 | mv af = 478 5/8] COSC = a0 = 5/8 — 6/8 | 00033 F [aa | 124 | 166 | ad = 6/8 - 718 [120 | 160 | 200 | RL = 2.0, Vin = OV, |= | o3[ — | C= 15pF [= 22, =] eee FE bh] CK~Output Output T, Switching ~ [= | s4{ — | Characteristics 7 [osc~Output [= Te3sT—] “ RESET~Output ENABLE~Output Output Leakage [Upper Side ve caov [-|-Tal Current Me [= T= To] “ (Note) : Maximum current (@ = 0) : 100% 2W1-2¢ : 2W1, 2 phase excitation mode W1-2¢ : W1, 2 phase excitation mode 1-246 : 1, 2 phase excitation mode 7999-08-05 14/25

VIN (H)+ (L)- HIN (H)» (L) oscilloscope a F7 Voc MO VM Oy HE ™@ TA8435H BX toad ° m2 © o gB ° sus o—ewicow (2) la td TE G| K toner REF IN TEST CIRCUIT 2 Ice. IM ae a8 "@ Ox oe q ® ‘ ° amd P i. RESET. NF, ae, La — B [ 2 CW COW G} [> bo ame | Lose gq 3, 1999-08-05 15/25

VNF (H)» (L) 3° T? @ © da Co 5 x, a re ES) pS NEa used fia 2 TEST CIRCUIT 4 VCE (SAT) UPPER SIDE, LOWER SIDE a° r @@Q bo ® cK1 q Vec VM [-\\—q x 6 oO | Fs —<4 TA8435H 2a J 5 an [ 4 J (Note) : Calibrate lo to 1.5A/0.8A by R,

999 O-OS TEES

Veu, VFL QA ; d vm ®O © @ On ones don Pa | @) TA8435H [p25 g a @ ® Q ows 66 s @) OO ? TEST CIRCUIT 6 lou: IoL zs HOA @ vi vi > q (<a M 3 @ 4 —-2 4 ba] @ TA8435H [fp oF q ose] @ [> , J | Fa °6 1 9799-08-05 17/25

AC ELECTRICAL CHARACTERISTICS, MEASUREMENT WAVE CK (OSC)-OUT cK (osc) 50% Toso) 50% 50% on) 50% VM won pe eee =e -- 90% 90% our 50% 50% 10% 10% np t t tpHL Pp - Ta TRANSIENT THERMAL RESISTANCE 2 sooo TT INFINITE HEAT SINK Rth (j-c) = 1.5°C/W. Pe A SO eT TTInE Tino wear sme Rete ecb ire > CT Co Ce SLL IE AA TT z ee TSH re a SD & ESS ae e “PPT PPeNEree 2 CHEE rcrw wear ne ||

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i) ™ FS ¢ 4 SSS of= HEH PH Pe Pr 3 [jet yt yy] fy eR a (rt Ps) og LU TTT TTT a eT TT) 13-5 10 3050 100 3005001000 3000 10000 AMBIENT TEMPERATURE Ta (°C) t @) 1999-08-05 18/25

OUTPUT CURRENT VECTOR ORBIT (Normalize to 90° for each one step) - 100; rf FT TT (2 PHASE ONLY) ~ 83] / SO | |) Zaecane a 0 20 40 355 71463 91 100 la | aa tse 37 | t00 | tor.98 | | a4 | ass Tas? | t00 | 100.97 | 141.42 | 1999-08-05 19/25

Vee = 5V ° @} vec vue [> © vm = 24V (Note 3) #” — "(Note 3) ' vma BD 1 1 @|ino ck GJ cx: aD _ _ = Gee ©) CPU ws cCw 0 3) cwsccw RESET Qisa pa oe fe? o ENAGLE __.G) ENABIE < 2 H/L 3} m1 os Qi2w Nep [23 H/L 3} m2 HL rer ww nea [ 3 o D@ GND (Note 1) : Schottky diode (3GWJ42) to be connected additionally between each output (pin 16/19/20/23) and GND for preventing Punch-Through Current (Note 2) : GND pattern to be laid out at one point in order to prevent common impedance. (Note 3) : Capacitor for noise suppression to be connected between the Power Supply (Vcc, Vm) and GND to stabilize the operation. (Note 4) : Utmost care is necessary in the design of the output line, Vjy and GND line since IC may be destroyed due to short-circuit between outputs, air contamination fault, or fault by improper grounding. 1999-08-05 20/25

Introduction The TA8435H controls PWM to set the stepping motor winding current to constant current. The device is a micro-step driver IC used to efficiently drive the stepping motor at low vibration. 1. About micro-step drive The TA8435H drives a stepping motor in micro steps with a maximum resolution of 1/8 of the 2- phase stepping angle (in 2W1-2 phase mode). In micro steps, A-phase and B-phase current levels are set inside the IC so that the composite vector size and the rotation angle are even. Just inputting clock signals rotates the stepping motor in micro steps. 2. About PWM control and output current setting (1) Output current path (PWM control) The TA8435H controls PWM by turning the upper power transistor on/off. In such a case, current flows as shown in the figure below. VM am a 3 ——_ DRIVE CURRENT Ql: ON, Q2: OFF Lem 4] (3 OFF, Qa: ON ) Q2 4 --—e RECIRCULATION QI: OFF, Q2 : OFF j (33 of ge on ) (2) Setting of output current by REF-IN input and current detection resistor The motor current (maximum current for micro-step drive) Ig is set as shown in the following equation, using REF-IN input and the external current detection resistor RF. lo = VReF/RNF where, REF - IN = High, Veep = 0.8V REF - IN = Low, VpeF = 0.5V 1999-08-05 21/25

Logic control (1) Clock input for rotation direction control To switch rotation between forward and reverse, there are two clock input types: 1-clock input and 2-clock input. (a) 1-clock input Uses either clock pin CK1 or CK2. Switches rotation between forward or reverse using the CW or CCW signal. <Input signal example: 1-2 phase mode> 100 voeefeeesedoseeeeebesssnedeceesn foes beedecdives sescobeseeeed vsseeduvcsssebeeseuse lg Oereefseesefeneeel chewed : sdesseeeden 5 cose deeeenebeseeeeee ~100 occccedeeeeeesbesseeedienbeed E casedeeeeeed . (b) 2-clock input Uses both clock pins CK1 and CK2. Switching between CK1 and CK2 controls forward / reverse rotation. <Input signal example: 1-2 phase mode> 100 reforseebeoenrbrseaborn svvndiene be essed arseosened sesnrbnseeee ly Oereeeseeefseeeeefummcsseefseeeefceesedmmmb csssedisseeedeseee emmy ccssschesssedesebene -100 Besesseboverserbneseeedaneend Brvessscheseeeed Bosse 1999-08-05 22/25

(2) Mode setting Setting M1 and M2 selects one of the following modes: 2-phase, 1-2 phase, W1-2 phase, and 2W1-2 phase modes. (3) Monitor (MO) output Supports the monitor output used to monitor the current waveform location. For 2-phase mode, MO output is Low at the timing of A-phase current = 100% and B-phase current = — 100%. For 1-2 phase, W1-2 phase, or 2W1-2 phase mode, MO output is Low at the timing of A-phase current = 100% and B-phase current = 0%. (4) Reset pin Supports reset input used to reset the internal counter. Setting RESET to Low resets the internal counter, forcing the output current to the same value as that when the MO output is Low. (5) Phase mode switching To avoid the step changing during motor rotation, current must not fluctuate at phase mode switching. Pay attention to the following points. (a) When switching between 2-phase and other phase modes, current fluctuates. (b) When switching between phase modes other than 2-phase, current can be switched without fluctuation at the timing of MO output = Low. However, when switching as follows, set RESET to Low beforehand: From 1-2 phase to W1-2 phase or 2W1-2 phase mode From W1-2 phase to 2W1-2 phase mode <Example of Input Signal> kag eedessendecefeoe 2 Soke socechesendanseandove :. sede fo : on

100 SII EEIIEIIIEIIEEIUETIIET IIIT] ee

About PWM oscillation frequency (external capacitor setting) An external capacitor connected to the OSC pin is used to internally generate a sawtooth waveform. PWM is controlled using this frequency. Toshiba recommend 3300 pF for the capacitance by taking variation between ICs into consideration. 5. About external Schottky diode A parasitic diode is created on the lower side of the output. When PWM is controlled, current flows to the parasitic diode. This current results in a punch-through current and micro-step waveform fluctuation. Therefore, make sure to externally connect a Schottky barrier diode. The external diode can reduce heat generated in the IC. 6. Power dissipation The IC power dissipation is determined by the following equation (In a case where shottky diode is connected between Output pin and GND): P = Vcc x Icc + VM x IM + IQ (ton X VsaT-U + Vsat-L) ton = ToN/Ts (PWM control ON duty) The higher the ambient temperature, the smaller the power dissipation. Check the Pp-Ta curve and design heat dissipation with a sufficient margin. 7. About heatsink fin processing The IC fin (rear) is electrically connected to the rear of the chip. When current flows to the fin, the IC malfunctions. If there is any possibility of a voltage being generated between the IC GND and the fin, either ground the fin or insulate it. 1999-08-05 24/25

HZIP25-P-1.27 Unit : mm 5,010.3 30.040.2 ot | i —* G— 3 Ke 3 — + €t+— & 3 er py i Ce g| 2 Ee | 2 | mie) s HWA H H H H H H HITATAIA H Pr i 1 2 ffl Ht ) ¢ fy 3 il 2.575TYP i | | oa8s, 36.5MAX 36.020.2 FELL EREEEREEE) 1 25 Weight : 9.86 g (Typ.) TTT 1999-08-05 2525

Product Information

TA8435 specifications and overview.

Summary

PWM CHOPPER TYPE BIPOLAR STEPPING MOTOR DRIVER

Description

PWM CHOPPER TYPE BIPOLAR STEPPING MOTOR DRIVER

Source title TA8435 Datasheet(PDF) - Toshiba Semiconductor

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