TA8000F TOSHIBA | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 7
Technical content
TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC The TA8000F is an IC specially designed for micro- computer systems. It produces an output voltage of 5+0.25V without need for adjustment from its accurate reference voltage and amplifier circuit. At power-on, it outputs a reset signal to reset the system. It will also output a reset signal when the 5V output voltage drops below 85% because of external ———— disturbance or other problem. It also incorporates a a ss) watchdog timer for self-diagnosing the system. When the Qe PAKS * system malfunctions, the IC generates reset pulses SHC intermittently to prevent the system from running away.
FEATURES
© Accurate output :540.25V SOP14-P-225-1.27 © Output voltage adjusting pin attached Weight : 0.29 (Typ.) @ Power-on reset timer incorporated @ Watchdog timer incorporated @ Wide operating voltage range : 40V (max.) © Operating temperature range : from -40 to 85°C @ Load dump protection : 80V (max.) (1 second) @ SOP-14 pin BLOCK DIAGRAM AND PIN LAYOUT out NC BIAS NC ck NC 1c i a <j > WaTcHDOG TIMER mee =A be a cOMP NC Veo GND ADS NC RESET 961001EBA2 © TOSHIBA is continually working to improve the quality and the reliability of its products, Nevertheless, semiconductor devices in general can malfunction gr fal due to their inherent electrical senstvity and vulnerability to physical stress. tis the responsibility of the buyer, when utlizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. @ The products described in this document are subject to foreign exchange and foreign trade control laws. @ The information contained herein is presented only as a guide for the applications ‘of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. @ The information contained herein is subject to change without notice. 1998-02-10 1/7
Powe [swore id [1 | COMP [Phase compensation pin for output Sabilzation ————SS—SC—CS—SCS [2 | vee [eet pint PP tert eri The ova votegs on ao Be aes at this pin. [4 | 6ND [Grounded SCS Output voltage adjusting pin. The voltage will increase when a resistor is ADI inserted between ADJ and GND. It will reduce when a resistor is inserted between ADJ and Vcc. It will become 10V when ADJ and GND are directly connected. NPN transistor open-collector output. (1) The signal goes low when the output drops below 85% of the specified level.
7 RESET (2) The pin supplies a reset signal determined by the CR combination
connected to the TC pin. (3) The pin supplies reset pulses intermittently if no clock is given to the CK pin. This function is useful when the IC is used as a watchdog timer for a microcomputer system. [8 | TeFime setting pin for the reset and watchdog mes only as a power-on reset timer. Power supply starting pin. The starting current is supplied through a resistor to which the input voltage is applied. The output current from this starting current is as follows : 12 BIAS lout (pin 12) = 30x (Vin -0.7)/(15 +R4) (mA) where Rj is the external resistance attached to pin 12 (kQ). When Vcc rises above 2.7V, the starting current is absorbed in the internal circuit ; instead, IouT is supplied via Vcc. Connected to the base of an external PNP transistor so that the output voltage is stabilized. Power supply design suitable for particular load 14 OUT capacities is thus possible. Since the recommended maximum IguT is 8mA, an output current of 300mMA is assured if the external transistor has an Hre of 40 or more. 1998-02-10 2/7
VIN _l
1 CONSTANT VOLTAGE OF 5V
85% 85% Vee 9S coe i Te 0 7 | | cK 0 - ri JU
4 Trst (1) Two TRST (2) TRST (1)
MAXIMUM RATINGS (Ta = 25°C) CHARACTERISTIC SYMBOL RATING row vores ve [esto] | Input Voltage Vv cron loura | 4 | Output Voltage Vv
3 Vour2
[Power Dissipation | Pp | 280 | mw | Operating Temperature -40~85 Storage Temperature [Tag | =55=150_| °c] 260 (06) (Note) Vint : BIAS input VIN2 : CK input lout1, VouT1 : OUT output lout2, VouT2 : RESET output 1998-02-10 3/7
ELECTRICAL CHARACTERISTICS (Vin =6 to 17V, Ta=-40 to 85°C) TEST CHARACTERISTIC sewaol) rw |e TEST CONDITION fran | ve. | UNIT CUIT Line Regulation [=| Vee | = |Win = 6-0 [= [ort os | %_| Temperature Coeficent| — | Vec [=| — +| — | oor| — [xe] Output Voltage [Vor Rest? | — ligrsama Sid — [ — | sy v | Output Leakage Current | ILeak | RESET | — |Vour=10V [— [| — [| 5] aA | finput Current fin _| 1 | — |Vin=0=35V Ds — [3 [ea | _ y Threshold Voltage Tc Ee v savannas | = [eel | | 9 VREG [input Current [in| | — |Win=sv [= 03 [07 | ma | nowt vottge = yt} Eff tf At | Input Voltage Vv y y ry towns | = [vee [=[ =‘ isa Standby Curent [1s | Vee = [Vine 14V [— | 5] 65 | ma | wer [tw [mr = [= (eee = | mace vor] =[ = [alee — | — 150x | 300x | 600x Pecos frwvel er) —[ ee | RST (2) cr | cr | cr Note : Reset timer (1) : Power-on reset time Reset timer (2) : Watchdog reset time 1998-02-10 4/7
- Input-output characteristic 2. Reset Output Characteristic (RL =25Q, external transistor 2SA968-Y) COA CIA Let tt fot ie | etiTALTTITT) = EEE yy ; PETE Ey) Fe Pr s g ae ; Litt | Pot ‘| ALL YL tt rw | 4 4 6 8 % 2 4 6 8 vin ) vec W) EXAMPLE OF APPLICATION CIRCUIT TA8000F OOOO OMOMOMOMG ce PES vin © + ry © vreG GND O — 4 O GND * Cautions for Wiring 1. Cy and C2 are for absorbing disturbance, noise, etc. Connect them as close to the IC as possible. 2. C3 is for phase compensation. Also, connect C3 close to the IC. APPLICATION CIRCUIT OF WATCHDOG/ RESET TIMERS 1. TRst (1) =10ms-- Power-On Reset Timer TA8000F OM OMOM fag “ees +[% = GND 1998-02-10 5/7
- Trst (1) =1.5Two TRST (1) = 100ms Tws65ms TA8000F OO ® & PLes fe his = GND 3. Trst (1) =100ms, Twp=300ms Test (1) = V6er qe TA8000F Two=l.1CrRTy @ OMOM® ; 20 “ ie eu — GND 4. Recommended Conditions PART NAME | mn. | max. UNIT [rr | 5 | 100 | ko | [arr [00k] RriWRq2(Note)| 5 | — [ko | (Note : Ry //RT2 =(RT1 x RT2) /(RT1 +RT2) CK INPUT APPLICATION CIRCUIT Capacitor Coupling Timing Chart mo™ m TA8000F “woes | | | ve ck The capacitor coupling allows reset pulses to be supplied intermittently from the RESET pin whether the input level (IN) is high or low. 1998-02-10 6/7
SOP14-P-225-1.27 Unit : mm 14 8 ; Zz al 2 = | 2 wll = rE yg (le & vt] g@ 1 7 -19TYP. |. : >| 10.5MAX 10.0+0.2 a x 8 < <3 = 3 pal 8 o 0.525+0.2 Weight : 0.2g (Typ.) 1998-02-10 7/7