T6M14S

T6M14S TOSHIBA | Alldatasheet

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TOSHIBA T6M14S,JT6M14-CS TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC T6M14S, JT6M14-CS i T6M14S, JT6M14-CS CMOS 1 CHIP LSI FOR LCD ELECTRONIC CALCULATOR The T6M14S, JT6M14-CS is a 1 chip microcomputer for 10-digits 1-memory electronic calculator. T6M14S, JT6M14-CS can drive the liquid crystal display (LCD) . —WN Single power supply operation, low power consumption make it suitable for solar battery or battery operated <y —a pocketable calculator. De ant

FEATURES

© 10 digits of data and 1 symbol digit for calculator. LOFP60-P-1414-0.80 . . Weight : 0.66g (Typ.) @ Algebraic calculation mode. @ Punctuation. @ Standard 4 functions(+, -, x, +), Square root, percent with automatic add-on /discount, mark up calculation, automatic constant calculations, chain calculations, memory calculations with memory overflow protection. @ Internal keyboard decoding and denouncing. @ Complementary output buffer for direct driving of liquid crystal display (LCD : FEM type -3.0V, 1/2 bias, 1/3 duty). @ Single power supply (-1.5V typ.) . ©@ Quad in line flat package (60 PIN) . @ Very low power consumption (2.85W typ. at wait) . @ Very wide range of operating voltage (Vss1 = - 1.2~ -2.0V). 9809 10EBA: @ TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fall due to thei inherent electrical sensitivity and. vulnerability to physical stress. it's the responsibilty of the buyer, when utlizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified Operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook G The products described in this document are subject to the foreign exchange and foreign trade laws The Jnformation contained herein 's presented only as a guide for the applications, of our products. No responsibilty is assumed by, TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. © The iHformation contained herein is tubject to change without notice. 1998-12-01 1/34

TOSHIBA T6M14S,JT6M14-CS SYSTEM DIAGRAM Battery Type iF Ca Bg Ag C7 87 A7 CG BG AG C5 B5 As Ca Bq Aq | Ag 3 41} 55 B32 aa | c3 a3 [28 42) 10 © 21810 82 PS C10 a Fr 0st T6M 14S, JT6M14-CS a Voo Voo os2 (TOP VIEW) 5 TS2 AY Bh Cy (+) os3 22 2(-) coms BI) Vcso com2 H®

2 NC com }t

~ ANC 1S3__ RESET a NC TS4Vsg1_TS1_Kg_K7_K6 K5 Ka _K3_K NC _NC Pe Pe Fee PR | | [= [+ fe A [= |e (NOTE) TS1 and TS2 have pull up Tr, enable to connect Vpp. TS3 has pull down Resistance, enable to connect Vss1. Vpp °":Off mode disable. rsa {po ++ Off mode enable. RkeyS 20k (- 1.2V) S135kQ (- 1.5V) 1998-12-01 2/34

TOSHIBA T6M14S,JT6M14-CS Dual Type iF Ca Bg Ag C7 87 A7 CG BG AG C5 B5 As Ca Bq Aq | Ag 3 41} 55 83 2 aa | c3 ag [22 42) ato fod 21810 82 PS Go A2 4 0st T6M 14S, JT6M14-CS a Voo Voo os2 (TOP VIEW) 5 TS2 AY Bh Cy (+) os3 22 2(-) coms a 52 come H ~ ANC 1S3__ RESET a NC TS4Vsg1_TS1_Kg_K7_K6 K5 Ka _K3_K NC _NC Pe Pe Fee PR 7 2 [= [+ fe A [= |e (NOTE) TS1 and TS2 have pull up Tr, enable to connect Vpp. TS3 has pull down Resistance, enable to connect Vss1. Vpp °":Off mode disable. rsa {po ++ Off mode enable. RkeyS 20k (- 1.2V) S135kQ (- 1.5V) 1998-12-01 3/34

TOSHIBA T6M14S,JT6M14-CS Solar Type iF Ca Bg Ag C7 87 A7 CG BG AG C5 B5 As Ca Bq Aq | Ag 3 41} 55 83 2 aa | c3 a3 [28 42) ato fod 21810 82 PS Go A2 4 0st T6M 14S, JT6M14-CS a Voo Voo os2 (TOP VIEW) 5 TS2 AY Bh Cy (+) os3 22 2(-) coms BI) Vcso com2 H® ~ ANC 1S3__ RESET a NC TS4Vsg1_TS1_Kg_K7_K6 K5 Ka _K3_K NC _NC © [= fe | fms [Pee] we Pe Te Te Fee 7 2 [= [+ fe A [= |e (NOTE) TS1 and TS2 have pull up Tr, enable to connect Vpp. TS3 has pull down Resistance, enable to connect Vss1. Vpp °":Off mode disable. rsa {po ++ Off mode enable. RkeyS 20k (- 1.2V) S135kQ (- 1.5V) 1998-12-01 4/34

TOSHIBA T6M14S,JT6M14-CS CONNECTION OF LCD SEGMENT COMMON 888 600 ware ware ware) war) wat) oT stp ota Qt Qin 6 6 EB HEHE HEB HEE EB HHH re UVa Ve Ve Ve Ve Ve Ke VQ HV PIN LAYOUT CPLOSLGESLGESLSST 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 Ag 46 30 C3 Bg B47 29 fle3 co Be 28 As Aro B49 27H Bio 50 26 fl 8) Co St 25 a2 osi 52 voo M53 T6M14S i - os2 54 a 1s2 55 (Tor view) 2A C1 (+) B56 20 ff os3 co(-) B57 19 coms Vss2 B58 18 fl coz Nc B59 17. com nc if 60 oA ha 1.2.3 4 5 6 7 8 9 101112131415 YE Rpg eoerrooNy 1998-12-01 5/34

TOSHIBA T6M14S,JT6M14-CS SPECIFICATION OF CALCULATOR Operational Features (1) 10 digits of data and 1 symbol digit. (2) Algebraic mode. (3) Full floating point. (4) Standard 4 functions +, -, x, =. (5) | Memory calculation. (6) Square root. (7) | Percent with automatic add-on and discount. (8) | Constant calculation (Automatic constant) . (9) Chain calculation. (10) Leading zero suppression. (11) Trailing zero suppression. (12) Mark up calculation. Capacity of Calculation (1) Numeral entry 10 digits (2) Addition / Subtraction 10 digits + (-) 10 digits=10 digits (3) Multiplication / Division 10 digits x (+) 10 digits=10 digits (4) | Memory calculation 10 digits + (-) 10 digits =10 digits (5) Square root V10 digits = 10 digits Display Font M ea 7 U1 "c en fn an ErlLido'ittu tll tu, Overflow Condition (1) When division by zero is attempted, an overflow condition will result, and error symbol “E” and a zero are displayed. (2) When the integer part of result exceeds 10 digits, the display will show 10 most significant digits of result divided by 10*'° and “E”. (3) | When the integer part of result exceeds 19 digits, display will show a zero and “E”. 9998-12-01 6/34

TOSHIBA T6M14S,JT6IM14-CS (4) | When the integer part of result in memory register exceeds 10 digits at memory calculation, display will show a zero and “E”, and previous data will be kept in memory register. (5) When an overflow occurs on the way of add-on/discount calculation, display will show a zero and “E”. (6) | When square root of any negative number is attempted, “E” and square root of absolute value are displayed. (7) In overflow condition, any operation or numeral entry will be inhibited. Clearing Overflow Condition (1) The resulting overflow condition can be cleared by depressing [ON/C/CE| . (2) At memory overflow condition, depression of or [MB after [ON/C/CE] will recall the previous memory data. (3) At the condition of exceeding capacity overflow occurred in chain calculation, depression of [ON/C/CE] will reset the error symbol “E”, and you can continue the calculation using the displayed data. Speed of Calculation (1) Numeral entry 81.35ms (2) Addition 4111111111 q11111111 E] 135.3ms (3) Multiplication 1 g99gg99o99 [=] 365.5ms (4) Division 9999999999 [=] 1 427.3ms (5) Memory calculation 9999999999 [=] 1 495.3ms (6) Percentage calculation 1 9999999999 411.3ms (7) Square root 9999999999 360.45ms Keys for Calculator (1) Data Keys The data keys consist of numeral keys [0] through [9]and a decimal point key [-]. The first of a sequence of data keys will clear the contents of display register before being entered. The decimal point key will be accepted the first time it is depressed during calculations. (2) Arithmetic Operation Keys The arithmetic operation keys include the plus [+], minus [=] , multiply [x], divide[=] , equal[=], percent [%], square root [7] , memory add , memory subtract[M—], sign change[+7 =], and mark up[MU]. 1998-12-01 7/34

TOSHIBA T6M14S,JT6M14-CS Depression of this key conditions the calculator for addition of display register to upper register. If the calculator was previously conditioned for add, subtract, multiply or device, those operation would be performed with the resultant intermediate sum, difference, product or quotient displayed and previous modes and reset, and calculator stores add command. In the successive depressions of this key, the first will perform the previously enabled mode and more than twice depressions will be ignored. [E] _ Depression of this key performs the same function as the [+] key with the exception that calculator stores subtract mode. Depression of this key conditions the calculator for multiplication of upper register and display register. If the calculator was previously conditioned for add, subtract multiply or divide, those operation would be performed with the resultant intermediate sum, difference, product or quotient displayed. And then set the multiply mode. E] Depression of this key performs a similar function as the key except that division of upper register by display register is either set up or performed and the divide mode is activated. E] Depression of this key following numeral entry will perform the previously enabled mode. If no number has been entered, the displayed number will be used to perform the previously enabled mode. If no mode are enabled, this key will be ignored. If multiplication or division are enabled, constant mode operations are performed by termination a sequence of operations with the [E] key, entering a new number and depressing the [=] key. Any key sequence terminated with, [=] key will not require the use of [ON/C/CE] key before a new operation sequence can be initiated. If the calculator was previously conditioned for addition, or subtraction or multiplication or divination, calculations would be performed as follows. a+b [%]a+a-b/100 a-b [%]a-a-b/100 axb [%]a-b/100 a+b [%]100 a/b If no mode are enabled, this key will be ignored. If multiplication or division are enabled, constant mode operations are performed by terminating a sequence of operation with the [%] key, entering new number and depressing the|%] key. 9998-12-01 8/34

TOSHIBA T6M14S,JT6M14-CS Depression of this key will perform the previously enabled mode and add the result to memory register and leave the result in the display register. If no modes are enabled, the displayed number is added to memory register by this key. Any key sequence terminated with will not require the use of the ION-/ C/ CE] key before a new operation sequence can be initiated. [M=] Depression of this key will perform the same function as the [M+] with the exception that the calculator result or displayed number is subtracted from the memory register. Depression of this key calculated the square root of number displayed without changing modes of operation. Depression of this key following [+], [=], [x], or [] keys will transfer the contents of display register to upper register and calculate the square root of number displayed. The entry of a new number following this key clear the previous display. Depression of this key will change the sign of display register. (3) | Command Function Keys The command function keys include the clear entry/clear all [ON/C/CE} , recall /clear memory [m8], recall memory , clear memory [MC]. [R]- Depression of this key following [+], [=], [x] or [=] will transfer the contents of display register to upper register and recall the contents of memory register o display register. [MB lkey or [MR] following[=] , fl, [M+], [M-] , [MU]or any number key will recall the contents of memory register to the display register without affecting any other operations in progress. Successive depressions of [mB key will clear the memory register. Depression of this key will clear the memory register. [ON/C/CE] Depression of this key after [MR], ,[-], or numeral keys will clear the display register. You can reset the error symbol “E” if you depress |ON/C/CE| at the condition of exceeding capacity error. Depression of this key will off the LSI. 9998-12-01 9/34

TOSHIBA T6M14S,JT6M14-CS This key performs mark up calculation in special function. The function shows as follows. a [MU] b [%] a/(1-b/100) If E] key is depressed after this calculation, the answer will be as follows. a /(1-b/100) x =P And if calculator is previously conditioned for subtraction, calculations will be performed as follows. a-b[MU] (a-b)/ax 100 Arithmetic Operations 1. Addition Key Op. Display A A A B B A+B Cc Cc E] A+B+C D D D E E D+E E] D+E 2. Subtraction (1) A A al A B B | A-B Cc Cc E] A-B-C El A-B-C D D 9998-12-01 10/34

TOSHIBA T6M14S,JT6M14-CS Key Op. Display E] A-B-D+D E] - (A-B-C+D) 3. Multiplication (1) A A A B B ES] AB AB Cc Cc El AB+C @ © 0. A A B B E] -AB 4. Division (1) A A El A B B E] AIB @ & 0. A A Ea] -A B B ES] -A/B 5. Power calculation a1) A A A E] 0 8998-12-01 11734

TOSHIBA T6M14S,JT6M14-CS Key Op. Display E] cS Q A A ea A El V/A E] 1A a £4 0. A A El a El -A3 @ & 0. A A El -A E] -1/A [=] 1/2 (5) A A A El a a ES] at 6. Mixed calculation a oA A A B B AB c c E] AB+C D D E] ABs Cc E E 9998-12-01 12/34

TOSHIBA T6M14S,JT6M14-CS Key Op. Display el AB. +C 7. Constant calculation (1) A A A B B El AB c c El Ac QQ FE 0. A A B B E] -AB c c E] -AC (3) A A El A B B E] AIB c c E] C/B D D D EI D (4) A A A B B E] A+B c c E] c 9898-12-01 13/34

Key Op. Display (5) A A El A B B El A-B c c El c (6) A A A B B El AB c c c D D EI cD E E El Ce CE F F | CEF G G E] G H H E] G/H I l E] W/H (7) A A A B B A:B/100 c c 9898-12-01 14/34

TOSHIBA T6M14S,JT6M14-CS Key Op. Display A-C/ 100 D D E] D E E 100-D/E F F 100-F/E 8. Mark-up/ Discount calculator (oO) A A A B B AB | A+AB (2) A A A B B | AB E] A-AB (3) A A A B B A-B/100 A-B/ 100 E] A+A:B/100 (4) A A A B B A-B/100 | A:B/100 E] A-A:B/100 8998-12-01 15/34

TOSHIBA T6M14S,JT6M14-CS Key Op. Display (5) A A A B B A+A:B/100 (6) A A El A B B A-A-B/100 9. Memory calculation Key Op. Display Memory (1) A A 0. A(M) A B B(M) A B(M) A+B c c(M) A+B [=] c(M) A+B-C D D(M) A+B-C [1B] or aR] A+B-C(M) A+B-C [mB]or A+B-C 0. (2) A A 0. A 0. B B 0. A+B(M) A+B A+B(M) A+B A+B(M) 2(A+B) c c(M) 2(A+B) [M=] c(M) 2(A+B) -C (3) A A 0. A 0. B B 0. 8998-12-01 16/34

TOSHIBA T6M14S,JT6M14-CS Key Op. Display Memory A-B(M) AB c c(M) AB c(M) AB D D(M) AB M=] cD (M) AB-CD [M8] or (aR) A:B-D-D(M) AB-C-D [M=] AB-CD 0. (4) A A 0. A 0. B B 0. E] AB 0. c c 0. c(M) c ] A-C (M) c D D(M) c w=] D(M) c-D E] A-D(M) c-D (5) A A 0. A(M) A B B(M) A B(M) A+B or A+B(M) A+B x A+B(M) A+B or A+B(M) A+B (A+B)? (M) A+B c c(M) A+B E] (A+B)? +C(M) A+B (6) 1.000000001 1.000000001 0. 1.000000001 (M) 1.000000001 9999999999 9999999999. (M) 1.000000001 9898-12-01 177384

TOSHIBA T6M14S,JT6M14-CS Key Op. Display Memory 0. (M) 1.000000001 0.(M) 1000000001 or 1.000000001 (M) 1.000000001 10.Square root (1) A A Va B B (2) A A A B B VE E] AVE (3) A A A VA B B E] AB @ E 0. A A E] -A VALE) (5) A A 0. A(M) A or A(M) A E] A(M) A B B(M) A -B(M) A vB (M) A 0.) A 8998-12-01 18/34

TOSHIBA T6M14S,JT6M14-CS 11.Percentage calculation Key Op. Display Memory (1) A A A B B A-B/100 c c A-C/ 100 D D A:D/100 (2) A A A B B B c c c (3) A A al A B B A-A:B/100 El A-A'B/100 A-A:B/100 c c AB 12.Key correction (1) A A 0. A 0. E] A 0. El A 0. A 0. VR 0. 8998-12-01 19/34

TOSHIBA T6M14S,JT6M14-CS Key Op. Display Memory A+/A(M) A+VA - (A+V/A) (M) A+VR or A+/A(M) A+JVA_ or A+VA- 0. B B 0. B 0. E] B 0. B 0. E] B 0. E] 1/B 0. 13.Others (1) A A A E] A (2) A A A E] A E] 1/A (3) A A A A E] A (4) A A A El A E] -A (5) A A E] A | A 9898-12-01 20/34

TOSHIBA T6M14S,JT6M14-CS Key Op. Display Memory E] -A (6) A A A B B El B (7) A A A B B c c El AC 14.Mark Up Calculation (1) A A A B B A/(1-B/ 100) A/(1-B/100) c c Sito (2) A A A B B A/(1-B/100) E] AI (1B /100) x Bo El AI(1-B/100)x 3 (3) A A | A B B AB x 100 9898-12-01 21734

TOSHIBA T6M14S,JT6M14-CS Key Chattering Protection (1) At time of key on: about 17.5ms, after key input. (f¢ typ.) (2) At time of key off : about 24.0ms, after completion of the operation (f¢ typ.) (3) Simultaneous Keying protection lf 2 or more keys are pressed simultaneously, any key input is not accepted. MAXIMUM RATINGS Supply Voltage +0.3~-2.2 Input Voltage +0.3~Vpp1 - 0.3 Operating Temperature Storage Temperature ELECTRICAL CHARACTERISTICS (Vsgq = - 1.5V £0.2V, Vsgo = -3.0V£0.4V, Vpp = OV, Ta =25°C) TEST PARAMETER SYMBOL fe] same | TEST CONDITION rn. | ve. max UNIT CUIT qe Ka~Kg, Vss1 ee Se #9" Ka~Kg, frowevor Te [= [Meee | of = fee] v rc] nan Segment, Vss2 rot Segment, fo) "9" a Slowoweor | vor |= lemon| = || = | 02] | ayn Ki~Kg, Vss2 coo [von [=| | | = [ol *Q" Ki~K6, were [ve [fee] | | - [=] « [Output 7 | Row | — | Segment |Vour=Vesqrosv | — | — | 70 | Ka | « [Output 07 [Ror | — | Segment [Vour= -0.5v = = 0 en] 2 [ourput "17 | Ron | — [Common |Vour=Vss2+05v | — | — | 70] ka_| § [output 0" | Ro. | — [eommon [Vour=-05v | — | — | 70 | ka | [4 kQ RESET | — | RESET |[VouT=0V [780 | 300 | 420 | [output 707 [Ror | — | i~Ke [Vour= -05V a 1998-12-01 22/34

TOSHIBA T6M14S,JT6M14-CS TEST PARAMETER SYMBOL | CIR- TEST CONDITION TYP. | MAX. | UNIT CUIT Supply Current 1 Vss1 = - 1.5V A (On Display) (No Keys) a Supply Current 2 Vss1 = -1.2V _ _ (Operation) 'pp2 (Peak OF AIl9V_ ) 3.7 | -47 | HA Supply Current 3 Vss1 = -1.5V A (Off) (Off Status) # Oscillating fosc (WAIT) Vss1 On Display | 54[ 9| 126 | kH Frequency fosc (OP) = -1.5V| On Operating] 10.8 | 18 | 25.2 | 2 lFrame Frequency [fe — | = lvesi=—15v(war) | 50 | a3 [ 117 | we | WAVEFORMS FOR DISPLAY Display Device : FEM type LCD -3.0V, 1/2 bias, 1/3 duty dynamic system 1/(83Hz) Note Yoo : ov —t Vss2_: -3V J l 4.016ms Note com2 ome uth , LI Le — Vss2_: -3V Ay-COMt —— +15v — -15v -3V orelon | ore fon|. oFF lon, Ay-COMB —— s15v OFF 715V Note : ff =9kHz OTHERS RESET] Key i) After releasing this key, the cpu is reset and display “0”. 1998-12-01 23/34

TOSHIBA T6M14S,JT6M14-CS PAD LOCATION TABLE (um) fo] mane | xvowt | vrowr ] fro] woe | xvowr | vrowr | | wer | 00s | [oop as | 5a] 905 [34 [819 | 25a [319 | [ep a | = 1291 | 289 | [7 8; fa) sae ost a a lar[c@ | 1258 | 098 | a pis[ Ag | = 1291 |= 1076} faa] kg T5068 ta [is] 8a | 927 |= t249 | fas | Kg Tate ta ja6[ ks |= 264 249 pis] As | 62a | 129} fat ke = ta jist Bs T= a72 |= 129} fas kp 9 ta ee [z1[ ag | =169 | 1209] [50 [reset | 3a 1209 _| EE [sa tsa [949 | 1249 | *(_ ) Do not connect. 1998-12-01 24/34

TOSHIBA T6M14S,JT6M14-CS CHIP LAYOUT bese sesreredte ss oOooo0o0o0000000 com! 5 OD ]vss2 com |} O O je com3 || O fe ol} oO OD ffesszy Ay o OD fjos2 aS O |hvoo cy a sT6M14-cs, fos: ai o D |o0 all oO OD |[P10 a a GF |faro all O Oo We 83 o O |/e af a D jas all O o |e oOoooooo0o0o00000 SILPLE SLL SOLS Chip size 3,043.02 (mm) Chip thickness : 200+ 30m Substrate: Vpp PAD LAYOUT Active Element Yl 40m Bonding Area a0 100m Z |e | = LL 40m YY Scribe Line PAD Pitch 160m 1998-12-01 25/34

TOSHIBA T6M14S,JT6M14-CS OUTLINE DRAWING LQFP60-P-1414-0.80 Unit : mm 18.2+0.3 14.0+0.2 45 31 ONC ON TOO CONT o & NOOO AAO A 3 44S Cir 30 =a Er co Fo cor fo or Fo «| o = BS slg = fr S| & co cr +| = = Er cor = | =

60 Fr 16

1.4TYP. 0.3510.1 a ea . —opnooooooooooooo hk =} 2 os 1,840.2 Weight : 0.66g (Typ.) 8998-12-01 26/34

TOSHIBA T6M14S,JT6M14-CS GENERAL SPECIFICATION FOR CALCULATOR LSI BARE CHIP 1. Purpose This is to specify the quality standard for the integrated circuit produced by TOSHIBA CORPORATION (hereinafter referred as to VENDOR) to be delivered to PURCHASER. 2. Definition This specification applies only to the calculator LS! bare chip produced by VENDOR and purchased by PURCHASER and defined the general specification items. 3. Priority of specifications When the discrepancies or questions happen to the specifications and instructions provided by VENDOR, the priority shall be ranked as follows. 1) Individual specification for the calculator LSI bare chip. (Both PURCHASER and VENDOR are confirmed by the special sheets.) 2) General specifications for the calculator LSI bare chip. 3) Other related specifications and standards. 4. Characteristics To be shown in the individual specification sheets. The individual specification shall consist of the following 4 items in principle. 1) Rated specifications. 2) Electrical characteristics. 3) Pin configuration & mechanical dimensions. 4) Others. 5. Inspection of product for delivery

5.1 Inspection lot

a) Inspection lot shall consist of products produced by same material under same design, through same production process, and same facilities and assured same quality by same quality assurance method, and lot number shall be put on all trays to be able to trace the lot history. b) The quantity of products per Inspection lot shall consist of all the same VENDOR’s lot number. 1998-12-01 27/34

TOSHIBA T6M14S,JT6M14-CS

5.2 Sampling plan

Statistical sampling and inspection shall be in accordance with MIL-STD-105D single sampling plans for normal inspections, general inspection level II. The acceptable quality level (AQL) shall be specified in following table : TEST ITEM AQL (%) [visual [40

5.3 Electrical criteria

Criteria of Electrical Characteristics are prescribed in Attachment-1.

5.4 Visual criteria

Visual Criteria are prescribed in Attachment-2. 6. Incoming inspection

6.1 General

a) PURCHASER’s incoming inspection should be done within 15 days after PURCHASER receives the quantity of products in principle. b) PURCHASER shall report the results of incoming inspection to VENDOR and provide VENDOR with detailed data in failure rate and items regarding VENDOR’s lot number respectively, if VENDOR demands the report from PURCHASER.

6.2 Inspection procedure

PURCHASER should do his incoming inspection according to the following procedure. a) First : Visual inspection should be done. b) Next : Electrical and other inspection should be done under condition with bare chip before going into PURCHASER’s process. 7. Treatment for defective lot and products Regarding the defective lot and defective products which are found through PURCHASER’s incoming inspection, PURCHASER can be returned to VENDOR with detailed description on failures concerned. However, if VENDOR cannot receive the defective items within 30 days after PURCHASER’s incoming inspection, VENDOR should be able to make no reference to the defective problem. 1998-12-01 28/34

TOSHIBA T6M14S,JT6M14-CS 8. Packing and labeling a) Dice shall be placed in die tray with the top metalization facting up in order. b) In principle, a pile consists of 5 trays and several piles are packed in a package. These piles and packages are indicated with printed labels as shown below. [ Date T [tot No. | + | Net [ TOSHIBA MADE IN JAPAN ©) PURCHASER shall return these packing materials to VENDOR on VENDOR’s demand. 9. Storage criteria Solid state chips, unlike packaged devices, are non-hermetic devices normally fragile and small in physical size, and therefore, require special handling considerations as follows :

9.1 Chips must be stored under proper conditions to insure that they are not subjected to a

moist and/or contaminated atmosphere that alter their electrical, physical, or mechanical characteristics. After the shipping container is opened, the chips must be stored under the following conditions : A. Storage temperature, 40°C max. B. Relative humidity, 50% max. C. Clean, dust-free environment.

9.2 The user must exercise proper care when handling chips or wafers to prevent even the

slightest physical damage to the chip.

9.3 During mounting and lead bounding of chips the user must use proper assembly techniques

to obtain proper electrical, thermal, and mechanical performance.

9.4 After the chip has been mounted and bounded, any necessary procedure must be followed

by the user to insure that these non-hermetic chips are not subjected to moist or contaminated atmosphere which might cause the development of electrical conductive paths across the relatively small insulating surfaces. In addition, proper consideration must be given to the protection of these devices from other harmful environments which could conceivably adversely affect their proper performance. 8998-12-01 29734

TOSHIBA T6M14S,JT6M14-CS 10.Handling criteria The user should find the following suggested precautions helpful in handling chips. In any event, because of the extremely small size and fragile nature of chips, care should be taken in handling these devices.

10.1 Grounding

a) Bonders, pellet pickup tools, table tops, trim and form tools, sealing equipment, and other equipment used in chip handling should be properly grounded. b) Operator should be properly grounded.

10.2 In-process handling

a) Assemblies or subassemblies of chips should be transported and stored in conductive carriers. b) All external leads of the assemblies or subassemblies should be shorted together. VISUAL INSPECTION CRITERIA 1. Visual inspection magnification shall be 40 x in principle. 2. Defects defined :

2.1 Thickness

See the technical data sheet.

2.2 Chip and crack

A die shall be rejected if : a) Any crack of chip extends greater than 35m in length into the inside of the scribble line. (see Fig.1) 2.3. Metallization A die shall be rejected if : a) More than 25% of the designed area of the metallization is missing at any bonding pad. b) There is a short or break which affects electrical characteristics in any lead pattern. (see Fig.2)

2.4 Glass protection coat

A die shall be rejected if : a) It exhibits glass protection coat which covers more than 25% of any active bonding pad. 9998-12-01 30/34

TOSHIBA T6M14S,JT6M14-CS

2.5 Attached foreign material

A die shall be rejected if : a) A die is covered by stains or attached foreign material which size is more than 5 times as large as a bonding pad area. b) It exhibits residual ink, stains or attached foreign material which covers more than 20% of any active bonding pad. (see Fig.3)

2.6 Others

A die shall be rejected if : a) There have no evident probed impression on the bonding pads. b) A inked die, defective die, is intermized. 3. Limit samples should be fized, if necessary. + Scribe line Short Break _ Die edge a 35pm Fig.1 Fig.2 Lead pattern Stain or foreign materials Ay Fig.3 1998-12-01 31/34

TOSHIBA T6M14S,JT6M14-CS OUTSIDE DIMENSIONS OF CHIP TRAY a xafx2 LAT ao nf] 45.8 51.0 z E | H ae re Tid —ho Unit : mm No. OF os Tray material : Carbon-containing polypropylene 1998-12-01 32/34

TOSHIBA T6M14S,JT6M14-CS PACKING METHOD-1 [vee [| Joara [| Jno f TOSHIBA, MADE IN JAPAN nysi0ce ‘® Label @ Tray cover © Anti-static plastic bag —_ © Chip tray SSS Zo o> ZA| 2 @ ei —— g ——— Sy y Packed trays a SSE os 2 en Chip © Packing Heat seal the mouth of the bag, @ Carton ay, $e ‘® Packing © Packing , _ = FH VA E SN ssm (oy 123mm Lo (oD) 107m (O.D) Place eight bags of chip trays in each carton box @. Lay one sheet of packing © (7UF44F) before closing the lid of the cart box. (See the diagram above.) Prepare packing ® by cutting 7UF44F into halves and folding each in half as portions 1998-12-01 33/34

TOSHIBA T6M14S,JT6M14-CS PACKING METHOD-2 Shipping box Jascm ‘a5cm 45cm © Inner box: Containing 20 boxes © Weight — : Approx. 15kg (including packing material) © Material: Corrugated cardboard © IC contents : 36x5x8x20=28.8kpcs. 1998-12-01 34/34