T6A92 TOSHIBA | Alldatasheet
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Technical content
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC The T6A92 is a column driver with 80 output channels for a medium- or small-scale dot matrix LCD. The T6A92 realizes low power LCD systems using the CMOS Si-Gate process. —e™ The T6A92 has two types of data flow. — NX ® 01089, @ Ogo01 s eet The T6A92 can be connected to extension drivers like the po an “SPE T6A39, ae FEATURES QFP100-P-1420-0.65) @ 80-output column driver Weight: 1.69 (typ.) @ Data input format : 1-bit (ENABLE mode) : 2-bit (SHIFT mode) © Two types of data flow : ® 014-09 ®@ Ogo>04 @ Low power consumption @ Power supply : 5 V£10% @ 100-pin plastic flat package 961001EBA2 © TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in_general_ can malfunction or fal due to their inherent electrical sensitvity and, vulnerability to physical stress tis the responsibilty of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified Operating ranger ae tot forth in the most recent producte epecificatione. Algo, pleace keap in mind the precautions and conditions eat forth in the TOSHIBA Semiconductor Reliability Handbook. The Products described in this document are subject to foreign exchange and foreign trade control laws The lnformation contained herein is presented only as a guide for the applications, of our products. No responsibilty is assumed by, TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others © The information contained herein is subject to change without notice. 1997-04-07 1/8
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0} to Ogo Tet fala E E E UW 0 ee eel S/E DIR DIT DI2 E102 SCP EIO1 Vss Vop Vic2Vic3 Vics FR LP TEST PIN FUNCTIONS PIN NAME FUNCTIONS LEVEL Vics. DI, Di2 Data signal input ENABLE signal input/output F101, E102 10 When S/E=H, this pin is for input. (Shift Clock Pulse) Shit lock ule input FR Input (Frame) ; ; Vpp to Frame signal input Vss (Latch Pulse) LP I - . fe | input | Latch pulse signal input Input for mode selection [DIR __|_ Input Input data flow direction select } TEST | Input Test pin: usually connected to Vsg (OV) Vic2, 3,5 [ — | Power supply for LCD drive [_Vop |__| Power supply (6V) L_ vss = [Power supply (0V) 1997-04-07 3/8
FUNCTION OF DATA AND ENABLE PINS DIR FLOW_| DATA | DATA iio SE TEST egos | ENABLE t|H|pata INpuT ENABLE signal | ENABLE signal 0130 °. output input 1 80 80 [Ht [Open Open | DATA INPUT | DATA OUTPUT |O;>089| Op | 03 four [H[H Open Open DATA OUTPUT [DATA INPUT _|0g9->01] 01 | Oso | TIMING DIAGRAM t : fee von 2 mee 0} to Og ie ? fl } vues FR | tt ] ABSOLUTE MAXIMUM RATINGS (Ta = 25°C) ITEM SYMBOL RATING UNIT Supply Voltage (1) Vpp (Note 1) -0.3 to 7.0 Vic2. Vic3, Vics - Supply Voltage (2) (Note 7. 2) 0.3 to 7.0 v Vin tote 1) | 03% Vpp 703 Storage Temperature -55 to 125 (Note 1) Referenced to Vss =0V (Note 2) Ensure that the following condition is always maintained. Vpb= Vic2= Vic3= Vics 1997-04-07 4/8
ELECTRICAL CHARACTERISTICS
TEST CONDITIONS (Unless otherwise noted, Vss =0V, Vpp =5.0V + 10%, Vic5 =O0V, Ta= -20 to 75°C) TEST Test CONDITIONS vam |e | mac on nae CUIT Operating Voltage v |vpp Operating Voltage Vpp (2) -3.0 | ¥ [Vues Vi Voltage , [Tevet [vi [=| —~+ of — | aivie czoa_ [rit [on [= [owr-em [38 [wo fos | voltage [TT tevel_| Vor_| = [lon=04ma [of — | 04 |v aor, B02 | [Output Resistance | Recor | — [lg=*50xA | — | — | 30 [kM [04 to Ogo | Operating Frequency| fsep | — |Ta=-20to 7 | — | — | 400 |kkz|scP | Vpp=5.0V [Binary Data Vic2=3.0V [Input Vic3 =2.0V mA Current Vics =0.0V Consumption 'ss frR =39Hz Vss Input Data fecp = 250kHz |. : LOW 01 to Ogg Constant : No Load (*) SCP, LP, FR, E101, E102, DI1, DI2, DIR, $/E, TEST 1997-04-07 5/8
towe *CWH 90% scp 10% te *isu LHD) tosu | — YX X tesu | teD ENABLE OUT X x Ce TEST CONDITIONS (Vsg =OV, Vpp =5V + 10%, Vics =0V, Ta= -20 to 75°C) LOAD CIRCUIT eM srmeou [MIN | Max | UNT | coveo—> Operating Frequency | fscep | = 400 kHz q* SCP Pulse Width towns tem | 800 — ms) [P Set-up Time [usu | 500 | — | as_ [cP Hold Time | two | — | 10 | ns_| ‘psu Wore) | 300 | — | as Data Hold Time tpHD (Note 1) | 300 | — | ons | Enable Set-up Time tesu (Note 2)| 300 [| — | ns | Enable Hold Time teHD (Note 2) [300 [ — [ns | tep (Note 3) [| — | 300 | ns (Note 1) Applies to DI1 and DI2 (Note 2) Applies to EIO1 and E102 (Note 3) With load circuit connected 1997-04-07 6/8
@ S/E=L (ENABLE mode) cmees cannons | SEG! to SEG5O 50 80 T6B20 1 to 80 D biz ep —e £0 £101 og bok cise fi oer T6A92 eg MD ag a oe vie — we peg EW Les ues @ S/E=H (SHIFT mode) cmees FL memcome T7934 1 to O80 D E101 sie f Me T6A92 were vie f>——] ica vet ues ues 1997-04-07 7/8
QFP100-P-1420-0.65) Unit : mm 24.8+0.3 2.002 Fa 80 61 ; § WO NODO NOOO NOOSDOGANOO DIOGO J cS QUOT TUTLEL VEL ELL UPL i f St af y= 50 = = = = =| E= 3 3g = = E= ¥ 3 = w= =, =| HOMO OCA O TONS ORO T OE ~ FE \\ 4 | loss) bsxorecam ™ 0: ‘YP. a 5 Sn iin aA 4 . 3 + 1.9409 Weight : 1.6g (Typ.) 1997-04-07 8/8