NTD40N03R_V01 ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • Planar HD3e Process for Fast Switching Performance
  • Low RDS(on) to Minimize Conduction Loss
  • Low Ciss to Minimize Driver Loss
  • Low Gate Charge
  • Optimized for High Side Switching Requirements in High−Efficiency DC−DC Converters
  • These are Pb−Free Devices MAXIMUM RATINGS (TJ = 25°C unless otherwise specified) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 25 Vdc Gate−to−Source Voltage − Continuous VGS ±20 Vdc Thermal Resistance − Junction−to−Case Total Power Dissipation @ TC = 25°C Drain Current − Continuous @ TC = 25°C, Chip − Continuous @ TA = 25°C, Limited by Wires − Single Pulse (tp ≤ 10 /C0109s) R/C0113JC PD ID ID ID 3.0 100 °C/W W A A A Thermal Resistance − Junction−to−Ambient (Note 1) − Total Power Dissipation @ TA = 25°C − Drain Current − Continuous @ TA = 25°C R/C0113JA PD ID 71.4 2.1 9.2 °C/W W A Thermal Resistance − Junction−to−Ambient (Note 2) − Total Power Dissipation @ TA = 25°C − Drain Current − Continuous @ TA = 25°C R/C0113JA PD ID 100 1.5 7.8 °C/W W A Operating and Storage Temperature Range TJ, Tstg −55 to 175 Maximum Lead Temperature for Soldering Purposes, 1/8 in from case for 10 seconds TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. When surface mounted to an FR4 board using 0.5 sq. in pad size. 2. When surface mounted to an FR4 board using minimum recommended pad size. http://onsemi.com

45 AMPERES, 25 VOLTS

RDS(on) = 12.6 m/C0087 (Typ) MARKING DIAGRAM & PIN ASSIGNMENTS CASE 369AA DPAK (Surface Mount) STYLE 2 D S G YWW T40 N03G

4 Drain

N−CHANNEL 1 2 See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.

ORDERING INFORMATION

Y = Year WW = Work Week T40N03 = Device Code G = Pb −Free Package CASE 369D DPAK (Straight Lead) STYLE 2

http://onsemi.com ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Characteristics Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (Note 3) (VGS = 0 Vdc, ID = 250 /C0109Adc) Temperature Coefficient (Positive) V(br)DSS Vdc mV/°C Zero Gate Voltage Drain Current (VDS = 20 Vdc, VGS = 0 Vdc) (VDS = 20 Vdc, VGS = 0 Vdc, TJ = 150°C) IDSS 1.0 /C0109Adc Gate−Body Leakage Current (VGS = ±20 Vdc, VDS = 0 Vdc) IGSS − − ±100 nAdc ON CHARACTERISTICS (Note 3) Gate Threshold Voltage (Note 3) (VDS = VGS, ID = 250 /C0109Adc) Threshold Temperature Coefficient (Negative) VGS(th) 1.0 1.7 2.0 Vdc mV/°C Static Drain−to−Source On−Resistance (Note 3) (VGS = 4.5 Vdc, ID = 10 Adc) (VGS = 10 Vdc, ID = 10 Adc) RDS(on) 18.6 12.6 16.5 m/C0087 Forward Transconductance (Note 3) (VDS = 10 Vdc, ID = 10 Adc) gFS − 20 − Mhos DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 20 Vdc, VGS = 0 V, f = 1 MHz) Ciss − 584 − pF Output Capacitance Coss − 254 − Transfer Capacitance Crss − 99 − SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time (VGS = 10 Vdc, VDD = 10 Vdc, ID = 10 Adc, RG = 3 /C0087) td(on) − 4.5 − ns Rise Time tr − 19.5 − Turn−Off Delay Time td(off) − 16.7 − Fall Time tf − 3.5 − Gate Charge (VGS = 4.5 Vdc, ID = 10 Adc, VDS = 10 Vdc) (Note 3) QT − 5.78 − nC Q1 − 2.1 − Q2 − 2.5 − SOURCE−DRAIN DIODE CHARACTERISTICS Forward On−Voltage (IS = 10 Adc, VGS = 0 Vdc) (Note 3) (IS = 10 Adc, VGS = 0 Vdc, TJ = 125°C) VSD 0.85 0.71 1.2 Vdc Reverse Recovery Time (IS = 10 Adc, VGS = 0 Vdc, dIS/dt = 100 A//C0109s) (Note 3) trr − 20.4 − ns ta − 8.25 − tb − 12.1 − Reverse Recovery Stored Charge QRR − 0.007 − /C0109C 3. Pulse Test: Pulse Width ≤ 300 /C0109s, Duty Cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures.

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics Figure 3. On−Resistance versus Drain Current Figure 4. On−Resistance versus Drain Current Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current

3.5 V10 V

http://onsemi.com Figure 12. Thermal Response Device Package Shipping† NTD40N03R−1G DPAK (Straight Lead) (Pb−Free)

75 Units/Rail

(Pb−Free)

2500 Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

http://onsemi.com PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369AA−01 ISSUE B STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN b D E e M0.005 (0.13) C A c C Z DIM MIN MAX MIN MAX MILLIMETERSINCHES D 0.235 0.245 5.97 6.22 E 0.250 0.265 6.35 6.73 A 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 BSC 2.29 BSC b3 0.180 0.215 4.57 5.46 L 0.055 0.070 1.40 1.78 L3 0.035 0.050 0.89 1.27 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY . 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H.12 3 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 /C0466mm inches/C0467SCALE 3:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* H 0.370 0.410 9.40 10.41 A1 0.000 0.005 0.00 0.13 L1 0.108 REF 2.74 REF L2 0.020 BSC 0.51 BSC HDETAIL A SEATING PLANE A B C L H L2 GAUGE PLANE DETAIL A ROTATED 90 CW/C0053

http://onsemi.com PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369D−01 ISSUE B STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN 123 V S A K −T− SEATING PLANE R B F G D 3 PL M0.13 (0.005) T C E J H DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.235 0.245 5.97 6.35 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88 E 0.018 0.023 0.46 0.58 F 0.037 0.045 0.94 1.14 G 0.090 BSC 2.29 BSC H 0.034 0.040 0.87 1.01 J 0.018 0.023 0.46 0.58 K 0.350 0.380 8.89 9.65 R 0.180 0.215 4.45 5.45 S 0.025 0.040 0.63 1.01 V 0.035 0.050 0.89 1.27 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. Z ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. NTD40N03R/D PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative