T2500D ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • Blocking V oltage 400 V
  • All Diffused and Glass Passivated Junctions for Greater Parameter Uniformity and Stability
  • Small, Rugged, Thermowatt Construction for Low Thermal Resistance, High Heat Dissipation and Durability
  • High Surge Current Capability 60 A Peak at TC = 80°C
  • Pb−Free Package is Available* MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive Off−State Voltage (Note 1) (Sine Wave 50 to 60 Hz, TJ = −40 to +100°C, Gate Open) VDRM, VRRM 400 V On−State RMS Current (TC = +80°C) (Full Cycle Sine Wave 50 to 60 Hz) IT(RMS) 6.0 A Peak Non−repetitive Surge Current (One Full Cycle, 60 Hz, T C = +80°C) ITSM 60 A Circuit Fusing Considerations (t = 8.3 ms) I2t 15 A2s Peak Gate Power (TC = +80°C, Pulse Width = 10 /C0109sec) PGM 16 W Average Gate Power (TC = +80°C, t = 8.3 ms) PG(AV) 0.2 W Peak Gate Current (Pulse Width = 10 /C0109sec) IGM 4.0 A Operating Junction Temperature Range TJ −40 to +125 °C Storage Temperature Range Tstg −40 to +150 °C THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction−to−Case R/C0113JC 2.7 °C/W Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. V DRM, VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. TRIACS

6 AMPERES RMS

400 VOLTS

ORDERING INFORMATION

T2500D TO220AB 500 Units / Box TO−220AB CASE 221A STYLE 4 PIN ASSIGNMENT

3 Gate

4 Main Terminal 2

G MT2 T2500DG TO220AB (Pb−Free)

500 Units / Box

http://onsemi.com T2500DG AYWW A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package MARKING DIAGRAM

http://onsemi.com ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted; Electricals apply in both directions) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Blocking Current TJ = 25°C (Rated VDRM, VRRM; Gate Open) TJ = 100°C IDRM, IRRM − − 10 2.0 /C0109A mA ON CHARACTERISTICS Peak On-State Voltage (Note 2) (ITM = /C003430 A Peak) VTM − − 2.0 V Gate Trigger Current (Continuous dc) (VD = 12 Vdc, RL = 100 /C0087) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) MT2(−), G(+) IGT mA Gate Trigger Voltage (Continuous dc) (All Four Quadrants) (VD = 12 Vdc, RL = 100 /C0087) VGT − 1.25 2.5 V Gate Non−Tri gger Voltage (VD = 12 V, RL = 100 /C0087, TC = 100°C) VGD 0.2 − − V Holding Current (Main Terminal Voltage = 12 Vdc, Gate Open, Initiating Current = /C0034200 mA) IH − 15 30 mA Gate Controlled Turn-On Time (Rated VDRM, IT = 10 A , IGT = 160 mA, Rise Time = 0.1 /C0109s) tgt − 1.6 − /C0109s DYNAMIC CHARACTERISTICS Critical Rate-of-Rise of Commutation Voltage (Rated VDRM, IT(RMS) = 6 A, Commutating di/dt = 3.2 A/ms, Gate Unenergized, TC = 80°C) dv/dt(c) − 10 − V//C0109s Critical Rate-of-Rise of Off-State Voltage (Rated VDRM, Exponential Voltage Rise, Gate Open, TC = 100°C) dv/dt − 75 − V//C0109s 2. Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.

http://onsemi.com + Current + Voltage VTM IH Symbol Parameter VDRM Peak Repetitive Forward Off State Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Reverse Off State Voltage IRRM Peak Reverse Blocking Current Voltage Current Characteristic of Triacs (Bidirectional Device) IDRM at VDRM on state off state IRRM at VRRM Quadrant 1 MainTerminal 2 + Quadrant 3 MainTerminal 2 − VTM IH VTM Maximum On State Voltage IH Holding Current MT1 (+) IGT GATE (+) MT2 REF MT1 (−) IGT GATE (+) MT2 REF MT1 (+) IGT GATE (−) MT2 REF MT1 (−) IGT GATE (−) MT2 REF MT2 NEGATIVE (Negative Half Cycle) MT2 POSITIVE (Positive Half Cycle) Quadrant III Quadrant IV Quadrant II Quadrant I Quadrant Definitions for a Triac IGT − + IGT All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used.

http://onsemi.com PACKAGE DIMENSIONS CASE 221A−07 ISSUE AA TO−220 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. STYLE 4: PIN 1. MAIN TERMINAL 1 2. MAIN TERMINAL 2 3. GATE 4. MAIN TERMINAL 2 DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.014 0.022 0.36 0.55 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 A K L V G D N Z H Q FB 123 −T− SEATING PLANE S R J U T C ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 T2500/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.