T1235-800G-TR

BTA12 STMICROELECTRONICS | Alldatasheet

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SNUBBERLESS ™, LOGIC LEVEL & STANDARD 12A TRIACS September 2002 - Ed: 6A MAIN FEATURES:

DESCRIPTION

Available either in through-hole or surface-mount packages, the BTA/BTB12 and T12 triac series is suitable for general purpose AC switching. They can be used as an ON/OFF function in applications such as static relays, heating regulation, induction motor starting circuits... or for phase control operation in light dimmers, motor speed controllers,... The snubberless versions (BTA/BTB...W and T12 series) are specially recommended for use on inductive loads, thanks to their high commutation performances. Logic level versions are designed to interface directly with low power drivers such as microcontrollers. By using an internal ceramic pad, the BTA series provides voltage insulated tab (rated at 2500V RMS) complying with UL standards (File ref.: E81734) Symbol Value Unit IT(RMS) 12 A VDRM /VRRM 600 and 800 V IGT (Q1) 5 to 50 mA ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit IT(RMS) RMS on-state current (full sine wave)D ²PAK/TO-220AB Tc = 105°C 12 A TO-220AB Ins. Tc = 90°C ITSM Non repetitive surge peak on-state current (full cycle, Tj initial = 25°C) F = 50 Hz t = 20 ms 120 A F = 60 Hz t = 16.7 ms 126 I²tI ²t Value for fusing tp = 10 ms 78 A²s dI/dt Critical rate of rise of on-state current IG = 2 x IGT , tr ≤ 100 ns F = 120 Hz Tj = 125°C 50 A/µs VDSM /VRSM Non repetitive surge peak off-state voltage tp = 10 ms Tj = 25°C VDRM /VRRM + 100 V IGM Peak gate current tp = 20 µs Tj = 125°C 4 A PG(AV) Average gate power dissipation Tj = 125°C 1 W Tstg Tj Storage junction temperature range Operating junction temperature range - 40 to + 150 - 40 to + 125 °C G G A2A1 G D 2PAK (T12-G) GA2 TO-220AB Insulated (BTA12) TO-220AB (BTB12)

ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise specified) n SNUBBERLESS™ and LOGIC LEVEL (3 Quadrants) n STANDARD (4 Quadrants) STATIC CHARACTERISTICS Note 1: minimum IGT is guaranted at 5% of IGT max. Note 2: for both polarities of A2 referenced to A1 Symbol Test Conditions Quadrant T12 BTA/BTB12 Unit T1235 TW SW CW BW IGT (1) VD = 12 V RL = 30 Ω I - II - III MAX. 35 5 10 35 50 mA VGT I - II - III MAX. 1.3 V VGD VD = VDRM RL = 3.3 kΩ Tj = 125°C I - II - III MIN. 0.2 V IH (2) IT = 100 mA M A X . 3 51 01 53 55 0m A IL IG = 1.2 IGT I - III MAX. 50 10 25 50 70 mA II 60 15 30 60 80 dV/dt (2) VD = 67 %VDRM gate open Tj = 125°C MIN. 500 20 40 500 1000 V/µs (dI/dt)c (2) (dV/dt)c = 0.1 V/µs Tj = 125°C MIN. - 3.5 6.5 - - A/ms (dV/dt)c = 10 V/µs Tj = 125°C - 1 2.9 - - Without snubber Tj = 125°C 6.5 - - 6.5 12 Symbol Test Conditions Quadrant BTA/BTB12 Unit CB IGT (1) VD = 12 V RL = 30 Ω I - II - III IV MAX. 25 100 mA VGT ALL MAX. 1.3 V VGD VD = VDRM RL = 3.3 kΩ Tj = 125°C ALL MIN. 0.2 V IH (2) IT = 500 mA MAX. 25 50 mA IL IG = 1.2 IGT I - III - IV MAX. 40 50 mA II 80 100 dV/dt (2) VD = 67 %VDRM gate open Tj = 125°C MIN. 200 400 V/µs (dV/dt)c (2) (dI/dt)c = 5.3 A/ms Tj = 125°C MIN. 5 10 V/µs Symbol Test Conditions Value Unit VT (2) I TM = 17 A tp = 380 µs Tj = 25°C MAX. 1.55 V Vto (2) Threshold voltage Tj = 125°C MAX. 0.85 V R d (2) Dynamic resistance Tj = 125°C MAX. 35 m Ω IDRM IRRM VDRM = VRRM Tj = 25°C MAX. 5µ A Tj = 125°C 1 mA

S = Copper surface under tab PRODUCT SELECTOR BTB: non insulated TO-220AB package

ORDERING INFORMATION

Symbol Parameter Value Unit R th(j-c) Junction to case (AC) D ²PAK/TO-220AB 1.4 °C/W TO-220AB Insulated 2.3 R th(j-a) Junction to ambient S = 1 cm² D ²PAK 45 °C/W TO-220AB TO-220AB Insulated 60 Part Number Voltage (xxx) Sensitivity Type Package

600 V 800 V

BTA/BTB12-xxxB X X 50 mA Standard TO-220AB BTA/BTB12-xxxBW X X 50 mA Snubberless TO-220AB BTA/BTB12-xxxC X X 25 mA Standard TO-220AB BTA/BTB12-xxxCW X X 35 mA Snubberless TO-220AB BTA/BTB12-xxxSW X X 10 mA Logic level TO-220AB BTA/BTB12-xxxTW X X 5 mA Logic Level TO-220AB T1235-xxxG X X 35 mA Snubberless D ²PA K BT A 12 - 600 BW (RG) TRIAC SERIES INSULATION: A: insulated B: non insulated CURRENT: 12A SENSITIVITY & TYPE B: 50mA STANDARD BW: 50mA SNUBBERLESS C: 25mA STANDARD CW: 35mA SNUBBERLESS SW: 10mA LOGIC LEVEL TW: 5mA LOGIC LEVEL VOLTAGE: 600: 600V 800: 800V PACKING MODE Blank: Bulk RG: Tube T 12 35 - 600 G (-TR) TRIAC SERIES SENSITIVITY: 35: 35mA VOLTAGE: 600: 600V 800: 800V CURRENT: 12A PACKAGE: G: D PAK PACKING MODE: Blank: Tube -TR: Tape & Reel

Note: xxx = voltage, yy = sensitivity, z = type Part Number Marking Weight Base quantity Packing mode BTA/BTB12-xxxyz BTA/BTB12-xxxyz 2.3 g 250 Bulk BTA/BTB12-xxxyzRG BTA/BTB12-xxxyz 2.3 g 50 Tube T1235-xxxG T1235xxxG 1.5 g 50 Tube T1235-xxxG-TR T1235xxxG 1.5 g 1000 Tape & reel Fig. 1: Maximum power dissipation versus RMS on-state current (full cycle). Fig. 2-1: RMS on-state current versus case temperature (full cycle). Fig. 2-2: RMS on-state current versus ambient temperature (printed circuit board FR4, copper thickness: 35µm),full cycle. Fig. 3: Relative variation of thermal impedance versus pulse duration. 0123456789 1 0 1 1 1 20 P (W) IT(RMS)(A) 0 25 50 75 100 1250 IT(RMS) (A) BTA BTB/T12 Tc(°C) 0 25 50 75 100 1250.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Tamb(°C) IT(RMS) (A) DP A K (S=1cm ) 1E-3 1E-2 1E-1 1E+0 1E+1 1E+2 5E+21E-2 1E-1 1E+0 K=[Zth/Rth] Zth(j-c) Zth(j-a) tp(s)

Fig. 4: On-state characteristics (maximum values). Fig. 5: Surge peak on-state current versus number of cycles. Fig. 6: Non-repetitive surge peak on-state current for a sinusoidal pulse with width tp < 10ms, and corresponding value of I²t. Fig. 7: Relative variation of gate trigger current, holding current and latching current versus junction temperature (typical values). Fig. 8-1: Relative variation of critical rate of decrease of main current versus (dV/dt)c (typical values) (BW/CW/T1235). Fig. 8-2: Relative variation of critical rate of decrease of main current versus (dV/dt)c (typical values) (TW). 100 ITM (A) Tj=25°C Tj max Tj max. Vto = 0.85 V Rd = 35 mΩ VTM(V) 1 10 100 10000 100 110 120 130 ITSM (A) Non repetitive Tj initial=25°C Repetitive Tc=90°C One cycle t=20ms Number of cycles 0.01 0.10 1.00 10.0010 100 1000 tp (ms) ITSM (A), I²t (A²s) Tj initial=25°C ITSM I²t dI/dt limitation: 50A/µs -40 -20 0 20 40 60 80 100 120 1400.0 0.5 1.0 1.5 2.0 2.5 IGT,IH,IL[Tj] / IGT,IH,IL [Tj=25°C] IGT IH & IL Tj(°C) 0.4 0.8 1.2 1.6 2.0 2.4 2.8 (dI/dt)c [(dV/dt)c] / Specified (dI/dt)c BW/CW/T1235 C B SW (dV/dt)c (V/µs) 0.1 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 1.0 10.0 100.0 (dI/dt)c [(dV/dt)c] / Specified (dI/dt)c TW (dV/dt)c (V/µs)

Fig. 9: Relative variation of critical rate of decrease of main current versus junction temperature. Fig. 10: D²PAK Thermal resistance junction to ambient versus copper surface under tab (printed circuit board FR4, copper thickness: 35µm). 0 25 50 75 100 1250 Tj (°C) (dI/dt)c [Tj] / (dI/dt)c [Tj specified] 0 4 8 1 21 62 02 42 83 23 64 00 S(cm²) Rth(j-a) (°C/W) D²PAK PACKAGE MECHANICAL DATA D²PAK (Plastic) REF. DIMENSIONS Millimeters Inches A 4.30 4.60 0.169 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.70 0.93 0.027 0.037 B2 1.25 1.40 0.048 0.055 C 0.45 0.60 0.017 0.024 C2 1.21 1.36 0.047 0.054 D 8.95 9.35 0.352 0.368 E 10.00 10.28 0.393 0.405 G 4.88 5.28 0.192 0.208 L 15.00 15.85 0.590 0.624 L2 1.27 1.40 0.050 0.055 L3 1.40 1.75 0.055 0.069 R 0.40 0.016 V2 0° 8° 0° 8° A D R 2.0 MIN. FLAT ZONE C G L B E FOOTPRINT DIMENSIONS (in millimeters) D²PAK (Plastic) 8.90 3.70 1.30 5.08 16.90 10.30

TO-220AB / TO-220AB Ins. REF. DIMENSIONS Millimeters Inches A 15.20 15.90 0.598 0.625 a1 3.75 0.147 a2 13.00 14.00 0.511 0.551 B 10.00 10.40 0.393 0.409 b1 0.61 0.88 0.024 0.034 b2 1.23 1.32 0.048 0.051 C 4.40 4.60 0.173 0.181 c1 0.49 0.70 0.019 0.027 c2 2.40 2.72 0.094 0.107 e 2.40 2.70 0.094 0.106 F 6.20 6.60 0.244 0.259 I 3.75 3.85 0.147 0.151 L 2.65 2.95 0.104 0.116 l2 1.14 1.70 0.044 0.066 l3 1.14 1.70 0.044 0.066 M 2.60 0.102 M B C A F L I e Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany Hong Kong - India - Isreal - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com