T0501MA CITC | Alldatasheet

Document overview

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Technical content

Features

□ Transient protection for high-speed data lines IEC 61000-4-2 (ESD) ±30kV (Contact) IEC 61000-4-4 (EFT) 40A (5/50 ns) Cable Discharge Event (CDE) □ Package optimized for high-speed lines □ Ultra-small package (0.6mmx0.3mmx0.3mm) □ Protects one data, control or power line □ Low capacitance: 12pF (Typical) □ Low leakage current: 0.1uA @VRWM (Typical) □ Low clamping voltage □ Each I/O pin can withstand over 1000 ESD strikes for ±8kV contact discharge

Description

T0501MA is a low-capacitance Transient Voltage Suppressor (TVS) designed to provide electrostatic discharge (ESD) protection for high-speed data interfaces. With typical capacitance of 12pF only, is designed to protect parasitic-sensitive systems against over-voltage and over-current transient events. It complies with IEC 61000-4-2 (ESD), Level 4 (±15kV air, ±8kV contact discharge), IEC 61000-4-4 (electrical fast transient - EFT) (40A,5/ 50 ns), very fast charged device model (CDM) ESD and cable discharge event (CDE), etc. uses ultra-small DFN0603 package. Each device can protect one data line . It offers system designers flexibility to protect single data line where space is a premium concern.

Applications

□ Portable Electronics □ Desktops, Servers and Notebooks □ Cellular Phones □ MP3 Ports □ Digital Camera Ports Mechanical Characteristics □ DFN0603-2L package □ Flammability Rating: UL 94V-0 □ Packaging: Tape and Reel Circuit Diagram I/O_1 I/O_2 Pin Configuration DFN0603 (Top View) T0501MA T0501MA Low Capacitance ESD Protection Device T0501MA Chip Integration Technology Corporation ±30kV (Air) T0501MA

Symbol Parameter Value Units VESD ESD per IEC 61000-4-2 (Air) ESD per IEC 61000-4-2 (Contact) ±30 ±30 kV TOPT Operating Temperature -55/+125 C TSTG Storage Temperature -55/+150 o C Electrical Characteristics (T = 25 C) Symbol Parameter VRWM Nominal Reverse Working Voltage IR Reverse Leakage Current @ VRWM VBR Reverse Breakdown Voltage @ IT IT Test Current for Reverse Breakdown VC Clamping Voltage @ IPP IPP Maximum Peak Pulse Current CESD Parasitic Capacitance VR Reverse Voltage f Small Signal Frequency V I VRWMVBRVC IPP IR IT VRWM VBR VC IPP IR IT Bi-Directional TVS Symbol Test Condition Minimum Typical Maximum Units VRWM IR VRWM = 5V, T = 25oC Between I/O_1 and I/O_2 0.1 1.0 μA VBR IT = 1mA Between I/O_1 and I/O_2 5.5 6.0 8.0 V VC IPP = 1A, tp = 8/20μs Between I/O_1 and I/O_2 VC IPP = 4A, tp = 8/20μs Between I/O_1 and I/O_2 CESD VR = 0V, f = 1MHz Between I/O_1 and I/O_2 pF 5.0 V 10 V 15 V 10 1 2 15 o o Document ID : DS-22V01 Revised Date : 2016/08/29 Revision : C Low Capacitance ESD Protection Device T0501MA Chip Integration Technology Corporation

TLP Measurement of I/O_1 to I/O_2 0 2 4 6 8 10 12 14 16 TLP Voltage (V) TLP Current (A) Voltage Sweeping of I/O_1 to I/O_2 -0.12 -0.10 -0.08 -0.06 -0.04 -0.02 0.00 0.02 0.04 0.06 0.08 0.10 0.12 -8 -6 -4 -2 0 2 4 6 8 Voltage (V) Current (A) Capacitance vs. Voltage of I/O_1 to I/O_2 (f = 1MHz) Capacitance vs. Reverse Voltage 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 0 1 2 3 4 5 Reverse Voltage (V) Capacitance (pF) ESD Clamping of I/O_1 to I/O_2 (+8kV Contact per IEC 61000-4-2) -20.0 -10.0 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 -50 0 50 100 150 200 Time (ns) Clamping Voltage (V) . Normalized Capacitance vs. Reverse Voltage 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 0 1 2 3 4 5 Reverse Voltage (V) Normalized Capacitance ESD Clamping of I/O_1 to I/O_2 (-8kV Contact per IEC 61000-4-2) -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 10.0 20.0 -50 0 50 100 150 200 Time (ns) Clamping Voltage (V) . Document ID : DS-22V01 Revised Date : 2016/08/29 Revision : C Low Capacitance ESD Protection Device T0501MA Chip Integration Technology Corporation

Document ID : DS-22V01 Revised Date : 2016/08/29 Revision : C Low Capacitance ESD Protection Device T0501MA Chip Integration Technology Corporation

Carries Tape Specification Device Orientation in Tape Note:All dimensions in mm unless otherwise specified 10, 000T0501MA 7inch A0 B0 K0 Date Code Location (Towards Sprocket Holes) Document ID : DS-22V01 Revised Date : 2016/08/29 Revision : C Low Capacitance ESD Protection Device T0501MA Chip Integration Technology Corporation

http://www.citcorp.com.tw/ Tel:886-3-5600628 Fax:886-3-5600636 ■CITC reserves the right to make changes to this document and its products and specifications at any time without notice. Customers should obtain and confirm the latest product information and specifications before final■ design, purchase or use. CITC makes no warranty, representation or guarantee regarding the suitability of its products for any■ particular purpose, nor does CITC assume any liability for application assistance or customer product design. CITC does not warrant or accept any liability with products which are purchased or used for any■ unintended or unauthorized application. No license is granted by implication or otherwise under any intellectual property rights of CITC.■ CITC products are not authorized for use as critical components in life support devices or systems■ without express written approval of CITC. Document ID : DS-22V01 Revised Date : 2016/08/29 Revision : C Low Capacitance ESD Protection Device T0501MA Chip Integration Technology Corporation