SW06BRC

SW06 AD | Alldatasheet

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REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a Quad SPST JFET Analog Switch SW06 Tel: 617/329-4700 Fax: 617/326-8703

FEATURES

Two Normally Open and Two Normally Closed SPST Switches with Disable Switches Can Be Easily Configured as a Dual SPDT or a DPDT Highly Resistant to Static Discharge Destruction Higher Resistance to Radiation than Analog Switches Designed with MOS Devices Guaranteed R ON Matching: 10% max Guaranteed Switching Speeds TON = 500 ns max TOFF = 400 ns max Guaranteed Break-Before-Make Switching Low “ON” Resistance: 80 V max Low R ON Variation from Analog Input Voltage: 5% Low Total Harmonic Distortion: 0.01% Low Leakage Currents at High Temperature T A = +125 8C: 100 nA max TA = +85 8C: 30 nA max Digital Inputs TTL/CMOS Compatible and Independent of V+ Improved Specifications and Pin Compatible to LF-11333/13333 Dual or Single Power Supply Operation Available in Die Form GENERAL DESCRIPTION The SW06 is a four channel single-pole, single-throw analog switch that employs both bipolar and ion-implanted FET devices. The SW06 FET switches use bipolar digital logic inputs which are more resistant to static electricity than CMOS devices. Ruggedness and reliability are inherent in the SW06 design and construction technology. Increased reliability is complemented by excellent electrical specifications. Potential error sources are reduced by minimizing “ON” resistance and controlling leakage currents at high tem- peratures. The switching FET exhibits minimal R ON variation over a 20 V analog signal range and with power supply voltage changes. Operation from a single positive power supply voltage is possible. With V+ = 36 V, V– = 0 V, the analog signal range will extend from ground to +32 V. PNP logic inputs are TTL and CMOS compatible to allow the SW06 to upgrade existing designs. The logic “0” and logic “1” input currents are at microampere levels reducing loading on CMOS and TTL logic.

REV. A–2– SW06–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units “ON” RESISTANCE R ON VS = 0 V, IS = 1 mA 60 80 60 100 100 150 Ω VS = ± 10 V, IS = 1 mA 65 80 65 100 100 150 RON MATCH BETWEEN SWITCHES R ON Match V S = 0 V, IS = 100 µA1 5 10 5 20 20 % ANALOG VOLTAGE RANGE V A IS = 1 mA2 +10 +11 +10 +11 +10 +11 V IS = 1 mA2 –10 –15 –10 –15 –10 –15 ANALOG CURRENT RANGE I A VS = ± 10 V 10 15 7 12 5 10 mA Δ RON VS. APPLIED VOLTAGE ΔRON –10 V ≤ VS ≤ 10 V, IS = 1.0 mA 5 15 10 20 10 20 % SOURCE CURRENT IN DRAIN CURRENT IN “ON” CONDITION I D(ON) LOGICAL “1” INPUT VOLTAGE V INH Full Temperature Range 2, 4 2.0 2.0 2.0 V LOGICAL “0” INPUT VOLTAGE V INL Full Temperature Range 2, 4 0.8 0.8 0.8 V LOGICAL “1” INPUT CURRENT I INH VIN = 2.0 V to 15.0 V 5 55 1 0 µA TURN-ON TIME t ON See Switching Time 340 500 340 600 340 700 ns Test Circuit4, 6 TURN-OFF TIME t OFF See Switching Time 200 400 200 400 200 500 ns Test Circuit4, 6 BREAK-BEFORE-MAKE TIME t ON–tOFF Note 7 50 140 50 140 50 140 ns SOURCE CAPACITANCE C S(OFF) VS = 0 V3 7.0 7.0 7.0 pF DRAIN CAPACITANCE C D(OFF) VS = 0 V3 5.5 5.5 5.5 pF CHANNEL “ON” CAPACITANCE C D(ON)+ VS = VD = 0 V3 15 15 15 pF CS(ON) “OFF” ISOLATION I SO(OFF) VS = 5 V rms, R L = 680 Ω ,5 8 5 8 5 8 d B CL = 7 pF, f = 500 kHz 3 CROSSTALK C T VS = 5 V rms, R L = 680 Ω ,7 0 7 0 7 0 d B CL = 7 pF, f = 500 kHz 3 DIS = “0”3 DIS = “0”3 “OFF”3 (@ V+ = +15 V, V– = –15 V and T A = +258C, unless otherwise noted)

REV. A –3– Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units TEMPERATURE RANGE T A Operating –55 +125 –25 +85 0 70 °C “ON” RESISTANCE R ON VS = 0 V, IS = 1.0 mA 75 110 75 125 75 175 Ω VS = ± 10 V, IS = 1.0 mA 80 110 80 125 80 175 Δ RON MATCH BETWEEN SWITCHES R ON Match V S = 0 V, IS = 100 µA1 6 20 6 25 10 % ANALOG VOLTAGE RANGE V A IS = 1.0 mA2 +10 +11 +10 +11 +10 +11 V IS = 1.0 mA2 –10 –15 –10 –15 –10 –15 ANALOG CURRENT RANGE I A VS = ± 10 V 7 12 5 11 11 mA Δ RON WITH APPLIED VOLTAGE Δ RON –10 V ≤ VS ≤ 10 V, IS = 1.0 mA 10 12 15 % SOURCE CURRENT IN V S = 10 V, VD = –10 V “OFF” CONDITION I S(OFF) TA = Max Operating Temp 3, 9 60 30 60 nA DRAIN CURRENT IN V S = 10 V, VD = –10 V “OFF” CONDITION I D(OFF) TA = Max Operating Temp 3, 9 60 30 60 nA LEAKAGE CURRENT IN I S(ON)+ VS = VD = ± 10 V 100 30 60 nA “ON” CONDITION I D(ON) TA = Max Operating Temp 3, 9 LOGICAL “1” INPUT CURRENT I INH VIN = 2.0 V to 15.0 V 5 10 10 15 µA LOGICAL “0” INPUT CURRENT I INL VIN = 0.8 V 4 10 4 10 5 15 µA TURN-ON TIME t ON See Switching Time 440 900 500 900 1000 ns Test Circuit4, 8 TURN-OFF TIME t OFF See Switching Time 300 500 330 500 500 ns Test Circuit4, 8 BREAK-BEFORE-MAKE TIME t ON–tOFF Note 7 70 70 50 ns POSITIVE SUPPLY CURRENT I+ All Channels “OFF,” 9.0 13.5 13.5 mA DIS = “0”3 NEGATIVE SUPPLY CURRENT I– All Channels “OFF,” 7.5 10.5 10.5 mA DIS = “0”3 GROUND CURRENT I G All Channels “ON” or 6.0 7.5 7.5 mA “OFF”3 NOTES (@ V+ = +15 V, V– = –15 V, –55 8C ≤ TA ≤ +1258C for SW06BQ, –40 8C ≤ TA ≤ +858C for SW06FQ and –40 8C ≤ TA ≤ +858C for SW06GP/GS, unless otherwise noted) 1VS = 0 V, I S = 100 µA. Specified as a percentage of R AVERAGE where: RAVERAGE = RON1 + RON2 + RON 3 + RON 4 4 . 2Guaranteed by R ON and leakage tests. For normal operation maximum analog signal voltages should be restricted to less than (V+) –4 V. 3Switch being tested ON or OFF as indicated, V INH = 2.0 V or V INL = 0.8 V, per logic truth table. 4Also applies to disable pin. 5Current tested at V IN = 2.0 V. This is worst case condition. 6Sample tested. 7Switch is guaranteed by design to provide break-before-make operation. 8Guaranteed by design. 9Parameter tested only at T A = +125°C for military grade device. Specifications subject to change without notice.

REV. A–4– WAFER TEST LIMITS SW06N SW06G Parameter Symbol Conditions Limit Limit Units “ON” RESISTANCE R ON –10 V ≤ VA ≤ 10 V, IS ≤ 1 mA 80 100 Ω max RON MATCH BETWEEN SWITCHES R ON Match V A = 0 V, IS ≤ 100 µA 15 20 % max ΔRON VS. VA ΔRON –10 V ≤ VA ≤ 10 V, IS ≤ 1 mA 10 20 % max POSITIVE SUPPLY CURRENT I+ Note 1 6.0 9.0 mA max NEGATIVE SUPPLY CURRENT I– Note 1 5.0 7.0 mA max GROUND CURRENT I G Note 1 4.0 4.0 mA max ANALOG VOLTAGE RANGE V A IS = 1 mA ± 10.0 ± 10.0 V min LOGIC “1” INPUT VOLTAGE V INH Note 2 2.0 2.0 V min LOGIC “0” INPUT VOLTAGE V INL Note 2 0.8 0.8 V max LOGIC “0” INPUT CURRENT I INL 0 V ≤ VIN ≤ 0.8 V 5.0 5.0 µA max LOGIC “1” INPUT CURRENT I INH 2.0 V ≤ VIN ≤ 15 V3 55 µA max ANALOG CURRENT RANGE I A VS = ± 10 mV 10 7 mA min NOTE Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing. TYPICAL ELECTRICAL CHARACTERISTICS SW06N SW06G Parameter Symbol Conditions Typical Typical Units “ON” RESISTANCE R ON –10 V ≤ VA ≤ 10 V, IS ≤ 1 mA 60 60 Ω TURN-ON TIME t ON 340 340 ns TURN-OFF TIME t OFF 200 200 ns DRAIN CURRENT IN “OFF” CONDITION I D(OFF) VS = 10 V, VD = –10 V 0.3 0.3 nA “OFF” ISOLATION I SO(OFF) f = 500 kHz, RL = 680 Ω 58 58 dB CROSSTALK C T f = 500 kHz, RL = 680 Ω 70 70 dB NOTES 1Power supply and ground current specified for switch “ON” or “OFF.” 2Guaranteed by R ON and leakage tests. 3Current tested at V IN = 2.0 V. This is worst case condition. (@ V+ = +15 V, V– = –15 V, T A = +258C, unless otherwise noted) (@ V+ = +15 V, V– = –15 V, T A = +258C, unless otherwise noted)

REV. A –5– ORDERING GUIDE Temperature Package Package Model Range Description Option SW06BQ –55 °C to +125°C Cerdip Q-16 SW06BRC –55 °C to +125°C LCC E-20A SW06FQ –40 °C to +85°C Cerdip Q-16 SW06GP –40 °C to +85°C Plastic DIP N-16 SW06GS –40 °C to +85°C SOL R-16 TRUTH TABLE Switch State Disable Logic Channels Channels Input Input 1 & 2 3 & 4

0 X OFF OFF

ABSOLUTE MAXIMUM RATINGS 1 Operating Temperature Range Analog Input Voltage Range Maximum Current Through Package Type uJA 2 uJC Units 16-Pin Hermetic DIP (Q) 100 16 °C/W 16-Pin Plastic DIP (P) 82 39 °C/W 20-Contact LCC (RC) 98 38 °C/W 16-Pin SOL (S) 98 30 °C/W NOTES 1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2θJA is specified for worst case mounting conditions, i.e., θJA is specified for device in socket for Cerdip, P-DIP, and LCC packages; θJA is specified for device soldered to printed circuit board for SO package. DICE CHARACTERISTICS Die Size 0.101 × 0.097 inch, 9797 sq. mils (2.565 × 2.464 mm, 6320 sq. mm) PIN CONNECTIONS 16-Pin DIP (Q or P-Suffix) 16-Pin SOL (S-Suffix) SW06BRC/883 (RC-Suffix)

SW06–Typical Performance Characteristics REV. A–6– “ON” Resistance vs. Analog Voltage Leakage Current vs. Analog Voltage Supply Current vs. Supply Voltage RON vs. Temperature Leakage Current vs. Temperature Switch Capacitance vs. Analog Voltage “ON” Resistance vs. Power Supply Voltage Switch Current vs. Voltage Supply Current vs. Temperature

REV. A –7– TON/TOFF Switching Response Insertion Loss vs. Frequency Switching Time vs. Analog Voltage Crosstalk and “OFF” Isolation vs. Frequency Switching Time vs. Temperature Total Harmonic Distortion Power Supply Rejection vs. Frequency Overvoltage Characteristics

SW06–Typical Performance Characteristics (Operating and Single Supply) REV. A–8– Leakage Current vs. V ANALOG Supply Current vs. Supply Voltage Switching Time vs. Supply Voltage Simplified Schematic Diagram (Typical Switch) NOTE These single-supply-operation characteristic curves are valid when the negative power supply V– is tied to the logic ground reference pin “GND.” TTL input compatibility is still main- tained when “GND” is the same potential as the TTL ground. t OFF is measured from 50% of logic input waveform to 0.9 V O. The analog voltage range extends from 0 V to V+ –4 V; the switch will no longer respond to logic control when V A is within 4 volts of V+. “On” Resistance vs. Analog Voltage

REV. A –9– “Off” Isolation Test Circuit Crosstalk Test Circuit Switching Time Test Circuit

which turns all switches OFF when taken active low. offsets will be in the 5 to 15 microvolt range. connecting GND and V– together to the logic ground supply. Figure 1. Functional Applications of SW06

REV. A –11– fastest reset times. The switch can easily handle any amount of capacitor discharge current subject only to the maximum heat dissipation of the package and the maximum operating junction temperature from which repetition can be established. SWITCHING Switching time tON and tOFF characteristics are plotted versus VANALOG and temperature. In all cases, t OFF is designed faster than tON to ensure a break-before-make interval for SPDT and DPDT applications. The disable input (DIS) has the same switching times (tON and tOFF) as the logic inputs (IN X). Switching transients occurring at the source and drain contacts results from ac coupling of the switching FETs gate-to-source and gate-to-drain coupling capacitance. The switch turn ON will cause a negative going spike to occur and the turn OFF will cause a positive spike to occur. These spikes can be reduced by additional capacitance loading, lower values of R L, or switching an additional switch (with its extra contact floating) to the op- posite state connected to the spike sensitive node. DISABLE NODE This TTL compatible node is similar to the logic inputs IN X but has an internal 2 µA current source pull-up. If disable is left un- connected, it will assume the logic “1” state, then the state of the switches is controlled only by the logic inputs IN X. POWER SUPPLIES This product operates with power supply voltages ranging from ± 12 to ± 18 volts; however, the specifications only guarantee device parameters with ± 15 volt ± 5% power supplies. The power supply sensitive parameters have plots to indicate effects of supply voltages other than ± 15 volts. Typical Applications Operation from Single Positive Power Supply High Off Isolation Selector Switch (Shunt-Series Switch) 4-Channel Sample Hold Amplifier

REV. A–12– Single Pole Double Throw Selector Switch with Break-Before-Make Interval OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Terminal Leadless Chip Carrier (RC-Suffix) E-20A 20 4 BOTTOM VIEW 18 0.028 (0.71) 0.022 (0.56) 45° TYP 0.015 (0.38) MIN 0.055 (1.40) 0.045 (1.14) 0.050 (1.27) BSC0.075 (1.91) REF 0.011 (0.28) 0.007 (0.18) R TYP 0.095 (2.41) 0.075 (1.90) 0.100 (2.54) BSC 0.200 (5.08) BSC 0.150 (3.81) BSC 0.075 (1.91) REF 0.358 (9.09) 0.342 (8.69) SQ 0.358 (9.09) MAX SQ 0.100 (2.54) 0.064 (1.63) 0.088 (2.24) 0.054 (1.37) 16-Lead Plastic DIP (P-Suffix) N-16 0.840 (21.33) 0.745 (18.93) 0.280 (7.11) 0.240 (6.10) PIN 1 SEATING PLANE 0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) MIN 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) BSC 0.160 (4.06) 0.115 (2.93) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 16-Lead Cerdip (Q-Suffix) Q-16 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) 15° 0.840 (21.34) MAX 0.200 (5.08) MAX 0.023 (0.58) 0.014 (0.36) 0.200 (5.08) 0.125 (3.18) 0.100 (2.54) BSC SEATING PLANE 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN 0.005 (0.13) MIN PIN 1 0.080 (2.03) MAX 0.310 (7.87) 0.220 (5.59) 1 8 16-Lead Wide Body SOL (S-Suffix) R-16/SOL-16 16 9 0.4133 (10.50) 0.3977 (10.00) 0.4193 (10.65) 0.3937 (10.00) 0.2992 (7.60) 0.2914 (7.40) PIN 1 SEATING PLANE 0.0118 (0.30) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.1043 (2.65) (1.27) BSC 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 0.0291 (0.74) 0.0098 (0.25)x 45°