SVFB21V105M NEC | Alldatasheet
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Document No. EC0003EJ3V1DS00 (3rd edition) Date Published June 1996 M CP(K) Printed in Japan The SV/F series features a built-in fuse to minimize circuit damage from over current by protection with less than a half blow-out current of the former type. This fuse-protected capacitor is suitable for noise absorption applications such as those required for comput- ers, terminals and measuring instruments.
FEATURES
™ Built-in fuse protection (2A) ™ High-temperature durability for either wave soldering or reflow soldering applications ™ The same excellent performance as NEC's R series ™ Wide operating temperature range (–55˚C to +125˚C) ™ High reliability (Failure rate = 1%/1 000H at 85˚C, DC rated voltage applied) DIMENSIONS Surface mount resin molded chip with Built-in fuse, Low blow-out current (2A) © 1992(1996) LL H H W1W1 W2W2 ZZZZ Y + –+ – [C and D case][B2 and D2 case] Case Code L W 1 W2 HZY (Unit : mm) MARKING The information in this document is subject to change without notice. F F 16 n 35 n [C and D case] [B2 and D2 case] Capacitance ( F) Rated voltage (V) Polarity (anode) and mark of built-in fuse Date code µ
DATA SHEET EC0003EJ3V1DS00 PRODUCT LINE-UP AND MARKING CODE 10 16 20 25 35 50
1.0 B2 C
1.5 B2
2.2 B2 C
3.3 B2 C D2
4.7 B2 C C D2, D
6.8 C D2, D D
10 C D2, D D
15 C, D2 D2 D
22 D2, D D
33 D2, D D
a n A N Feb b p B P Mar c q C Q Apr d r D R May e s E S Jun f t F T Jul g u G U Aug h v H V Sep j w J W Oct k x K X Nov l y L Y Dec m z M Z Month Year Date code will resume beginning in 1999. Capacitance (µ F) UR (Vdc) UR : Rated voltage PART NUMBER SYSTEM BULK (Packed in poly bag) TAPE AND REEL SVF B2 1V 105 M TE SVFB21V105M 8 R ⊕ Polarity mark ⊕ Polarity mark Feed direction Tape Tape R : (Standard) Orientation L : (Non-Standard) Orientation Feed direction Capacitance tolerance M for ± 20% Packing orientation Tape and reel Tape width 8 mm for B2 case 12 mm for C, D and D2 case Part number of bulk (see left) Capacitance code in pF First two digits represent significant figures. Third digit specifies number of zeros to follow. Rated voltage 1H : 50 V 1V : 35 V 1E : 25 V 1D : 20 V 1C : 16 V 1A : 10 V Case code SVF series
3DA TA SHEET EC0003EJ3V1DS00 SPECIFICATIONS No. Items 1 Operating Temp. Range
2 Rated Voltage
3 Surge Voltage
4 Derated Voltage
5 Capacitance Range
6 Capacitance Tolerance
7 Leakage Current
8 Tangent of loss angle
9 Surge Voltage Resistance
Temp. C/C Tangent of loss angle Leakage Current
11 Repid change of temperature
12 Resistance to soldering
13 Damp Heat (Steady state)
14 Endurance
–55 to +125˚C 10 16 20 25 35 50 Vdc 13 20 26 33 46 65 Vdc 6.3 10 13 16 22 32 Vdc 1.0 to 4.7 µ F ± 20% 0.01 CV (µ A) or 0.5 µ A whichever is greater 1.0 to 4.7 µ F : 0.04 max. 6.8 to 47 µ F : 0.06 max. C/C : ± 5% Tangent of loss angle : Initial requirement Leakage Current : Initial requirement –55˚C +85˚C +125˚C %% % 6.8 to 47 µ F : 0.10 requirement 6.8 to 47 µ F : 0.08 0.1 CV or 5 µ A 0.125 CV or 6.25 – – whichever is µ A whichever is greater greater C/C : ± 5% Tangent of loss angle : Initial requirement Leakage Current : Initial requirement C/C : ± 5% Tangent of loss angle : Initial requirement Leakage Current : Initial requirement C/C : ± 5% Tangent of loss angle : 150% of Intial requirement Leakage Current : Initial requirement C/C : ± 10% Tangent of loss angle : Initial requirement Leakage Current : 125% of Initial requirement B2 : 2A – 5 sec. max. C : 2A – 10 sec. max. D2, D : 2A – 20 sec. max. Test Conditions Over 85˚C, applied voltage shall be derated on the basis of the Derated Voltage at 125˚C specified in this table item no.4 up to 85˚C up to 85˚C at 125˚C at 120 Hz at 120 Hz 5 min. after rated voltage applied at 25˚C, 120 Hz at 85˚C Surge voltage for 30 sec. (Rs = 1 kΩ ) Discharge for 4 min. 30 sec. 1 000 cycles Step1 : +25˚C Step2 : –55˚C Step3 : +25˚C Step4 : +85˚C Step5 : +125˚C Step6 : +25˚C IEC68-2-14 Test N and IEC68-2-33 Guidance –55 to +125˚C 5 cycles IEC68-2-58 Test Td Fully immersion to solder at 260˚C for 5 sec. IEC68-2-3 Test Ca at 40˚C, 90 to 95% RH, for 500H at 85˚C Rated Voltage applied for 2 000 H at 25˚C –12 +12 +15 Fuse Blow-out Characteristics LEGEND CV : Product of capacitance in µ F and voltage in V C/C : Capacitance change ratio∆ Characteris- tics at high and low temperature
DATA SHEET EC0003EJ3V1DS00 PART NUMBER WITH FUNDAMENTAL PERFORMANCE Rated Voltage (Vdc) Capacitance (µ F) 4.7 3.3 4.7 6.8 2.2 4.7 1.5 3.3 6.8 6.8 1.0 2.2 4.7 4.7 6.8 1.0 3.3 Tangent of loss angle max. 0.04 0.06 0.06 0.06 0.06 0.06 0.04 0.04 0.06 0.06 0.06 0.06 0.06 0.06 0.04 0.04 0.06 0.06 0.06 0.06 0.04 0.04 0.06 0.06 0.06 0.04 0.04 0.04 0.04 0.06 0.04 0.04 Leakage Current (µ A) max. 0.5 1.5 1.5 3.3 3.3 4.7 0.5 0.7 1.0 1.6 2.4 3.5 3.5 5.2 0.5 0.9 2.0 2.0 3.0 4.4 0.5 0.8 1.7 1.7 2.5 0.5 0.7 1.6 1.6 2.3 0.5 1.7 Part Number SVFB21A475M SVFC1A156M SVFD21A156M SVFD21A336M SVFD1A336M SVFD1A476M SVFB21C335M SVFC1C475M SVFC1C685M SVFC1C106M SVFD21C156M SVFD21C226M SVFD1C226M SVFD1C336M SVFB21D225M SVFC1D475M SVFD21D106M SVFD1D106M SVFD1D156M SVFD1D226M SVFB21E155M SVFC1E335M SVFD21E685M SVFD1E685M SVFD1E106M SVFB21V105M SVFC1V225M SVFD21V475M SVFD1V475M SVFD1V685M SVFC1H105M SVFD21H335M Case Code C D D C C C D D C D D D C D D C D D C
5DA TA SHEET EC0003EJ3V1DS00 TAPE AND REEL SPECIFICATION [Carrier Tape Specification and Packaging Quantity] sprocket hole embossed cavity feed direction FE W K t P2 P0 Tape width (Unit : mm) A φ178± 2.0 φ178± 2.0 N φ 50 min. φ 50 min. C φ 13± 0.5 φ 13± 0.5 D φ 21± 0.5 φ 21± 0.5 B 20±0.5 20± 0.5 10.0±1.0 14.5± 1.0 14.5 max. 18.5 max. R A0± 0.2 3.3 3.7 5.1 4.8 B0± 0.2 3.8 6.4 6.2 7.7 W± 0.3 8.0 12.0 12.0 12.0 F±0.05 3.5 5.5 5.5 5.5 E± 0.1 1.75 1.75 1.75 1.75 P1± 0.1 4.0 8.0 8.0 8.0 P2± 0.05 2.0 2.0 2.0 2.0 (Unit : mm) Case Code C D φ1.5 φ1.5 φ1.5 φ1.5 K± 0.2 2.1 3.0 3.6 3.3 t 0.2 0.3 0.4 0.3 Q'ty/Reel 2 000 500 500 500 P0± 0.1 4.0 4.0 4.0 4.0 Case Code C D [Reel Specification] C N A D B R +0.1
DATA SHEET EC0003EJ3V1DS00 CHARACTERISTICS DATA Characteristics at high and low temperature C/C (%) –12 0.08 0.06 0.04
0.02 Tangent of loss angle
0.1 0.01 0.001 25˚C2 5 ˚C8 5 ˚C
35 V/1 Fµ
125˚C2 5˚C–55˚C C/C (%) –12 0.08 0.06 0.04 0.1 0.01 0.001 25˚C2 5 ˚C8 5 ˚C
10 V/33 Fµ
125˚C2 5˚C–55˚C Leakage Current ( A) µ Leakage Current ( A) µ
7DA TA SHEET EC0003EJ3V1DS00 Resistance to soldering (immersing at 260˚C for 10 sec.) (reference data) C/C (%) 0.08 0.06 0.04 0.1 0.01 0.001 C/C (%) 0.08 0.06 0.04 0.1 0.01 0.001 Leakage Current ( A) µ Leakage Current ( A) µ
DATA SHEET EC0003EJ3V1DS00 Damp heat (steady state) (65˚C, 90 to 95% RH) (reference data) C/C (%) 0.08 0.06 0.04 0.1 0.01 0.001 0 h 1 000 h 500 h 0 h 1 000 h 500 h C/C (%) 0.08 0.06 0.04 0.1 0.01 0.001 Leakage Current ( A) µ Leakage Current ( A) µ
9DA TA SHEET EC0003EJ3V1DS00 Endurance (85˚C, Rated Voltage × 1.3 applied) (reference data) C/C (%) 0.08 0.06 0.04 0.1 0.01 0.001 Leakage Current ( A) µ Leakage Current ( A) µ 0 h 1 000 h 500 h 0 h 1 000 h 500 h C/C (%) 0.08 0.06 0.04 0.1 0.01 0.001
DATA SHEET EC0003EJ3V1DS00 Fuse Blow-out Characteristics Impedance – Frequency characteristics (reference data) 0.1 100 Current (A) C Case 0.1 100 Current (A) D2 CaseB2 Case 0.1 100 Current (A) Time (sec.) Note : “ ” is not for blow-out. 100 0.1 1 k 10 k 1 M 100 k Frequency (Hz) Z (Ω ) 10 M 16 V/3.3 Fµ
16 V/22 Fµ
16 V/10 Fµ
11DA TA SHEET EC0003EJ3V1DS00 GUIDE TO APPLICATIONS FOR TANTALUM CHIP CAPACITORS The failure of the solid tantalum capacitor is mostly classified into a short-circuiting mode and a large leakage current mode. SV/F series features a built-in-fuse to minimize circuit damage from short circuiting current, but the fuse may not work under some environmental conditions. Refer to the following in detail for reliable circuit design. 1. Expecting Reliability SV/F series tantalum chip capacitors are typically applied to decoupling, blocking, bypassing and filtering. The SV/F series has a very high reliability (low failure rate) in the field. For example, the maximutn field failure rate of an SV/F series capacitor with a DC rated voltage of 16 V is 0.0004%/ 1000 hour (4 Fit) at an applied voltage of 5 V, operating temperature of 25˚C and series resistance of 3 Ω . The maximum failure rate in the field is estimated by the following expression : λ : Maximum field failure rate λ 0 : 1% 1000 hour (The failure rate of the SV/F series at the full DC rated voltage at operating tempera ture of 85˚C and series resistance of 3 Ω .) V : Applied voltage in actual use V0 : DC Rated voltage T : Operating temperature in actual use T0 : 85˚C 120 102 101 100 10–1 0.2 0.1 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 10–2 10–3 10–4 10–5 110 100 Operating temperature T (˚C) Failure rate multiplier F Applied voltage ratio V/ V0 The nomograph is provided for quick estimation of maximum fieid failure rates. Connect operating temperature T and applied voltage ratio V/V 0 of interest with a straight line. The failure rate multiplier F is given at the inter- section of this line with the model scale. The failure rate is obtained as λ = λ 0 •F. Examples : Given V/V0 = 0.4 and T = 45˚C, read F = 4 × 10–3 Hence, λ = 0.004%/1000 hour (40 Fit) Given V/V0 = 0.3 and T = 25˚C, read F = 4 × 10–4 Hence, λ = 0.0004%/1000 hour (4 Fit) V λ = λ 0 × 2 T-T0
13DA TA SHEET EC0003EJ3V1DS00 5. Reverse voltage Because the capacitors are polarized, reverse voltage should not be applied. If reverse voltage cannot be avoided because of circuit design, the voltage application should be for a very short time and should not exceed the following. 10% of DC rated voltage at 25˚C 5% of DC rated voltage at 85˚C 1% of DC rated voltage at 125˚C 6. Mounting (1) Direct soldering Keep in mind the following points when soldering the capacitor by means of jet soldering or dip soldering: (a) Temporarily fixing resin Because the SV/F series solid tantalum capacitors are larger in size and subject to more force than the chip multilayer ceramic capacitors or chip resistors, more resin is required to temporarily secure the solid tantalum capacitors. However, if too much resin is used, the resin adhering to the patterns on a printed circuit board may adversely affect the solderability. (b) Pattern design a b ca Case a b c B2 3.0 2.8 1.6 C 4.1 2.3 2.4 D2 5.4 2.9 2.4 D 5.2 2.9 3.7 The above dimensions are for reference only. If the capacitor is to be mounted by this method, and if the pattern is too small, the solderability may be degraded. (c) Temperature and time Keep the peak temperature and time to within the following values: Solder temperature … 260˚C max. Whenever possible, perform preheating (at 150 ˚C max.) for smooth temperature profile. To maintain the reliability, mount the capacitor at a low temperature and in a short time whenever possible. (d) Component layout If many types of chip components are mounted on a printed circuit board which is to be soldered by means of jet soldering, solderability may not be uniform over the entire board depending on the layout and density of the components on the board (also take into consideration generation of flux gas). (e) Flux Use resin-based flux. Do not use flux with strong acidity.
DATA SHEET EC0003EJ3V1DS00 (2) Reflow soldering Keep in mind the following points when soldering the capacitor in a soldering oven or with a hot plate: (a) Pattern design The above dimensions are for reference only. Note that if the pattern is too big, the component may not be mounted in place. (b) Temperature and time Keep the peak temperature and time to within the following values: Solder temperature …… 260˚C max. Time : 10 seconds max. Whenever possible, perform preheating (at 150 ˚C max.) for smooth temperature profile. To maintain the reliability, mount the capacitor at a low temperature and in a short time whenever possible. The peak temperature and time shown above are applicable when the capacitor is to be soldered in a soldering oven or with a hot plate. When the capacitor is soldered by means of infrared reflow soldering, the internal temperature of the capacitor may rise beyond the surface temperature. (3) Using soldering iron When soldering the capacitor with a soldering iron, controlling the temperature at the tip of the soldering iron is very difficult. However, it is recommended that the following temperature and time be observed to maintain the reliability of the capacitor: lron temperature …… 300˚C max. Iron power …………… 30 W max. Case a b c B2 1.6 2.8 1.6 C 2.4 2.3 2.4 D2 2.4 2.9 2.4 D 2.4 2.9 3.7 a b ca
15DA TA SHEET EC0003EJ3V1DS00 7. Cleaning Generally, several organic solvents are used for flux cleaning of an electronic component after soldering. Many cleaning methods, such as immersion cleaning, rinse cleaning, brush cleaning, shower cleaning, vapor cleaning, and ultrasonic cleaning, are available, and one of these cleaning methods may be used alone or two or more may be used in combination. The temperature of the organic solvent may vary from room temperature to several 10˚C, depending on the desired effect. If cleaning is carried out with emphasis placed only on cleaning effect, however, the marking on the electronic component cleaned may be erased, the appearance of the com- ponent may be damaged, and in the worst case, the component may be functionally damaged. It is therefore recommended that the SV/F series solid tantalum capacitor be cleaned under the following conditions: [Recommended conditions of flux cleaning] (1) Cleaning solvent ……… Chlorosen, isopropyl alcohol (2) Cleaning method …… Shower cleaning, rinse cleaning, vapor cleaning (3) Cleaning time ………… 5 minutes max. ∗ Ultrasonic cleaning This cleaning method is extremely effective for eliminating dust that has been generated as a result of me- chanical processes, but may pose a problem depending on the condition. As a result of an experiment conducted by NEC, it was confirmed that the external terminals of the capacitor were cut when it was cleaned with some ultrasonic cleaning machines. The cause of this phenomenon is considered metal fatigue of the capacitor termi- nals that occurred due to ultrasonic cleaning. To prevent the terminal from being cut, decreasing the output power of the ultrasonic cleaning machine or shortening the cleaning time may be a possible solution. However, it is difficult to specify the safe cleaning conditions because there are many factors involved such as the conver- sion efficiency of the ultrasonic oscillator, transfer efficiency of the cleaning bath, difference in cleaning effect depending on the location in the cleaning bath, the size and quantity of the printed circuit boards to be cleaned, and the securing states of the components on the boards. It is therefore recommended that ultrasonic cleaning be avoided as much as possible. If ultrasonic cleaning is essential, make sure through experiments that no abnormality occur as a result of the cleaning. For further information, consult NEC. 8. Others (1) Do not apply excessive vibration and shock to the capacitor. (2) The solderability of the capacitor may be degraded by humidity. Store the capacitor at (–5 to +40˚C) room temperature and (40 to 60% RH) humidity. (3) Exercise care that no external force is applied to the tape packaged products (if the packaging material is deformed, the capacitor may not be automatically mounted by a chip mounter).
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