STY60NM60 STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 600V - 0.050Ω - 60A Max247 Zener-Protected MDmesh™Power MOSFET /square6 TYPICAL R DS (on) = 0.050Ω /square6 HIGH dv/dt AND AVALANCHE CAPABILITIES /square6 IMPROVED ESD CAPABILITY /square6 LOW INPUT CAPACITANCE AND GATE CHARGE /square6 LOW GATE INPUT RESISTANCE /square6 TIGHT PROCESS CONTROL /square6 INDUSTRY’S LOWEST ON-RESISTANCE

DESCRIPTION

The MDmesh™ is a new revolutionary MOSFET technology that associates the Multiple Drain pro- cess with the Company’s PowerMESH™ horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company’s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competition’s products.

APPLICATIONS

The MDmesh™ family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies.

ORDERING INFORMATION

TYPE V DSS R DS(on) ID STY60NM60 600V < 0.055 Ω 60 A SALES TYPE MARKING PACKAGE PACKAGING STY60NM60 Y60NM60 Max247 TUBE Max247 INTERNAL SCHEMATIC DIAGRAM

(•)Pulse width limited by safe operating area (1) ISD ≤60A, di/dt≤400 A/µs, VDD ≤ V(BR)DSS ,Tj≤ TJMAX. THERMAL DATA AVALANCHE CHARACTERISTICS GATE-SOURCE ZENER DIODE PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Symbol Parameter Value Unit VDS Drain-source Voltage (VGS =0 ) 600 V VDGR Drain-gate Voltage (RGS =2 0kΩ ) 600 V VGS Gate- source Voltage ±30 V ID Drain Current (continuous) at TC = 25°C 60 A ID Drain Current (continuous) at TC = 100°C 37.8 A IDM (/circle6 ) Drain Current (pulsed) 240 A PTOT Total Dissipation at TC = 25°C 560 W VESD(G-S) Gate source ESD(HBM-C=100pF, R=15KΩ) 6K V Derating Factor 4.5 W/°C dv/dt (1) Peak Diode Recovery voltage slope 15 V/ns Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C Rthj-case Thermal Resistance Junction-case Max 0.22 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 30 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tjmax) 30 A EAS Single Pulse Avalanche Energy (starting Tj= 25 °C, ID =IAR ,VDD =3 5V ) 1.4 J Symbol Parameter Test Conditions Min. Typ. Max. Unit BV GSO Gate-Source Breakdown Voltage Igs=± 1mA (Open Drain) 30 V

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) ON/OFF DYNAMIC SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 600 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) VDS = Max Rating 10 µA VDS = Max Rating, TC = 125°C 100 µA IGSS Gate-body Leakage Current (VDS =0 ) VGS = ± 20V ±10 µA VGS(th) Gate Threshold Voltage VDS =V GS ,ID = 250 µA 34 5V R DS(on) Static Drain-source On Resistance VGS =1 0V ,ID = 30 A 0.050 0.055 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs(1) Forward Transconductance V DS =ID(on)xR DS(on)max, ID =3 0A 35 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5V ,f=1M H z ,VGS = 0 7300 2000 pF pF pF R G Gate Input Resistance f=1 MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain 1.8 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD =3 0 0V ,ID =3 0A R G = 4.7Ω VGS =1 0V (see test circuit, Figure 3) ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD =4 7 0V ,ID =6 0A , VGS =1 0V 178 44.5 266 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time VDD = 400 V, ID =6 0A , R G =4 . 7Ω, VGS =1 0V (see test circuit, Figure 5) 130 105 ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (2) Source-drain Current Source-drain Current (pulsed) 240 A A VSD (1) Forward On Voltage ISD =6 0A ,VGS =0 1.5 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 60 A, di/dt = 100 A/µs, VDD =3 0V ,Tj= 150°C (see test circuit, Figure 5) 600 ns µC A

Safe Operating Area Thermal Impedance Transconductance Transfer CharacteristicsOutput Characteristics Static Drain-source On Resistance

Capacitance VariationsGate Charge vs Gate-source Voltage Normalized BVDSS vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Gate Threshold Voltage vs Temp.

Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4:Gate Charge test Circuit Fig. 2:Unclamped Inductive WaveformFig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuit For Resistive Load

DIM. mm inch A 4.70 5.30 A1 2.20 2.60 b 1.00 1.40 b1 2.00 2.40 b2 3.00 3.40 c 0.40 0.80 D 19.70 20.30 e 5.35 5.55 E 15.30 15.90 L 14.20 15.20 L1 3.70 4.30 P025Q Max247 MECHANICAL DATA

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