STY34NB50F STMICROELECTRONICS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 8

Technical content

N - CHANNEL 500V - 0.11Ω - 34 A - Max247 PowerMESH  MOSFET n TYPICAL RDS(on) = 0.11Ω n EXTREMELY HIGH dv/dt CAPABILITY n ± 30V GATE TO SOURCE VOLTAGE RATING n 100% AVALANCHE TESTED n LOW INTRINSIC CAPACITANCE n GATE CHARGE MINIMIZED n REDUCED VOLTAGE SPREAD

DESCRIPTION

Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an ad- vanced family of power MOSFETs with outstand- ing performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.

APPLICATIONS

n HIGH CURRENT, HIGH SPEED SWITCHING n SWITCH MODE POWER SUPPLY (SMPS) n DC-AC CONVERTER FOR WELDING EQUIPMENT AND UNINTERRUPTABLE POWER SUPPLY AND MOTOR DRIVE INTERNAL SCHEMATIC DIAGRAM December 1999 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DS Drain-source Voltage (VGS =0 ) 5 0 0 V V DGR Drain- gate Voltage (RGS =2 0k Ω ) 500 V V GS Gate-source Voltage ± 30 V ID Drain Current (continuous) at Tc =2 5 oC3 4 A ID Drain Current (continuous) at Tc = 100 oC 21.4 A IDM (•) Drain Current (pulsed) 136 A P tot Total Dissipation at Tc =2 5 oC4 5 0 W Derating Factor 3.61 W/ o C dv/dt(1) Peak Diode Recovery voltage slope 4.5 V/ns Tstg Storage Temperature -65 to 150 o C Tj Max. Operating Junction Temperature 150 o C (•) Pulse width limited by safe operating area ( 1)ISD ≤34 A, di/dt≤ 200 A/µs, VDD ≤ V(BR)DSS ,Tj≤ TJMAX TYPE V DSS R DS(on) ID STY34NB50F 500 V < 0.14 Ω 34 A 2 3 Max247 

Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 0.277 0.1 300 oC/W oC/W oC/W oC AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 34 A E AS Single Pulse Avalanche Energy (starting Tj =2 5 oC, ID =I AR ,V DD =5 0V ) 1000 mJ ELECTRICAL CHARACTERISTICS (Tcase =2 5oC unless otherwise specified) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit V (BR)DSS Drain-source Breakdown Voltage ID =2 5 0µ AV GS =0 500 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) V DS =M a xR a t i n g V DS = Max Rating T c =1 2 5 oC 100 µ A µ A IGSS Gate-body Leakage Current (VDS =0 ) V GS = ± 30 V ± 100 nA ON (∗) Symbol Parameter Test Conditions Min. Typ. Max. Unit V GS(th) Gate Threshold Voltage V DS =V GS ID = 250 µ A 345V R DS(on) Static Drain-source On Resistance V GS =1 0V I D = 17 A 0.11 0.14 Ω ID(on) On State Drain Current VDS >I D(on) xR DS(on )max V GS =1 0V 34 A DYNAMIC Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (∗)F o r w a r d Transconductance V DS >I D(on) xR DS(on )max ID =1 7A 2 7 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5V f=1M H z V GS =0 5 . 9 880 nF pF pF STY34NB50F

ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Time Rise Time V DD = 250 V I D =17 A R G =4 . 7 Ω V GS =15 V (see test circuit, figure 3) ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 400 V ID =3 4A V GS =1 0V 1 4 0 196 nC nC nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V DD = 400 V I D =1 7A R G =4 . 7 Ω V GS =1 5V (see test circuit, figure 5) ns ns ns SOURCE DRAIN DIODE Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) 136 A A V SD (∗) Forward On Voltage I SD =3 4A V GS =0 1 . 6 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD =3 4A d i / d t=1 0 0A / µ s V DD = 100 V T j =1 5 0o C (see test circuit, figure 5) 715 11.8 ns µ C A (∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance STY34NB50F

Gate Charge vs Gate-sourceVoltage Transfer Characteristics Static Drain-source On Resistance Capacitance Variations STY34NB50F

Normalized Gate Threshold Voltage vs Temperature Source-drain Diode Forward Characteristics Normalized On Resistance vs Temperature STY34NB50F

Fig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuits For Resistive Load Fig. 2:Unclamped Inductive Waveform Fig. 4:Gate Charge test Circuit Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times STY34NB50F

DIM. mm inch A 4.70 5.30 A1 2.20 2.60 b 1.00 1.40 b1 2.00 2.40 b2 3.00 3.40 c 0.40 0.80 D 19.70 20.30 e 5.35 5.55 E 15.30 15.90 L 14.20 15.20 L1 3.70 4.30 P025Q Max247 MECHANICAL DATA STY34NB50F

Information furnished is believed to be accurate and reliable. However, STMicroelect ronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics  1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japa n - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com STY34NB50F