STY100NS20FD_06 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuit
  • 4 Package mechanical data
  • 5 Revision history

N-channel 200V - 0.022Ω - 100A - Max247 MESH OVERLAY™ Power MOSFET General features ■ Extremely high dv/dt capability ■ 100% avalanche tested ■ Gate charge minimized ■ ± 20V gate to source voltage rating ■ Low intrinsic capacitance ■ Fast body-drain diode:low trr, Qrr

Description

Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of Power MOSFETs with outstanding performances. The new patented STrip layout coupled with the Company’s proprietary edge termination structure, gives the lowest R DS(ON) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.

Applications

■ Switching application Internal schematic diagram Type V DSS RDS(on) ID STY100NS20FD 200V <0.024 Ω 100A 2 3 Max247 Order codes Part number Marking Package Packaging STY100NS20FD Y100NS20FD Max247 Tube

1 Electrical ratings

Table 1. Absolute maximum ratings

  1. Pulse width limited by safe operating area

Table 2. Thermal resistance Table 3. Avalanche data

2 Electrical characteristics

Table 4. On/off states Table 5. Dynamic

  1. Pulsed: pulse duration=300µs, duty cycle 1.5%

Table 6. Switching times Table 7. Source drain diode

  1. Pulse width limited by safe operating area
  2. Pulsed: pulse duration=300µs, duty cycle 1.5%

2.1 Electrical characteri stics (curves)

Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance

3 Test circuit

Figure 12. Switching times test circuit for Figure 13. Gate charge test circuit Figure 14. Test circuit for inductive load Figure 15. Unclamped inductive load test Figure 16. Unclamped inductive wavefo rm Figure 17. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at : www.st.com

DIM. mm inch A 4.70 5.30 A1 2.20 2.60 b 1.00 1.40 b1 2.00 2.40 b2 3.00 3.40 c 0.40 0.80 D 19.70 20.30 e 5.35 5.55 E 15.30 15.90 L 14.20 15.20 L1 3.70 4.30 P025Q Max247 MECHANICAL DATA

5 Revision history

Table 8. Revision history