STU2N62K3 STMICROELECTRONICS | Alldatasheet

Document overview

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  • PDF pages: 25

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package mechanical data
  • 5 Packaging mechanical data
  • 6 Revision history

Features

■ 100% avalanche tested ■ Extremely high dv/dt capability ■ Gate charge minimized ■ Very low intrinsic capacitance ■ Improved diode reverse recovery characteristics ■ Zener-protected

Applications

■ Switching applications

Description

These SuperMESH3™ Power MOSFETs are the result of improvements applied to STMicroelectronics’ SuperMESH™ technology, combined with a new optimized vertical structure. These devices boast an extremely low on- resistance, superior dynamic performance and high avalanche capability, rendering them suitable for the most demanding applications. Figure 1. Internal schematic diagram Table 1. Device summary

1 Electrical ratings

Table 2. Absolute maximum ratings

  1. Limited by maximum junction temperature
  2. Pulse width limited by safe operating area
  3. I SD ≤ 2.2 A, di/dt ≤ 400 A/µs,VDS peak ≤ V(BR)DSS, VDD = 80% V(BR)DSS

Table 3. Thermal data

2 Electrical characteristics

Table 4. On /off states Table 5. Dynamic

  1. Time related is defined as a constant equivalent capacitance giving the same charging time as C oss when

integrity. These integrated Zener diodes thus avoid the usage of external components. Table 6. Switching times Table 7. Source drain diode

  1. Pulse width limited by safe operating area
  2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%

Table 8. Gate-source Zener diode

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for DPAK and Figure 3. Thermal impedance for DPAK and Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP Figure 6. Safe operating area for TO-220 and Figure 7. Thermal impedance for TO-220 and

Figure 8. Output characteristics Figure 9. Transfer characteristics Figure 10. Gate charge vs gate-source voltage Figure 11. Static drain-source on-resistance Figure 12. Capacitance variations Figure 13. Output capacitance stored energy

3.5 VDS=15V

3 Test circuits

Figure 19. Switching times test circuit for Figure 20. Gate charge test circuit Figure 21. Test circuit for inductive load Figure 22. Unclamped inductive load test Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform

Package mechanical data STB/D/F/P/U2N62K3 10/25 Doc ID 018898 Rev 2

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

Table 9. D²PAK (TO-263) mechanical data

Table 10. DPAK (TO-252) mechanical data

Table 11. TO-220FP mechanical data

Figure 29. TO-220FP drawing

Table 12. TO-220 type A mechanical data

Figure 30. TO-220 type A drawing

Table 13. IPAK (TO-251) mechanical data

Figure 31. IPAK (TO-251) drawing

5 Packaging mechanical data

Table 14. DPAK (TO-252) tape and reel mechanical data

Table 15. D²PAK (TO-263) tape and reel mechanical data

6 Revision history

Table 16. Document revision history and Section 5: Packaging mechanical data have been modified.