STD2LN60K3 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package mechanical data
  • 5 Packaging mechanical data
  • 6 Revision history

Features

■ 100% avalanche tested ■ Extremely high dv/dt capability ■ Very low intrinsic capacitance ■ Improved diode reverse recovery characteristics ■ Zener-protected

Applications

■ Switching applications

Description

These SuperMESH3™ Power MOSFETs are the result of improvements applied to STMicroelectronics’ SuperMESH™ technology, combined with a new optimized vertical structure. These devices boast an extremely low on- resistance, superior dynamic performance and high avalanche capability, rendering them suitable for the most demanding applications. Figure 1. Internal schematic diagram Table 1. Device summary

1 Electrical ratings

Table 2. Absolute maximum ratings

  1. Pulse width limited by safe operating area
  2. I SD ≤ 2 A, di/dt ≤ 400 A/µs, peak VDS < V(BR)DSS

Table 3. Thermal data Table 4. Avalanche characteristics

2 Electrical characteristics

Table 5. On /off states Table 6. Dynamic

  1. C oss eq. time related is defined as a constant equivalent capacitance giving the same charging time as Coss
  2. C oss eq. energy related is defined as a constant equiva lent capacitance giving the same stored energy as

Table 7. Switching times Table 8. Source drain diode

  1. Pulse width limited by safe operating area.
  2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%

Table 9. Gate-source Zener diode

  1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s

usage of external components.

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for DPAK and Figure 3. Thermal impedance for DPAK and Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP Figure 6. Output characteristics Figure 7. Transfer characteristics

3 Test circuits

Figure 17. Switching times test circuit for Figure 18. Gate charge test circuit Figure 19. Test circuit for inductive load Figure 20. Unclamped Inductive load test Figure 21. Unclamped inductive waveform Figure 22. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

Table 10. DPAK (TO-252) mechanical data

Figure 23. DPAK (TO-252) drawing

Table 11. TO-220FP mechanical data

Figure 24. TO-220FP drawing

Table 12. IPAK (TO-251) mechanical data

Figure 25. IPAK (TO-251) drawing

5 Packaging mechanical data

Figure 26. DPAK footprint (a) Table 13. DPAK (TO-252) tape and reel mechanical data

6 Revision history

Table 14. Document revision history 05-Jul-2012 1 First release.