STU16NB50 STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 500V - 0.28Ω - 15.6A-Max220 PowerMESH  MOSFET n TYPICAL RDS(on) = 0.28Ω n EXTREMELY HIGH dv/dt CAPABILITY n 100% AVALANCHE TESTED n VERY LOW INTRINSIC CAPACITANCES n GATE CHARGE MINIMIZED n ± 30V GATE TO SOURCE VOLTAGE RATING

DESCRIPTION

Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest R DS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.

APPLICATIONS

n SWITCH MODE POWER SUPPLIES (SMPS) n DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DS Drain-source Voltage (VGS =0 ) 5 0 0 V V DGR Drain- gate Voltage (RGS =2 0k Ω ) 500 V V GS Gate-source Voltage ± 30 V ID Drain Current (continuous) at Tc =2 5 oC1 5 . 6 A ID Drain Current (continuous) at Tc =1 0 0oC9 . 8 A IDM (•) Drain Current (pulsed) 62 A P tot Total Dissipation at Tc =2 5 oC1 6 0 W Derating Factor 1.28 W/ o C dv/dt(1) Peak Diode Recovery voltage slope 4.5 V/ns Tstg Storage Temperature -65 to 150 o C Tj Max. Operating Junction Temperature 150 o C (•) Pulse width limited by safe operating area ( 1)ISD ≤16A, di/dt≤ 200 A/µs, VDD ≤ V(BR)DSS ,T j≤ TJMAX September 1999 TYPE V DSS R DS(on) ID STU16NB50 500 V < 0.33 Ω 15.6 A 123 Max220

Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 0.78 62.5 0.5 300 oC/W oC/W oC/W oC AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 15.6 A E AS Single Pulse Avalanche Energy (starting Tj =2 5 oC, ID =I AR ,V DD =5 0V ) 850 mJ ELECTRICAL CHARACTERISTICS (Tcase =2 5oC unless otherwise specified) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit V (BR)DSS Drain-source Breakdown Voltage ID =2 5 0µ AV GS = 0 @ 100 oC 500 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) V DS =M a xR a t i n g V DS = Max Rating T c =1 2 5oC µ A µ A IGSS Gate-body Leakage Current (VDS =0 ) V GS = ± 30 V ± 100 nA ON (∗) Symbol Parameter Test Conditions Min. Typ. Max. Unit V GS(th) Gate Threshold Voltage V DS =V GS ID = 250 µ A 345V R DS(on) Static Drain-source On Resistance V GS =1 0 V ID =7.8 A 0.28 0.33 Ω ID(on) On State Drain Current VDS >I D(on) xR DS(on )max V GS =1 0V 15.6 A DYNAMIC Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (∗)F o r w a r d Transconductance V DS >I D(on) xR DS(on )max ID =7.8 A 9 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5V f=1M H z V GS = 0 2850 400 3710 520 pF pF pF STU16NB50

ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Time Rise Time V DD = 250 V I D =7 . 8A R G =4 . 7 Ω VGS =1 0V ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 400 V I D =15.6 A V GS =1 0V 6 7 88 nC nC nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V DD = 400 V I D = 15.6 A R G =4 . 7 Ω V GS =1 0V ns ns ns SOURCE DRAIN DIODE Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) 15.6 A A V SD (∗) Forward On Voltage I SD =1 5 . 6A VGS =0 1 . 6 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 15.6 A di/dt = 100 A/µs V DD = 100 V T j =1 5 0oC 600 6.8 22.5 ns µ C A (∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area STU16NB50

Fig. 1:Unclamped Inductive Load Test CircuitFig. 2:Unclamped Inductive Waveform Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 3:Switching Times Test Circuits For Resistive Load Fig. 4:Gate Charge test Circuit STU16NB50

DIM. mm inch A 4.3 4.6 0.169 0.181 A1 2.2 2.4 0.087 0.094 A2 2.9 3.1 0.114 0.122 b 0.7 0.93 0.027 0.036 b1 1.25 1.4 0.049 0.055 b2 1.2 1.38 0.047 0.054 c 0.45 0.6 0.18 0.023 D 15.9 16.3 0.626 0.641 D1 9 9.35 0.354 0.368 D2 0.8 1.2 0.031 0.047 D3 2.8 3.2 0.110 0.126 e 2.44 2.64 0.096 0.104 E 10.05 10.35 0.396 0.407 L 13.2 13.6 0.520 0.535 L1 3 3.4 0.118 0.133 A C D3 D1D2 D b E L e P011R Max220 MECHANICAL DATA STU16NB50

Information furnished is believed to be accurate and reliable. However, STMicroelect ronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics  1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com STU16NB50