STU12N60M2 STMICROELECTRONICS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 12

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package information
  • 4.1 IPAK (TO-251) Type A package information
  • 5 Revision history

Features

Order code VDS RDS(on) max. ID PTOT STU12N60M2 600 V 0.450 Ω 9 A 85 W

  • Extremely low gate charge
  • Excellent output capacitance (COSS) profile
  • 100% avalanche tested
  • Zener-protected

Applications

  • Switching applications

Description

This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. Table 1: Device summary Order code Marking Package Packing STU12N60M2 12N60M2 IPAK Tube TAB IPAK

1 Electrical ratings

Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate-source voltage ±25 V ID Drain current (continuous) at Tcase = 25 °C 9 A Drain current (continuous) at Tcase = 100 °C 5.7 IDM (1) Drain current (pulsed) 36 A PTOT Total dissipation at Tcase = 25 °C 85 W dv/dt(2) Peak diode recovery voltage slope 15 V/ns dv/dt(3) MOSFET dv/dt ruggedness 50 Tstg Storage temperature -55 to 150 °C Tj Operating junction temperature Notes: (1) Pulse width is limited by safe operating area. (2) ISD ≤ 9 A, di/dt=400 A/μs; VDS(peak) < V(BR)DSS, VDD = 80% V(BR)DSS. (3) VDS ≤ 480 V. Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case 1.47 °C/W Rthj-amb Thermal resistance junction-ambient 62.5 Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR (1) Avalanche current, repetitive or not repetitive 2.6 A EAR (2) Single pulse avalanche energy 117 mJ Notes: (1) Pulse width limited by Tjmax. (2) starting Tj = 25 °C, ID = IAR, VDD = 50 V.

2 Electrical characteristics

(Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 600 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 600 V µA VGS = 0 V, VDS = 600 V, Tcase = 125 °C 100 IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 4.5 A 0.395 0.450 Ω Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 538 - pF Coss Output capacitance - 29 - Crss Reverse transfer capacitance - 1.1 - Coss eq. (1) Equivalent output capacitance V DS = 0 to 480 V, VGS = 0 V - 106 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 7 - Ω Qg Total gate charge VDD = 400 V, ID = 9 A, VGS = 10 V (see Figure 15: "Gate charge test circuit") - 16 - nC Qgs Gate-source charge - 2.3 - Qgd Gate-drain charge - 8.5 - Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 300 V, ID = 4.5 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Switching times test circuit for resistive load" and Figure 19: "Switching time waveform") - 9.2 - ns tr Rise time - 9.2 - td(off) Turn-off delay time - 5 - tf Fall time - 18 -

Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current 9 A ISDM (1) Source-drain current (pulsed) 36 A VSD (2) Forward on voltage VGS = 0 V, ISD = 9 A - 1.6 V trr Reverse recovery time ISD = 9 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 284 ns Qrr Reverse recovery charge - 2.4 µC IRRM Reverse recovery current - 17 A trr Reverse recovery time ISD = 9 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 404 ns Qrr Reverse recovery charge - 3.5 µC IRRM Reverse recovery current - 17.5 A Notes: (1) Pulse width is limited by safe operating area. (2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%.

2.1 Electrical characteristics (curves)

Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance ID 0.1 0.01 0.1 1 10010 (A) 100µs 1ms 10ms 10 10µs Operation in this area islimited by max R DS(on) VDS(V) Tj = 150 °C Tc = 25 °C Single pulse GIPD290120151436ALS GC20460 K Tp(s)10210-310-410-5 101 10-2 10-1 100 δ = 0.5 δ = 0.2 δ = 0.1 δ = 0.01 SINGLE PULSE δ = 0.02 δ = 0.05 tp Ƭ Zth = KRthj-c δ = tp / Ƭ

3 Test circuits

Figure 14: Switching times test circuit for resistive load Figure 15: Gate charge test circuit Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

4.1 IPAK (TO-251) Type A package information

Figure 20: IPAK (TO-251) type A package outline

Table 9: IPAK (TO-251) type A package mechanical data Dim. mm Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 b 0.64 0.90 0.95 b4 5.20 5.40 0.30 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 E 6.40 6.60 e 2.28 e1 4.40 4.60 H 16.10 L 9.00 9.40 L1 0.80 1.20 0.80 1.00 10°

5 Revision history

Table 10: Document revision history Date Revision Changes 22-May-2015 1 First release.