STS12NF30L STMICROELECTRONICS | Alldatasheet
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N - CHANNEL 30V - 0.0085Ω - 12A SO-8 STripFET POWER MOSFET n TYPICAL RDS(on) = 0.0085Ω n STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY n LOW THRESHOLD DRIVE
DESCRIPTION
This Power MOSFET is the second generation of STMicroelectronics unique ” Single Feature Size ” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
n BATTERY MANAGMENT IN NOMADIC EQUIPMENT n POWER MANAGEMENT IN PORTABLE/DESKTOPPC s INTERNAL SCHEMATIC DIAGRAM May 1999 SO-8 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DS Drain-source Voltage (VGS =0 ) 3 0 V V DGR Drain- gate Voltage (RGS =2 0k Ω )3 0 V V GS Gate-source Voltage ± 20 V ID Drain Current (continuous) at Tc = 25oC Drain Current (continuous) at Tc =1 0 0oC 7.5 A A IDM (•) Drain Current (pulsed) 48 A P tot Total Dissipation at Tc =2 5 oC 2.5 W (•) Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STS12NF30L 30 V < 0.01 Ω 12 A
(*)Thermal Resistance Junction-ambient Maximum Operating Junction Temperature Storage Temperature 150 -55 to 150 oC/W oC oC (*)Mounted on FR-4 board (t≤ 10sec) ELECTRICAL CHARACTERISTICS (Tcase =2 5oC unless otherwise specified) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit V (BR)DSS Drain-source Breakdown Voltage ID =2 5 0µ AV GS =0 3 0 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) V DS =M a xR a t i n g V DS =M a xR a t i n g T c =1 2 5oC µ A µ A IGSS Gate-body Leakage Current (VDS =0 ) V GS = ± 20 V ± 100 nA ON (∗) Symbol Parameter Test Conditions Min. Typ. Max. Unit V GS(th) Gate Threshold Voltage VDS =V GS ID = 250 µ A1 1 . 6 2 . 5 V R DS(on) Static Drain-source On Resistance V GS =1 0V I D =6A V GS =4 . 5V ID =6A 0.0085 0.01 0.01 0.012 Ω Ω ID(on) On State Drain Current VDS >I D(on) xR DS(on )max V GS =1 0V 12 A DYNAMIC Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (∗)F o r w a r d Transconductance V DS >I D(on) xR DS(on )max ID =6A 2 0 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5V f=1M H z V GS = 0 V 2400 590 200 pF pF pF STS12NF30L
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time V DD =1 5V I D =6A R G =4 . 7 Ω V GS =4 . 5V (Resistive Load, see fig. 3) ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =2 4V I D =1 2A V GS =4 . 5V 3 5 50 nC nC nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time V DD =1 5V I D =6A R G =4 . 7 Ω V GS =4 . 5V (Resistive Load, see fig. 3) ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V clamp =2 4V I D =1 2A R G =4 . 7 Ω V GS =4 . 5V (Inductive Load, see fig. 5) ns ns ns SOURCE DRAIN DIODE Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) A A V SD (∗)F o r w a r d O n V o l t a g e ISD =1 2A V GS =0 1 . 2 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 12 A di/dt = 100 A/ µ s V DD =1 5V T j =1 5 0oC (see test circuit, fig. 5) ns nC A (∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance STS12NF30L
Gate Charge vs Gate-sourceVoltage Transfer Characteristics Static Drain-source On Resistance Capacitance Variations STS12NF30L
Normalized Gate Threshold Voltage vs Temperature Source-drain Diode Forward Characteristics Normalized On Resistance vs Temperature STS12NF30L
Fig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuits For Resistive Load Fig. 2:Unclamped Inductive Waveform Fig. 4:Gate Charge test Circuit Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times STS12NF30L
DIM. mm inch A 1.75 0.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45 (typ.) D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M 0.6 0.023 S 8 (max.) 0016023 SO-8 MECHANICAL DATA STS12NF30L
Information furnished is believed to be accurate and reliable. However, STMicroelect ronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com STS12NF30L