STS10PF30L STMICROELECTRONICS | Alldatasheet

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Table 4: THERMAL DATA (*) When Mounted on 1 inch2 FR-4 board, 2 oz of Cu and t /c62/c3 10 sec. ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) Table 5: OFF Table 6: ON (*) Table 7: DYNAMIC Rthj-amb Rthj-lead Tl Tstg (*) Thermal Resistance Junction-ambient Thermal Resistance Junction-leads Maximum Lead Temperature For Soldering Purpose storage temperature Max Max Typ 150 -55 to 150 °C/W °C/W Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 30 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 16 V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS I D = 250 µA 1V R DS(on) Static Drain-source On Resistance VGS = 10 V I D = 5 A VGS = 4.5 V I D = 5 A 0.012 0.015 0.014 0.018 Ω Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs Forward Transconductance VDS = 10 V I D =5 A 31 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25V, f = 1 MHz, VGS = 0 2300 750 115 pF pF pF

Table 8: SWITCHING ON Table 9: SWITCHING OFF Table 10: SOURCE DRAIN DIODE (*) Pulse width /c62 300 µs, duty cycle 1.5 %. (•) Pulse width limited by TJMAX Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 15 V I D = 5 A R G =4 . 7 Ω V GS = 4.5 V (Resistive Load, Figure 15) ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 15V ID = 10A VGS =4.5V (see test circuit, Figure 16) 6.8 7.6 39 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time VDD = 15 V I D = 5 A R G =4 . 7Ω, V GS = 4.5 V (Resistive Load, Figure 15) ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM Source-drain Current Source-drain Current (pulsed) A A VSD (*) Forward On Voltage ISD = 10 A V GS = 0 1.2 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 10 A di/dt = 100A/µs VDD = 15 V T j = 150°C (see test circuit, Figure 17) 48.5 2.8 ns nC A ELECTRICAL CHARACTERISTICS (continued) Figure 3: Safe Operating Area Figure 4: Thermal Impedance

Fig. 16: Gate Charge test Circuit Fig. 17: Test Circuit For Diode Recovery Behav- iour Fig. 15: Switching Times Test Circuits For Resis- tive Load

DIM. mm inch A1 . 7 5 0 . 0 6 8 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45 (typ.) D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 e1 . 2 7 0 . 0 5 0 e3 3.81 0.150 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M0 . 6 0 . 0 2 3 S8 ( m a x . ) 0016023 SO-8 MECHANICAL DATA

Table 11:Revision History Date Revision Description of Changes May 2005 2.0 completed whit curves

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