STP9NK50Z

STP9NK50Z STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

N-CHANNEL 500V - 0.72Ω - 7.2A TO-220/TO-220FP/D2PAK Zener-Protected SuperMESH™ Power MOSFET ■ TYPICAL R DS (on) = 0.72 Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ GATE CHARGE MINIMIZED ■ VERY LOW INTRINSIC CAPACITANCES ■ VERY GOOD MANUFACTURING REPEATIBILITY

DESCRIPTION

The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip- based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is tak- en to ensure a very good dv/dt capability for the most demanding applications. Such series comple- ments ST full range of high voltage MOSFETs in- cluding revolutionary MDmesh™ products.

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING ■ IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC ■ LIGHTING

ORDERING INFORMATION

TYPE V DSS R DS(on) ID Pw STP9NK50Z STP9NK50ZFP STB9NK50Z 500 V 500 V 500 V < 0.85 Ω < 0.85 Ω < 0.85 Ω 7.2 A 7.2 A 7.2 A 110 W 30 W 110 W SALES TYPE MARKING PACKAGE PACKAGING STP9NK50Z P9NK50Z TO-220 TUBE STP9NK50ZFP P9NK50ZFP TO-220FP TUBE STB9NK50ZT4 B9NK50Z D 2PAK TAPE & REEL TO-220 TO-220FP D 2PAK INTERNAL SCHEMATIC DIAGRAM

STP9NK50Z - STP9NK50ZFP - STB9NK50Z ABSOLUTE MAXIMUM RATINGS (/c108 ) Pulse width limited by safe operating area (1) ISD ≤7.2A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS , Tj ≤ TJMAX. (*) Limited only by maximum temperature allowed THERMAL DATA AVALANCHE CHARACTERISTICS GATE-SOURCE ZENER DIODE PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and cost- effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Symbol Parameter Value Unit STP9NK50Z STB9NK50Z STP9NK50ZFP VDS Drain-source Voltage (VGS = 0) 500 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 500 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuous) at TC = 25°C 7.2 7.2 (*) A ID Drain Current (continuous) at TC = 100°C 4.5 4.5 (*) A IDM (/c108 ) Drain Current (pulsed) 28.8 28.8 (*) A PTOT Total Dissipation at TC = 25°C 110 30 W Derating Factor 0.88 0.24 W/°C VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ) 3500 V dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns VISO Insulation Withstand Voltage (DC) - 2500 V Tj Tstg Operating Junction Temperature Storage Temperature -55 to 150 -55 to 150 TO-220 D 2PAK TO-220FP Rthj-case Thermal Resistance Junction-case Max 1.14 4.2 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 7.2 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 190 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit BV GSO Gate-Source Breakdown Voltage Igs=± 1mA (Open Drain) 30 V

STP9NK50Z - STP9NK50ZFP - STB9NK50Z ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF DYNAMIC SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS . Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 1 mA, VGS = 0 500 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating, TC = 125 °C µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20V ±10 µA VGS(th) Gate Threshold Voltage VDS = VGS , ID = 100µA 3 3.75 4.5 V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 3.6 A 0.72 0.85 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS = 15 V, ID = 3.6 A 5.3 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25V, f = 1 MHz, VGS = 0 910 125 pF pF pF C oss eq. (3) Equivalent Output Capacitance VGS = 0V, VDS = 0V to 400V 75 pF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 250 V, ID = 3.6 A R G = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3) ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 400V, ID = 7.2 A, VGS = 10V nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit t d(off) tf Turn-off Delay Time Fall Time VDD = 250 V, ID = 3.6 A R G =4 . 7Ω VGS = 10 V (Resistive Load see, Figure 3) ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time VDD = 400V, ID = 7.2 A, R G =4 . 7Ω, VGS = 10V (Inductive Load see, Figure 5) ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit I SD ISDM (2) Source-drain Current Source-drain Current (pulsed) 7.2 28.8 A A VSD (1) Forward On Voltage ISD = 7.2 A, VGS = 0 1.6 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 7.2 A, di/dt = 100A/µs VDD = 40 V, Tj = 150°C (see test circuit, Figure 5) 238 1.5 12.6 ns µC A

STP9NK50Z - STP9NK50ZFP - STB9NK50Z Transfer CharacteristicsOutput Characteristics Thermal Impedance For TO-220FPSafe Operating Area For TO-220FP Safe Operating Area For TO-220/D2PAK Thermal Impedance For TO-220/D2PAK

STP9NK50Z - STP9NK50ZFP - STB9NK50Z Gate Charge vs Gate-source Voltage Normalized On Resistance vs TemperatureNormalized Gate Threshold Voltage vs Temp. Capacitance Variations Transconductance Static Drain-source On Resistance

STP9NK50Z - STP9NK50ZFP - STB9NK50Z Maximum Avalanche Energy vs Temperature Normalized BVDSS vs TemperatureSource-drain Diode Forward Characteristics

STP9NK50Z - STP9NK50ZFP - STB9NK50Z Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load

STP9NK50Z - STP9NK50ZFP - STB9NK50Z DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C

STP9NK50Z - STP9NK50ZFP - STB9NK50Z A B D E H G ¯ F 123F2 L4L5 DIM. mm. inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.5 0.045 0.067 F2 1.15 1.5 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 TO-220FP MECHANICAL DATA

STP9NK50Z - STP9NK50ZFP - STB9NK50Z DIM. mm. inch A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 D1 8 0.315 E 10 10.4 0.393 E1 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 0.126 R 0.4 0.015 V2 0 º8 º D 2PAK MECHANICAL DATA

STP9NK50Z - STP9NK50ZFP - STB9NK50Z TAPE AND REEL SHIPMENT (suffix ”T4”)* TUBE SHIPMENT (no suffix)* D 2PAK FOOTPRINT * on sales type DIM. mm inch MIN. MAX. MIN. MAX. A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0795 G 24.4 26.4 0.960 1.039 N 100 3.937 T 30.4 1.197 BASE QTY BULK QTY 1000 1000 REEL MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. MAX. A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626 D 1.5 1.6 0.059 0.063 D1 1.59 1.61 0.062 0.063 E 1.65 1.85 0.065 0.073 F 11.4 11.6 0.449 0.456 K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 11.9 12.1 0.468 0.476 P2 1.9 2.1 0.075 0.082 R 50 1.574 T 0.25 0.35 0.0098 0.0137 W 23.7 24.3 0.933 0.956 TAPE MECHANICAL DATA

STP9NK50Z - STP9NK50ZFP - STB9NK50Z Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com