STD9N65M2 STMICROELECTRONICS | Alldatasheet

Document overview

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  • PDF pages: 23

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package mechanical data
  • 4.1 DPAK, STD9N65M2
  • 4.2 TO-220FP , STF9N65M2
  • 4.3 TO-220, STP9N65M2
  • 4.4 IPAK, STU9N65M2
  • 5 Packaging mechanical data
  • 6 Revision history

Features

  • Extremely low gate charge
  • Excellent output capacitance (Coss) profile
  • 100% avalanche tested
  • Zener-protected

Applications

  • Switching applications

Description

These devices are N-channel Power MOSFETs developed using the MDmesh™ M2 technology. Thanks to the strip layout associated to an improved vertical structure, the devices exhibit both low on-resistance and optimized switching characteristics. They are therefore suitable for the most demanding high efficiency converters. TO-220FP 1 2 TAB DPAK TO-220 TAB IPAK TAB AM15572v1 , TAB Order codes V DS RDS(on) max ID STD9N65M2 650 V 0.9 Ω 5 A STF9N65M2 STP9N65M2 STU9N65M2 Table 1. Device summary

1 Electrical ratings

Table 2. Absolute maximum ratings

  1. Current limited by package.
  2. Pulse width limited by safe operating area.

Table 3. Thermal data

  1. When mounted on 1 inch² FR-4, 2 Oz copper board

Table 4. Avalanche characteristics

2 Electrical characteristics

Table 5. On /off states Table 6. Dynamic

  1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%

Table 7. Switching times

Table 8. Source drain diode

  1. Pulse width limited by safe operating area.
  2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for DPAK and Figure 3. Thermal impedance for DPAK and Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP Figure 6. Safe operating area for TO-220 Figure 7. Thermal impedance for TO-220

Figure 14. Normalized gate threshold voltage vs Figure 15. Normalized on-resistance vs Figure 16. Source-drain diode forward Figure 17. Normalized V(BR)DSS vs temperature

2 ISD(A)

3 Test circuits

Figure 18. Switching times test circuit for Figure 19. Gate charge test circuit Figure 20. Test circuit for inductive load Figure 21. Unclamped inductive load test circuit Figure 22. Unclamped inductive waveform Figure 23. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

4.1 DPAK, STD9N65M2

Figure 24. DPAK (TO-252) type A drawing

Table 9. DPAK (TO-252) type A mechanical data

Figure 25. DPAK (TO-252) type A footprint (a)

4.2 TO-220FP , STF9N65M2

Figure 26. TO-220FP drawing

Table 10. TO-220FP mechanical data

4.3 TO-220, STP9N65M2

Figure 27. TO-220 type A drawing

Table 11. TO-220 type A mechanical data

4.4 IPAK, STU9N65M2

Figure 28. IPAK (TO-251) drawing

Table 12. IPAK (TO-251) mechanical data

5 Packaging mechanical data

Figure 29. Tape for DPAK (TO-252)

Figure 30. Reel for DPAK (TO-252) Table 13. DPAK (TO-252) tape and reel mechanical data

6 Revision history

Table 14. Document revision history 24-Feb-2014 1 First release.