STP8NS25

STP8NS25 STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 250V - 0.38Ω - 8A TO-220/TO-220FP MESH OVERLAY™ MOSFET ■ TYPICAL R DS (on) = 0.38 Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED

DESCRIPTION

Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an ad- vanced family of power MOSFETs with outstanding performance. The new patented STrip layout cou- pled with the Company’s proprietary edge termina- tion structure, makes it suitable in coverters for lighting applications.

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STP8NS25 STP8NS25FP 250 V 250 V < 0.45 Ω < 0.45 Ω 8 A 8 A Symbol Parameter Value Unit STP8NS25 STP8NS25FP VDS Drain-source Voltage (VGS = 0) 250 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 250 V VGS Gate- source Voltage ± 20 V ID Drain Current (continuos) at TC = 25°C 8 8(*) A ID Drain Current (continuos) at TC = 100°C 5 5(*) A IDM (● ) Drain Current (pulsed) 32 32(*) A PTOT Total Dissipation at TC = 25°C 80 30 W Derating Factor 0.64 0.24 W/°C dv/dt (1) Peak Diode Recovery voltage slope 5 V/ns VISO Insulation Withstand Voltage (DC) - 2000 V Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C (1) ISD ≤ 8A, di/dt≤300 A/µs, VDD ≤ V(BR)DSS , Tj≤TjMAX (*)Limited only by maximum temperature allowed INTERNAL SCHEMATIC DIAGRAM TO-220 TO-220FP

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC TO-220 TO-220FP Rthj-case Thermal Resistance Junction-case Max 1.56 4.11 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Rthc-sink Thermal Resistance Case-sink Typ 0.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 250 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1µ A VDS = Max Rating, TC = 125 °C 10 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ±20V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS , ID = 250µA 234V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 4 A 0.38 0.45 Ω ID(on) On State Drain Current V DS > ID(on) x RDS(on)max, VGS =1 0 V Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS > ID(on) x RDS(on)max, ID =4 A 78 S C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 770 pF C oss Output Capacitance 118 pF C rss Reverse Transfer Capacitance 48 pF

Safe Operating Area for TO-220 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD = 125 V, ID = 4 A R G = 4.7Ω VGS = 10 V (see test circuit, Figure 3) 13 ns tr Rise Time 18 ns Q g Total Gate Charge VDD = 200V, ID = 8 A, VGS = 10V 37 51.8 nC Q gs Gate-Source Charge 5.2 nC Q gd Gate-Drain Charge 14.8 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(Voff) tf Turn-off- Delay Time Fall Time VDD = 125V, ID = 4 A, R G =4 . 7Ω, VGS = 10V (see test circuit, Figure 3) ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time Vclamp = 200V, ID = 8 A, R G =4 . 7Ω, VGS = 10V (see test circuit, Figure 5) 12.5 12.5 ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 8 A ISDM (2) Source-drain Current (pulsed) 32 A VSD (1) Forward On Voltage ISD = 8 A, VGS = 0 1.7 V trr Reverse Recovery Time ISD = 8 A, di/dt = 100A/µs VDD = 30V, Tj = 150°C (see test circuit, Figure 5) 198 ns Q rr Reverse Recovery Charge 1.1 µC IRRM Reverse Recovery Current 11.3 A Safe Operating Area for TO-220FP

Thermal Impedence for TO-220FP Static Drain-source On ResistanceTransconductance Output Characteristics Transfer Characteristics Thermal Impedence for TO-220

Source-drain Diode Forward Characteristics Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp. Gate Charge vs Gate-source Voltage Capacitance Variations

Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load

DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C

DIM. mm inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 A B D E H G ¯ F 123F2 TO-220FP MECHANICAL DATA

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