STP8NM50 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 9
Technical content
N-CHANNEL 500V - 0.7Ω - 8A TO-220/TO-220FP MDmesh™Power MOSFET (*)Limited only by maximum temperature allowed /c110 TYPICAL R DS (on) = 0.7Ω /c110 HIGH dv/dt AND AVALANCHE CAPABILITIES /c110 100% AVALANCHE TESTED /c110 LOW INPUT CAPACITANCE AND GATE CHARGE /c110 LOW GATE INPUT RESISTANCE
DESCRIPTION
The MDmesh ™ is a new revolutionary MOSFET technology that associates the Multiple Drain pro- cess with the Company’s PowerMESH™ horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company’s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competition’s products.
APPLICATIONS
The MDmesh™ family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies. ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STP8NM50 STP8NM50FP 500V 500V < 0.8Ω < 0.8Ω 8 A 8 A Symbol Parameter Value Unit STP8NM50 STP8NM50FP VDS Drain-source Voltage (VGS = 0) 500 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 500 V VGS Gate- source Voltage ±30 V ID Drain Current (continuous) at TC = 25°C 5 5 (*) A ID Drain Current (continuous) at TC = 100°C 3.1 3.1 (*) A IDM (/c108 ) Drain Current (pulsed) 20 20 (*) A PTOT Total Dissipation at TC = 25°C 120 30 W Derating Factor 0.4 W/°C dv/dt Peak Diode Recovery voltage slope 15 V/ns VISO Insulation Winthstand Voltage (DC) -- 2500 V Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature TO-220 TO-220FP INTERNAL SCHEMATIC DIAGRAM
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS . TO-220 / I²PAK TO-220FP Rthj-case Thermal Resistance Junction-case Max 1.04 4.21 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 2.5 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 200 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 500 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1µ A VDS = Max Rating, TC = 125 °C 10 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ±30V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS , ID = 250µA 345V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 2.5A 0.7 0.8 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS > ID(on) x RDS(on)max, ID = 2.5A 2.4 S C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 415 pF C oss Output Capacitance 88 pF C rss Reverse Transfer Capacitance 12 pF C oss eq. (2) Equivalent Output Capacitance VGS = 0V, VDS = 0V to 400V 50 pF R G Gate Input Resistance f=1 MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain 3 Ω
ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD = 250V, ID = 2.5A R G = 4.7Ω VGS = 10V (see test circuit, Figure 3) 16 ns tr Rise Time 8 ns Q g Total Gate Charge VDD = 400V, ID = 5A, VGS = 10V 13 nC Q gs Gate-Source Charge 4 nC Q gd Gate-Drain Charge 6 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) Off-voltage Rise Time VDD = 400V, ID = 5A, R G = 4.7Ω, VGS = 10V (see test circuit, Figure 5) 14 ns tf Fall Time 6 ns tc Cross-over Time 13 ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 5 A ISDM (2) Source-drain Current (pulsed) 20 A VSD (1) Forward On Voltage ISD = 5A, VGS = 0 1.5 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Charge I SD = 5A, di/dt = 100A/µs, VDD = 100 V, Tj = 25°C (see test circuit, Figure 5) 185 1.1 11.5 ns µC A trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Charge ISD = 5A, di/dt = 100A/µs, VDD = 100 V, Tj = 150°C (see test circuit, Figure 5) 270 1.6 ns µC A Safe Operating Area For TO-220FPSafe Operating Area For TO-220
Static Drain-source On Resistance Thermal Impedance For TO-220 Thermal Impedance For TO-220FP Transfer Characteristics Transconductance Output Characteristics
Normalized Gate Threshold Voltage vs Temp. Source-drain Diode Forward Characteristics Capacitance VariationsGate Charge vs Gate-source Voltage Normalized On Resistance vs Temperature
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load
DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C
DIM. mm inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 A B D E H G ¯ F 123F2 TO-220FP MECHANICAL DATA
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com