STP8N90K5 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 13
Technical content
Datasheet sections
- 1 Electrical ratings
- 2 Electrical characteristics
- 2.1 Electrical characteristics (curves)
- 3 Test circuits
- 4 Package information
- 4.1 TO-220 type A package information
- 5 Revision history
Features
Order code VDS RDS(on) max. ID STP8N90K5 900 V 0.68 Ω 8 A Industry’s lowest RDS(on) x area Industry’s best FoM (figure of merit) Ultra-low gate charge 100% avalanche tested Zener-protected
Applications
Switching applications
Description
This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1: Device summary Order code Marking Package Packing STP8N90K5 8N90K5 TO-220 Tube 1 2 3 TO-220 TAB
1 Electrical ratings
Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate-source voltage ±30 V ID(1) Drain current (continuous) at TC = 25 °C 8 A ID(1) Drain current (continuous) at TC = 100 °C 5 A ID(2) Drain current pulsed 32 A PTOT Total dissipation at TC = 25 °C 130 W dv/dt (3) Peak diode recovery voltage slope 4.5 V/ns dv/dt (4) MOSFET dv/dt ruggedness 50 TJ Operating junction temperature range -55 to 150 °C Tstg Storage temperature range Notes: (1)Limited by maximum junction temperature. (2)Pulse width limited by safe operating area (3)ISD ≤ 8 A, di/dt ≤ 100 A/μs; VDS peak ≤ V(BR)DSS (4)VDS ≤ 720 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case 0.96 °C/W Rthj-amb Thermal resistance junction-ambient 62.5 °C/W Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited by TJ max) 2.7 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) 250 mJ
2 Electrical characteristics
TC = 25 °C unless otherwise specified Table 5: On/off-state Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 900 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 900 V 1 µA VGS = 0 V, VDS = 900 V, TC = 125 °C(1) 50 µA IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 3 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 4 A 0.60 0.68 Ω Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 426 - pF Coss Output capacitance - 41 - pF Crss Reverse transfer capacitance - 1.2 - pF Co(tr)(1) Equivalent capacitance time related VDS = 0 to 720 V, VGS = 0 V - 75 - pF Co(er)(2) Equivalent capacitance energy related - 28 - pF Rg Intrinsic gate resistance f = 1 MHz , ID= 0 A - 7 - Ω Qg Total gate charge VDD = 720 V, ID = 8 A, VGS= 10 V (see Figure 15: "Test circuit for gate charge behavior") - 11 - nC Qgs Gate-source charge - 3.5 - nC Qgd Gate-drain charge - 4.8 - nC Notes: (1)Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS (2)Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS
Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD= 450 V, ID = 4 A, RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 14.7 - ns tr Rise time - 13.2 - ns td(off) Turn-off delay time - 36.4 - ns tf Fall time - 13.5 - ns Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current 8 A ISDM(1) Source-drain current (pulsed) 32 A VSD(2) Forward on voltage ISD = 8 A, VGS = 0 V - 1.5 V trr Reverse recovery time ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 371 ns Qrr Reverse recovery charge - 4.27 µC IRRM Reverse recovery current - 23 A trr Reverse recovery time ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 582 ns Qrr Reverse recovery charge - 5.73 µC IRRM Reverse recovery current - 19.7 A Notes: (1)Pulse width limited by safe operating area (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5% Table 9: Gate-source Zener diode Symbol Parameter Test conditions Min Typ. Max Unit V (BR)GSO Gate-source breakdown voltage IGS= ± 1mA, ID= 0A 30 - - V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry.
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance
3 Test circuits
Figure 14: Test circuit for resistive load switching times Figure 15: Test circuit for gate charge behavior Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform AM01469v10 47 kΩ 2.7 kΩ 1 kΩ IG= CONST 100 Ω D.U.T. +pulse width VGS 2200 μF VG VDD RL
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
4.1 TO-220 type A package information
Figure 20: TO-220 type A package outline
Table 10: TO-220 type A mechanical data Dim. mm Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.55 c 0.48 0.70 D 15.25 15.75 1.27 E 10.00 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13.00 14.00 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95
5 Revision history
Table 11: Document revision history Date Revision Changes 28-Nov-2016 1 First release