STP80NS04Z STMICROELECTRONICS | Alldatasheet
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Technical content
N - CHANNEL CLAMPED 7.5m Ω - 80A - TO-220 FULLY PROTECTED MESH OVERLAY MOSFET n TYPICAL RDS(on) = 0.0075Ω n 100% AVALANCHE TESTED n LOW CAPACITANCE AND GATE CHARGE n 175 oC MAXIMUM JUNCTION TEMPERATURE
DESCRIPTION
This fully clamped Mosfet is produced by using the latest advanced Company’s Mesh Overlay process which is based on a novel strip layout. The inherent benefits of the new technology coupled with the extra clamping capabilities make this product particularly suitable for the harshest operation conditions such as those encountered in the automotive environment. Any other application requiring extra ruggedness is also recommended.
APPLICATIONS
n ABS, SOLENOID DRIVERS n MOTOR CONTROL n DC-DC CONVERTERS INTERNAL SCHEMATIC DIAGRAM December 1999 TO-220 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DS Drain-source Voltage (VGS = 0) CLAMPED V V DG Drain- gate Voltage CLAMPED V V GS Gate-source Voltage CLAMPED V ID Drain Current (continuous) at Tc =2 5 oC8 0 A ID Drain Current (continuous) at Tc = 100 oC6 0 A IDG Drain Gate Current (continuous) ± 50 mA IGS Gate Source Current (continuous) ± 50 mA IDM (•) Drain Current (pulsed) 320 A P tot Total Dissipation at Tc =2 5 oC 160 W Derating Factor 1.06 W/ o C V ESD (G-S) Gate-Source ESD (HBM - C= 100pF, R=1.5 kΩ )2 k V V ESD (G-D) Gate-Drain ESD (HBM - C= 100pF, R=1.5 kΩ )4 k V V ESD (D-S) Drain-Source ESD (HBM - C= 100pF, R=1.5 kΩ )4 k V Tstg Storage Temperature -65 to 175 o C Tj Max. Operating Junction Temperature -40 to 175 o C (•) Pulse width limited by safe operating area ( 1)ISD ≤ 80 A, di/dt≤ 300 A/µs, VDD ≤ V(BR)DSS ,Tj≤ TJMA X TYPE V DSS R DS(on) ID STP80NS04Z CLAMPED <0.008 Ω 80 A
Thermal Resistance Junction-case Max Thermal Resistance Junction-case Typ Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 0.94 0.65 62.5 0.5 300 oC/W oC/W oC/W oC/W oC AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, δ <1 % ) 80 A E AS Single Pulse Avalanche Energy (starting Tj =2 5 oC, ID =I AR ,V DD =3 0V ) 500 mJ ELECTRICAL CHARACTERISTICS (Tcase =2 5oC unless otherwise specified) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit VCLAMP Drain-Gate Breakdown Voltage ID =1m A V GS =0 -40 < Tj < 175 oC 33 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) V DS =1 6V T j = 175 oC5 0 µ A IGSS Gate-body Leakage Current (VDS =0 ) V GS = ± 10 V T j =1 7 5oC V GS = ± 16 V T j =1 7 5oC 150 µ A µ A V GSS Gate-Source Breakdown Voltage IG = 100 µ A1 8 V ON (∗) Symbol Parameter Test Conditions Min. Typ. Max. Unit V GS(th) Gate Threshold Voltage VDS =V GS ID =1m A -40 < Tj < 150 oC 1.7 3 4.2 V R DS(on) Static Drain-source On Resistance V GS =1 0 V ID =4 0A V GS =1 6 V ID =4 0A 7.5 m Ω m Ω ID(on) On State Drain Current VDS >I D(on) xR DS(on )max V GS =1 0V 80 A DYNAMIC Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (∗)F o r w a r d Transconductance V DS >I D(on) xR DS(on )max ID =40 A 30 50 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5V f=1M H z V GS = 0 4000 1250 230 5400 1700 320 pF pF pF STP80NS04Z
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =1 6V I D =8 0A V GS = 10 V 105 142 nC nC nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V CLAMP =3 0V I D =8 0A R G =4.7 Ω V GS =1 0V (see test circuit, figure 5) 140 220 190 300 ns ns ns SOURCE DRAIN DIODE Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) 320 A A V SD (∗)F o r w a r d O n V o l t a g e ISD =8 0A V GS =0 1 . 5 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 80 A di/dt = 100 A/ µ s V r =2 5V T j = 150 oC (see test circuit, figure 5) 0.21 ns µ C A (∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance STP80NS04Z
Gate Charge vs Gate-sourceVoltage Transfer Characteristics Static Drain-source On Resistance Capacitance Variations STP80NS04Z
Normalized Gate Threshold Voltage vs Temperature Zero Gate Voltage Drain Current vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics STP80NS04Z
Fig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuits For Resistive Load Fig. 2:Unclamped Inductive Waveform Fig. 4:Gate Charge test Circuit Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times STP80NS04Z
DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C STP80NS04Z
Information furnished is believed to be accurate and reliable. However, STMicroelect ronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japa n - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com STP80NS04Z