STP7NK30Z

STP7NK30Z_05 STMICROELECTRONICS | Alldatasheet

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Table 3: Absolute Maximum ratings (/circle6 ) Pulse width limited by safe operating area (1) ISD ≤5.7A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS , Tj ≤ TJMAX. (*) Limited only by maximum temperature allowed Table 4: Thermal Data Table 5: Avalanche Characteristics Table 6: Gate-Source Zener Diode PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Symbol Parameter Value Unit STP7NK30Z STF7NK30Z VDS Drain-source Voltage (VGS = 0) 300 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 300 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuous) at TC = 25°C 55 ( * ) A ID Drain Current (continuous) at TC = 100°C 3.2 3.2 (*) A IDM (/circle6 ) Drain Current (pulsed) 20 20 (*) A PTOT Total Dissipation at TC = 25°C 50 20 W Derating Factor 0.4 0.16 W/ °C VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ) 2800 V dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns VISO Insulation Withstand Voltage (DC) - 2500 V Tj Tstg Operating Junction Temperature Storage Temperature -55 to 150 -55 to 150 TO-220 TO-220FP Rthj-case Thermal Resistance Junction-case Max 2.50 6.25 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 130 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit BV GSO Gate-Source Breakdown Voltage Igs=± 1mA (Open Drain) 30 V

ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) Table 7: On /Off Table 8: Dynamic Table 9: Source Drain Diode (1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (2) Pulse width limited by safe operating area. (3) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS . Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID =1 mA, VGS = 0 300 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating, TC = 125 °C µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20V ±10 µA VGS(th) Gate Threshold Voltage VDS = VGS , ID = 50µA 3 3.75 4.5 V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 2.5 A 0.80 0.90 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS =15 V, ID =2 . 5 A 2 . 5 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25V, f = 1 MHz, VGS = 0 380 pF pF pF C oss eq. (3) Equivalent Output CapacitanceVGS = 0V, VDS = 0V to 400V 30 pF td(on) tr td(off) tf Turn-on Delay Time Rise Time Turn-off-Delay Time Fall Time V DD = 425 V, ID = 2.8 A, R G = 4.7 Ω, VGS = 10 V (see Figure 18) ns ns ns ns t r(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time VDD = 320V, ID = 5A, R G =4 . 7Ω, VGS = 10V (see Figure 17) 8.5 8.5 ns ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 320V, ID = 5 A, VGS = 10V (see Figure 21) 4.5 7.6 17 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit I SD ISDM (2) Source-drain Current Source-drain Current (pulsed) A A VSD (1) Forward On Voltage ISD = 5 A, VGS = 0 1.6 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 5 A, di/dt = 100A/µs VDD = 40, Tj = 150°C (see Figure 19) 154 716 9.3 ns nC A

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

A B D E H G F 123F2 L4L5 DIM. mm. inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 TO-220FP MECHANICAL DATA

DIM. mm. inch A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 L 13 14 0.511 0.551 L1 3.50 3.93 0.137 0.154 L20 16.40 0.645 L30 28.90 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 TO-220 MECHANICAL DATA

Table 10: Revision History Date Revision Description of Changes 10-May-2005 1 New stylesheet 05-Sep-2005 2 Inserted Ecopack indication

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