STP6NS25

STP6NS25 STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 250V - 0.9Ω -6 AT O - 2 2 0 MESH OVERLAY™ MOSFET ■ TYPICAL R DS (on) = 0.9Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED

DESCRIPTION

Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an ad- vanced family of power MOSFETs with outstanding performance. The new patented STrip layout cou- pled with the Company’s proprietary edge termina- tion structure, makes it suitable in coverters for lighting applications.

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STP6NS25 250 V < 1.1 Ω 6A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS =0 ) 250 V VDGR Drain-gate Voltage (RGS =2 0kΩ ) 250 V V GS Gate- source Voltage ± 20 V ID Drain Current (continuos) at TC = 25°C 6A ID Drain Current (continuos) at TC = 100°C 4A IDM (/circle6 ) Drain Current (pulsed) 24 A PTOT Total Dissipation at TC = 25°C 70 W Derating Factor 0.56 W/°C dv/dt (1) Peak Diode Recovery voltage slope 5 V/ns Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C (1) ISD ≤ 6A, di/dt≤300 A/µs, VDD ≤ V(BR)DSS ,T j≤TjMAX INTERNAL SCHEMATIC DIAGRAM TO-220

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC Rthj-case Thermal Resistance Junction-case Max 1.79 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tjmax) EAS Single Pulse Avalanche Energy (starting Tj= 25 °C, ID =IAR ,VDD =5 0V ) 75 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 250 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) VDS = Max Rating 1µ A VDS = Max Rating, TC = 125 °C 50 µA IGSS Gate-body Leakage Current (VDS =0 ) VGS = ±20V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS =V GS ,ID = 250µA 234V R DS(on) Static Drain-source On Resistance VGS =1 0 V ,ID =2A 0.9 1.1 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs(1) Forward Transconductance V DS >ID(on)xR DS(on)max, ID =2 A 1 3.5 S C iss Input Capacitance VDS =2 5 V ,f=1M H z ,VGS =0 355 pF C oss Output Capacitance 64 pF C rss Reverse Transfer Capacitance 30 pF

ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD =1 2 5V ,ID =3A R G = 4.7Ω VGS =1 0V (see test circuit, Figure 3) 12 ns tr Rise Time 18 ns Q g Total Gate Charge VDD =2 0 0 V ,ID =4A , VGS =1 0 V 19 27 nC Q gs Gate-Source Charge 3.2 nC Q gd Gate-Drain Charge 7.5 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(Voff) tf Turn-off- Delay Time Fall Time VDD = 125V, ID =2A , R G =4 . 7Ω, VGS = 10V (see test circuit, Figure 3) ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V clamp = 200V, ID =4A , R G =4 . 7Ω, VGS = 10V (see test circuit, Figure 5) ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit I SD Source-drain Current 6 A ISDM (2) Source-drain Current (pulsed) 24 A VSD (1) Forward On Voltage ISD = 6 A, VGS =0 1.5 V trr Reverse Recovery Time ISD = 6 A, di/dt = 100A/µs VDD =3 0 V ,Tj= 150°C (see test circuit, Figure 5) 124 ns Q rr Reverse Recovery Charge 0.5 µC IRRM Reverse Recovery Current 7 A Thermal ImpedanceSafe Operating Area

Gate Charge vs Gate-source Voltage Capacitance Variations Transconductance Static Drain-source On Resistance Transfer Characteristics

Source-drain Diode Forward Characteristics Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp.

Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4:Gate Charge test Circuit Fig. 2:Unclamped Inductive WaveformFig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuit For Resistive Load

DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C

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